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commit 1d1b25724ed9f766c47345c1a4d37b29729e3748 Author: Alin Jerpelea <[email protected]> AuthorDate: Thu Apr 21 07:15:03 2022 +0000 LICENSE: add license for zmodem document the license in the LICENSE file Signed-off-by: Alin Jerpelea <[email protected]> --- LICENSE | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/LICENSE b/LICENSE index 01eda55c7..e7e06266f 100644 --- a/LICENSE +++ b/LICENSE @@ -1354,3 +1354,87 @@ apps/system/ubloxmodem/ubloxmodem.h LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +apps/system/zmodem/host/crc16.c +=============================== + + Copyright (C) 2013 Gregory Nutt. All rights reserved. + + References: + + crc16_tab calculated by Mark G. Mendel, Network Systems Corporation. + crc16part() logic derived from article Copyright (C) 1986 Stephen Satchell. + + "Programmers may incorporate any or all code into their programs, + giving proper credit within the source. Publication of the + source routines is permitted so long as proper credit is given + to Stephen Satchell, Satchell Evaluations and Chuck Forsberg, + Omen Technology." + + Re-released under the Modified BSD license which, I believe, is consistent with the + original authors' intent: + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + 3. Neither the name NuttX nor the names of its contributors may be + used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +apps/system/zmodem/host/crc32.c +================================= + + Copyright (C) 2013 Gregory Nutt. All rights reserved. + + The logic in this file was developed by Gary S. Brown: + + COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code or tables + extracted from it, as desired without restriction. + + First, the polynomial itself and its table of feedback terms. The polynomial is: + + X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 + + Note that we take it "backwards" and put the highest-order term in the lowest-order bit. + The X^32 term is "implied"; the LSB is the X^31 term, etc. The X^0 term (usually shown + as "+1") results in the MSB being 1 + + Note that the usual hardware shift register implementation, which is what we're using + (we're merely optimizing it by doing eight-bit chunks at a time) shifts bits into the + lowest-order term. In our implementation, that means shifting towards the right. Why + do we do it this way? Because the calculated CRC must be transmitted in order from + highest-order term to lowest-order term. UARTs transmit characters in order from LSB + to MSB. By storing the CRC this way we hand it to the UART in the order low-byte to + high-byte; the UART sends each low-bit to hight-bit; and the result is transmission bit + by bit from highest- to lowest-order term without requiring any bit shuffling on our + part. Reception works similarly + + The feedback terms table consists of 256, 32-bit entries. Notes + + - The table can be generated at runtime if desired; code to do so is shown later. It + might not be obvious, but the feedback terms simply represent the results of eight + shift/xor operations for all combinations of data and CRC register values + + - The values must be right-shifted by eight bits by the updcrc logic; the shift must + be u_(bring in zeroes). On some hardware you could probably optimize the shift in + assembler by using byte-swap instructions polynomial
