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The following commit(s) were added to refs/heads/master by this push:
new 7420f24 xtensa_context.S: Save and restore SCOMPARE1 when necessary.
7420f24 is described below
commit 7420f245bc85e946c4d883e5f4c02267e075cc58
Author: Abdelatif Guettouche <abdelatif.guettou...@espressif.com>
AuthorDate: Tue Oct 12 14:32:55 2021 +0200
xtensa_context.S: Save and restore SCOMPARE1 when necessary.
SCOMPARE1 is used by some atomic instructions and need to be preserved
during a context switch.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettou...@espressif.com>
---
arch/xtensa/include/irq.h | 9 ++++++++-
arch/xtensa/src/common/xtensa_context.S | 12 +++++++++++-
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h
index f6489cb..d6808af 100644
--- a/arch/xtensa/include/irq.h
+++ b/arch/xtensa/include/irq.h
@@ -86,7 +86,14 @@
#define REG_EXCCAUSE (19)
#define REG_EXCVADDR (20)
-#define _REG_LOOPS_START (21)
+#define _REG_EXTRA_START (21)
+
+#if XCHAL_HAVE_S32C1I != 0
+# define REG_SCOMPARE1 (_REG_EXTRA_START + 0)
+# define _REG_LOOPS_START (_REG_EXTRA_START + 1)
+#else
+# define _REG_LOOPS_START _REG_EXTRA_START
+#endif
#if XCHAL_HAVE_LOOPS != 0
# define REG_LBEG (_REG_LOOPS_START + 0)
diff --git a/arch/xtensa/src/common/xtensa_context.S
b/arch/xtensa/src/common/xtensa_context.S
index f3e1a8e..3ac5b77 100644
--- a/arch/xtensa/src/common/xtensa_context.S
+++ b/arch/xtensa/src/common/xtensa_context.S
@@ -344,6 +344,11 @@ _xtensa_save_hook:
rsr a3, SAR
s32i a3, a2, (4 * REG_SAR)
+#if XCHAL_HAVE_S32C1I != 0
+ rsr a3, SCOMPARE1
+ s32i a3, a2, (4 * REG_SCOMPARE1)
+#endif
+
#if XCHAL_HAVE_LOOPS != 0
rsr a3, LBEG
s32i a3, a2, (4 * REG_LBEG)
@@ -469,9 +474,14 @@ _xtensa_context_restore:
#error Overly support is not implemented
#endif
+#if XCHAL_HAVE_S32C1I != 0
+ l32i a3, a2, (4 * REG_SCOMPARE1)
+ wsr a3, SCOMPARE1
+#endif
+
l32i a3, a2, (4 * REG_SAR)
- l32i sp, a2, (4 * REG_A1)
wsr a3, SAR
+ l32i sp, a2, (4 * REG_A1)
l32i a3, a2, (4 * REG_A3)
l32i a4, a2, (4 * REG_A4)
l32i a5, a2, (4 * REG_A5)
