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xiaoxiang pushed a commit to branch master
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The following commit(s) were added to refs/heads/master by this push:
new 5f67d65 risc-v/bl602: add efuse driver
5f67d65 is described below
commit 5f67d65e9e76c8d916987d42bee38a476ec19c2e
Author: Virus.V <vir...@live.com>
AuthorDate: Fri Jul 2 14:48:03 2021 +0800
risc-v/bl602: add efuse driver
Signed-off-by: Virus.V <vir...@live.com>
---
arch/risc-v/src/bl602/Make.defs | 2 +-
.../bl602/{bl602_systemreset.c => bl602_efuse.c} | 134 +++++++++++++--------
.../bl602/{bl602_systemreset.c => bl602_efuse.h} | 89 +++++---------
arch/risc-v/src/bl602/bl602_flash.c | 45 ++++---
arch/risc-v/src/bl602/bl602_netdev.c | 3 +-
arch/risc-v/src/bl602/bl602_romapi.h | 46 +++++++
arch/risc-v/src/bl602/bl602_systemreset.c | 19 +--
7 files changed, 193 insertions(+), 145 deletions(-)
diff --git a/arch/risc-v/src/bl602/Make.defs b/arch/risc-v/src/bl602/Make.defs
index 6b7bc8c..a34d183 100644
--- a/arch/risc-v/src/bl602/Make.defs
+++ b/arch/risc-v/src/bl602/Make.defs
@@ -50,7 +50,7 @@ endif
CHIP_CSRCS = bl602_allocateheap.c
CHIP_CSRCS += bl602_idle.c bl602_irq.c bl602_irq_dispatch.c
CHIP_CSRCS += bl602_serial.c bl602_lowputc.c bl602_tim.c
-CHIP_CSRCS += bl602_start.c bl602_timerisr.c
+CHIP_CSRCS += bl602_start.c bl602_timerisr.c bl602_efuse.c
ifeq ($(CONFIG_I2C),y)
CHIP_CSRCS += bl602_i2c.c
diff --git a/arch/risc-v/src/bl602/bl602_systemreset.c
b/arch/risc-v/src/bl602/bl602_efuse.c
similarity index 52%
copy from arch/risc-v/src/bl602/bl602_systemreset.c
copy to arch/risc-v/src/bl602/bl602_efuse.c
index 172ae63..2afcb96 100644
--- a/arch/risc-v/src/bl602/bl602_systemreset.c
+++ b/arch/risc-v/src/bl602/bl602_efuse.c
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/risc-v/src/bl602/bl602_systemreset.c
+ * arch/risc-v/src/bl602/bl602_efuse.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -23,80 +23,110 @@
****************************************************************************/
#include <nuttx/config.h>
+#include <nuttx/arch.h>
#include <stdint.h>
-#include "riscv_arch.h"
-
-#include "hardware/bl602_glb.h"
-#include "hardware/bl602_hbn.h"
-
-/* We choose to use ROM driver here.
- *
- * Because BL602 will reset the XIP Flash controller when performing
- * reset, this part of the code cannot be placed on the XIP Flash.
- */
+#include <errno.h>
+#include <assert.h>
-typedef void (*bl602_romdrv_reset_system) (void);
-typedef void (*bl602_romdrv_reset_sw_cpu) (void);
-typedef void (*bl602_romdrv_reset_por) (void);
+#include "chip.h"
+#include "riscv_arch.h"
-#define ROM_APITABLE ((uint32_t *)0x21010800)
+#include "hardware/bl602_ef.h"
+#include "bl602_romapi.h"
/****************************************************************************
- * Private Functions
+ * Pre-processor Definitions
****************************************************************************/
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
+#define bl602_romapi_efuse_ctrl_load_r0 \
+ ((void (*)(void))BL602_ROMAPI_EFUSE_CTRL_LOAD_R0)
/****************************************************************************
- * Name: up_systemreset
- *
- * Description:
- * Internal reset logic.
- *
+ * Private Functions
****************************************************************************/
-void up_systemreset(void)
+static inline uint32_t count_zero_bits_in_byte(uint8_t val)
{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
-
- ((bl602_romdrv_reset_system)(*(ROM_APITABLE + 47)))();
+ uint32_t cnt = 0;
+ uint32_t i = 0;
+ for (i = 0; i < 8; i++)
+ {
+ if ((val & (1 << i)) == 0)
+ {
+ cnt += 1;
+ }
+ }
+
+ return cnt;
}
/****************************************************************************
- * Name: bl602_cpu_reset
- *
- * Description:
- * Reset only the CPU
- *
+ * Public Functions
****************************************************************************/
-void bl602_cpu_reset(void)
-{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
-
- ((bl602_romdrv_reset_sw_cpu)(*(ROM_APITABLE + 48)))();
-}
-
/****************************************************************************
- * Name: bl602_por_reset
+ * Name: bl602_efuse_read_mac_address
*
* Description:
- * Trigger Power-on-Reset
+ * Read MAC address from efuse.
+ *
+ * Input Parameters:
+ * mac: the buffer to hold mac address
+ *
+ * Returned Value:
+ * 0: OK
+ * ENODATA: Failed
*
****************************************************************************/
-void bl602_por_reset(void)
+int bl602_efuse_read_mac_address(uint8_t mac[6])
{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
-
- ((bl602_romdrv_reset_por)(*(ROM_APITABLE + 49)))();
+ DEBUGASSERT(mac != NULL);
+
+ uint8_t *maclow = (uint8_t *)mac;
+ uint8_t *machigh = (uint8_t *)(mac + 4);
+ uint32_t tmp_val;
+ uint32_t i = 0;
+ uint32_t cnt = 0;
+
+ /* Trigger read data from efuse */
+
+ bl602_romapi_efuse_ctrl_load_r0();
+
+ tmp_val = getreg32(BL602_EF_WIFI_MAC_LOW);
+ maclow[0] = tmp_val & 0xff;
+ maclow[1] = (tmp_val >> 8) & 0xff;
+ maclow[2] = (tmp_val >> 16) & 0xff;
+ maclow[3] = (tmp_val >> 24) & 0xff;
+
+ tmp_val = getreg32(BL602_EF_WIFI_MAC_HIGH);
+ machigh[0] = tmp_val & 0xff;
+ machigh[1] = (tmp_val >> 8) & 0xff;
+
+ /* Check parity */
+
+ for (i = 0; i < 6; i++)
+ {
+ cnt += count_zero_bits_in_byte(mac[i]);
+ }
+
+ if ((cnt & 0x3f) == ((tmp_val >> 16) & 0x3f))
+ {
+ /* Change to network order */
+
+ for (i = 0; i < 3; i++)
+ {
+ tmp_val = mac[i];
+ mac[i] = mac[5 - i];
+ mac[5 - i] = tmp_val;
+ }
+
+ return 0;
+ }
+ else
+ {
+ return -ENODATA;
+ }
}
+
diff --git a/arch/risc-v/src/bl602/bl602_systemreset.c
b/arch/risc-v/src/bl602/bl602_efuse.h
similarity index 51%
copy from arch/risc-v/src/bl602/bl602_systemreset.c
copy to arch/risc-v/src/bl602/bl602_efuse.h
index 172ae63..fa1266c 100644
--- a/arch/risc-v/src/bl602/bl602_systemreset.c
+++ b/arch/risc-v/src/bl602/bl602_efuse.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/risc-v/src/bl602/bl602_systemreset.c
+ * arch/risc-v/src/bl602/bl602_efuse.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,85 +18,56 @@
*
****************************************************************************/
+#ifndef __ARCH_RISCV_SRC_BL602_BL602_EFUSE_H
+#define __ARCH_RISCV_SRC_BL602_BL602_EFUSE_H
+
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
-
#include <stdint.h>
-#include "riscv_arch.h"
-
-#include "hardware/bl602_glb.h"
-#include "hardware/bl602_hbn.h"
-
-/* We choose to use ROM driver here.
- *
- * Because BL602 will reset the XIP Flash controller when performing
- * reset, this part of the code cannot be placed on the XIP Flash.
- */
-
-typedef void (*bl602_romdrv_reset_system) (void);
-typedef void (*bl602_romdrv_reset_sw_cpu) (void);
-typedef void (*bl602_romdrv_reset_por) (void);
-
-#define ROM_APITABLE ((uint32_t *)0x21010800)
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
/****************************************************************************
- * Public Functions
+ * Public Data
****************************************************************************/
-/****************************************************************************
- * Name: up_systemreset
- *
- * Description:
- * Internal reset logic.
- *
- ****************************************************************************/
+#ifndef __ASSEMBLY__
-void up_systemreset(void)
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
-
- ((bl602_romdrv_reset_system)(*(ROM_APITABLE + 47)))();
-}
+#else
+#define EXTERN extern
+#endif
/****************************************************************************
- * Name: bl602_cpu_reset
- *
- * Description:
- * Reset only the CPU
- *
+ * Public Function Prototypes
****************************************************************************/
-void bl602_cpu_reset(void)
-{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
-
- ((bl602_romdrv_reset_sw_cpu)(*(ROM_APITABLE + 48)))();
-}
-
/****************************************************************************
- * Name: bl602_por_reset
+ * Name: bl602_efuse_read_mac_address
*
* Description:
- * Trigger Power-on-Reset
+ * Read MAC address from efuse.
+ *
+ * Input Parameters:
+ * mac: the buffer to hold mac address
+ *
+ * Returned Value:
+ * 0: OK
+ * ENODATA: Failed
*
****************************************************************************/
-void bl602_por_reset(void)
-{
- /* When perform reset before, MUST disable interrupt */
-
- asm volatile("csrci mstatus, 8");
+int bl602_efuse_read_mac_address(uint8_t mac[6]);
- ((bl602_romdrv_reset_por)(*(ROM_APITABLE + 49)))();
+#undef EXTERN
+#if defined(__cplusplus)
}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_SRC_BL602_BL602_EFUSE_H */
diff --git a/arch/risc-v/src/bl602/bl602_flash.c
b/arch/risc-v/src/bl602/bl602_flash.c
index 91a8c0e..9a124d1 100644
--- a/arch/risc-v/src/bl602/bl602_flash.c
+++ b/arch/risc-v/src/bl602/bl602_flash.c
@@ -29,37 +29,37 @@
#include <debug.h>
#include <nuttx/irq.h>
+#include "bl602_romapi.h"
#ifdef CONFIG_BL602_SPIFLASH
/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define bl602_romapi_sflash_erase \
+ ((void (*)(uint8_t *, uint32_t, int))BL602_ROMAPI_SFLASH_EREASE_NEEDLOCK)
+
+#define bl602_romapi_sflash_write \
+ ((void (*)(uint8_t *, uint32_t, const uint8_t *, int)) \
+ BL602_ROMAPI_SFLASH_WRITE_NEEDLOCK)
+
+#define bl602_romapi_sflash_read \
+ ((void (*)( \
+ uint8_t *, uint32_t, uint8_t *, int))BL602_ROMAPI_SFLASH_READ_NEEDLOCK)
+
+/****************************************************************************
* Private Data
****************************************************************************/
+static struct bl602_romflash_cfg_desc g_bl602_romflash_cfg;
+
struct bl602_romflash_cfg_desc
{
uint32_t magic;
uint8_t cfg[84];
};
-#define ROMAPI_BASE (0x21010800)
-#define ROMAPI_SFLASH_EREASE_NEEDLOCK (ROMAPI_BASE + 163 * 4)
-#define ROMAPI_SFLASH_WRITE_NEEDLOCK (ROMAPI_BASE + 164 * 4)
-#define ROMAPI_SFLASH_READ_NEEDLOCK (ROMAPI_BASE + 165 * 4)
-#define ROMAPI_SFLASH_GET_JEDECID_NOLOCK (ROMAPI_BASE + 166 * 4)
-#define ROMAPI_SFLASH_READ_WITHLOCK (ROMAPI_BASE + 170 * 4)
-#define ROMAPI_SFLASH_WRITE_WITHLOCK (ROMAPI_BASE + 171 * 4)
-#define ROMAPI_SFLASH_EREASE_WITHLOCK (ROMAPI_BASE + 172 * 4)
-
-static struct bl602_romflash_cfg_desc g_bl602_romflash_cfg;
-
-typedef void (*bl602_romdrv_erase_fn) (uint8_t *cfg,
- uint32_t addr, int len);
-typedef void (*bl602_romdrv_write_fn) (uint8_t *cfg,
- uint32_t addr, const uint8_t *dst, int len);
-typedef void (*bl602_romdrv_read_fn) (uint8_t *cfg,
- uint32_t addr, uint8_t *dst, int len);
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -71,8 +71,7 @@ int bl602_flash_erase(uint32_t addr, int len)
finfo("addr = %08lx, len = %d\n", addr, len);
flags = up_irq_save();
- ((bl602_romdrv_erase_fn)(*((uint32_t *)(ROMAPI_SFLASH_EREASE_NEEDLOCK))))
- (g_bl602_romflash_cfg.cfg, addr, addr + len - 1);
+ bl602_romapi_sflash_erase(g_bl602_romflash_cfg.cfg, addr, addr + len - 1);
up_irq_restore(flags);
return 0;
@@ -85,8 +84,7 @@ int bl602_flash_write(uint32_t addr, const uint8_t *src, int
len)
finfo("addr = %08lx, len = %d\n", addr, len);
flags = up_irq_save();
- ((bl602_romdrv_write_fn)(*((uint32_t *)(ROMAPI_SFLASH_WRITE_NEEDLOCK))))
- (g_bl602_romflash_cfg.cfg, addr, src, len);
+ bl602_romapi_sflash_write(g_bl602_romflash_cfg.cfg, addr, src, len);
up_irq_restore(flags);
return 0;
@@ -99,8 +97,7 @@ int bl602_flash_read(uint32_t addr, uint8_t *dst, int len)
finfo("addr = %08lx, len = %d\n", addr, len);
flags = up_irq_save();
- ((bl602_romdrv_read_fn)(*((uint32_t *)(ROMAPI_SFLASH_READ_NEEDLOCK))))
- (g_bl602_romflash_cfg.cfg, addr, dst, len);
+ bl602_romapi_sflash_read(g_bl602_romflash_cfg.cfg, addr, dst, len);
up_irq_restore(flags);
return 0;
diff --git a/arch/risc-v/src/bl602/bl602_netdev.c
b/arch/risc-v/src/bl602/bl602_netdev.c
index 4186f80..9e1522b 100644
--- a/arch/risc-v/src/bl602/bl602_netdev.c
+++ b/arch/risc-v/src/bl602/bl602_netdev.c
@@ -62,6 +62,7 @@
#include "wifi_manager/include/wifi_mgmr_ext.h"
#include "wifi_driver/os_hal.h"
#include "bl602_netdev.h"
+#include "bl602_efuse.h"
#ifdef CONFIG_BL602_WIRELESS
@@ -2177,7 +2178,7 @@ int bl602_net_initialize(void)
* Applies only if the Wireless MAC has its own internal address.
*/
- bl602_ef_ctrl_read_mac_address(mac);
+ bl602_efuse_read_mac_address(mac);
wlinfo(":::MAC:%x %x %x %x %x %x\n",
mac[0],
mac[1],
diff --git a/arch/risc-v/src/bl602/bl602_romapi.h
b/arch/risc-v/src/bl602/bl602_romapi.h
new file mode 100644
index 0000000..c2696e3
--- /dev/null
+++ b/arch/risc-v/src/bl602/bl602_romapi.h
@@ -0,0 +1,46 @@
+/****************************************************************************
+ * arch/risc-v/src/bl602/bl602_romapi.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_BL602_BL602_ROMAPI_H
+#define __ARCH_RISCV_SRC_BL602_BL602_ROMAPI_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+
+#define BL602_ROMAPI_BASE (0x21010800)
+#define BL602_ROMAPI_FUNC(idx) (*(uintptr_t *)(BL602_ROMAPI_BASE + (idx)*4))
+
+#define BL602_ROMAPI_ASM_DELAY_US BL602_ROMAPI_FUNC(20)
+#define BL602_ROMAPI_EFUSE_CTRL_LOAD_R0 BL602_ROMAPI_FUNC(31)
+#define BL602_ROMAPI_RST_SYSTEM BL602_ROMAPI_FUNC(47)
+#define BL602_ROMAPI_RST_CPU_SW BL602_ROMAPI_FUNC(48)
+#define BL602_ROMAPI_RST_POR BL602_ROMAPI_FUNC(49)
+#define BL602_ROMAPI_SFLASH_EREASE_NEEDLOCK BL602_ROMAPI_FUNC(163)
+#define BL602_ROMAPI_SFLASH_WRITE_NEEDLOCK BL602_ROMAPI_FUNC(164)
+#define BL602_ROMAPI_SFLASH_READ_NEEDLOCK BL602_ROMAPI_FUNC(165)
+#define BL602_ROMAPI_SFLASH_GET_JEDECID_NOLOCK BL602_ROMAPI_FUNC(166)
+#define BL602_ROMAPI_SFLASH_READ_WITHLOCK BL602_ROMAPI_FUNC(170)
+#define BL602_ROMAPI_SFLASH_WRITE_WITHLOCK BL602_ROMAPI_FUNC(171)
+#define BL602_ROMAPI_SFLASH_EREASE_WITHLOCK BL602_ROMAPI_FUNC(172)
+
+#endif
diff --git a/arch/risc-v/src/bl602/bl602_systemreset.c
b/arch/risc-v/src/bl602/bl602_systemreset.c
index 172ae63..c639fc4 100644
--- a/arch/risc-v/src/bl602/bl602_systemreset.c
+++ b/arch/risc-v/src/bl602/bl602_systemreset.c
@@ -29,6 +29,11 @@
#include "hardware/bl602_glb.h"
#include "hardware/bl602_hbn.h"
+#include "bl602_romapi.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
/* We choose to use ROM driver here.
*
@@ -36,11 +41,9 @@
* reset, this part of the code cannot be placed on the XIP Flash.
*/
-typedef void (*bl602_romdrv_reset_system) (void);
-typedef void (*bl602_romdrv_reset_sw_cpu) (void);
-typedef void (*bl602_romdrv_reset_por) (void);
-
-#define ROM_APITABLE ((uint32_t *)0x21010800)
+#define bl602_romapi_reset_system ((void (*)(void))BL602_ROMAPI_RST_SYSTEM)
+#define bl602_romapi_reset_cpu_sw ((void (*)(void))BL602_ROMAPI_RST_CPU_SW)
+#define bl602_romapi_reset_por ((void (*)(void))BL602_ROMAPI_RST_POR)
/****************************************************************************
* Private Functions
@@ -64,7 +67,7 @@ void up_systemreset(void)
asm volatile("csrci mstatus, 8");
- ((bl602_romdrv_reset_system)(*(ROM_APITABLE + 47)))();
+ bl602_romapi_reset_system();
}
/****************************************************************************
@@ -81,7 +84,7 @@ void bl602_cpu_reset(void)
asm volatile("csrci mstatus, 8");
- ((bl602_romdrv_reset_sw_cpu)(*(ROM_APITABLE + 48)))();
+ bl602_romapi_reset_cpu_sw();
}
/****************************************************************************
@@ -98,5 +101,5 @@ void bl602_por_reset(void)
asm volatile("csrci mstatus, 8");
- ((bl602_romdrv_reset_por)(*(ROM_APITABLE + 49)))();
+ bl602_romapi_reset_por();
}
