juniskane commented on a change in pull request #2943:
URL: https://github.com/apache/incubator-nuttx/pull/2943#discussion_r586213818
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File path: arch/arm/src/stm32f7/Kconfig
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@@ -2582,10 +2582,24 @@ endchoice #"RTC clock source"
if STM32F7_RTC_LSECLOCK
+config STM32F7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY
+ bool "Automaticaly boost the LSE oscillator drive capability level
until it starts-up"
+ default n
+ ---help---
+ This will cycle through the values from low to high. To avoid
+ damaging the the crystal. We want to use the lowest setting
that gets
+ the OSC running. See app note AN2867
+
+ 0 = Low drive capability (default)
+ 1 = Medium high drive capability
+ 2 = Medium low drive capability
+ 3 = High drive capability
Review comment:
Yes, these are correct for F7, haven't checked H7. L4 and all new ones
have the obvious correction in silicon.
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