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The following commit(s) were added to refs/heads/master by this push:
new e26daf9 STM32 FLASH latency is calculated based on Vin.
e26daf9 is described below
commit e26daf93572891a6920d8f1b2390e519fc5bda15
Author: Fotis Panagiotopoulos <f.pa...@amco.gr>
AuthorDate: Fri Dec 4 14:32:09 2020 +0200
STM32 FLASH latency is calculated based on Vin.
---
arch/arm/src/stm32/stm32f20xxx_rcc.c | 89 +++++++++++++++++++-----
arch/arm/src/stm32/stm32f40xxx_rcc.c | 127 ++++++++++++++++++++++++++++-------
2 files changed, 177 insertions(+), 39 deletions(-)
diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c
b/arch/arm/src/stm32/stm32f20xxx_rcc.c
index ac0435c..e605b5f 100644
--- a/arch/arm/src/stm32/stm32f20xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c
@@ -55,25 +55,82 @@
#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
-/* The FLASH latency depends on the system clock.
- *
- * Calculate the wait cycles, based on STM32_SYSCLK_FREQUENCY:
- * 0WS from 0-30MHz
- * 1WS from 30-60MHz
- * 2WS from 60-90MHz
- * 3WS from 90-120MHz
+/* The FLASH latency depends on the system clock, and voltage input
+ * of the microcontroller. The following macros calculate the correct
+ * wait cycles for every STM32_SYSCLK_FREQUENCY & BOARD_STM32F2_VDD
+ * combination. BOARD_STM32F2_VDD is defined in mV.
*/
-#if (STM32_SYSCLK_FREQUENCY <= 30000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
-#elif (STM32_SYSCLK_FREQUENCY <= 60000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
-#elif (STM32_SYSCLK_FREQUENCY <= 90000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
-#elif (STM32_SYSCLK_FREQUENCY <= 120000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+#ifndef BOARD_STM32F2_VDD
+# define BOARD_STM32F2_VDD 3300
+#endif
+
+#if (BOARD_STM32F2_VDD <= 2100)
+# if (STM32_SYSCLK_FREQUENCY <= 16000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 32000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 48000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 64000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 80000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 96000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 112000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_6
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_7
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F2_VDD <= 2400)
+# if (STM32_SYSCLK_FREQUENCY <= 18000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 36000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 54000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 72000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 90000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 108000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_6
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F2_VDD <= 2700)
+# if (STM32_SYSCLK_FREQUENCY <= 24000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 48000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 72000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 96000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F2_VDD <= 3600)
+# if (STM32_SYSCLK_FREQUENCY <= 30000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 60000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 90000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
#else
-# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# error "BOARD_STM32F2_VDD is out of range!"
#endif
/****************************************************************************
diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c
b/arch/arm/src/stm32/stm32f40xxx_rcc.c
index 98ee333..bfa6a1c 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c
@@ -68,31 +68,112 @@
#define HSE_DIVISOR (STM32_HSE_FREQUENCY + 500000) / 1000000
-/* The FLASH latency depends on the system clock.
- *
- * Calculate the wait cycles, based on STM32_SYSCLK_FREQUENCY:
- * 0WS from 0-30MHz
- * 1WS from 30-60MHz
- * 2WS from 60-90MHz
- * 3WS from 90-120MHz
- * 4WS from 120-150MHz
- * 5WS from 150-180MHz
+/* The FLASH latency depends on the system clock, and voltage input
+ * of the microcontroller. The following macros calculate the correct
+ * wait cycles for every STM32_SYSCLK_FREQUENCY & BOARD_STM32F4_VDD
+ * combination. BOARD_STM32F4_VDD is defined in mV.
*/
-#if (STM32_SYSCLK_FREQUENCY <= 30000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
-#elif (STM32_SYSCLK_FREQUENCY <= 60000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
-#elif (STM32_SYSCLK_FREQUENCY <= 90000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
-#elif (STM32_SYSCLK_FREQUENCY <= 120000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
-#elif (STM32_SYSCLK_FREQUENCY <= 150000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
-#elif (STM32_SYSCLK_FREQUENCY <= 180000000)
-# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+#ifndef BOARD_STM32F4_VDD
+# define BOARD_STM32F4_VDD 3300
+#endif
+
+#if (BOARD_STM32F4_VDD <= 2100)
+# if (STM32_SYSCLK_FREQUENCY <= 20000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 40000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 60000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 800000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 100000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 140000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_6
+# elif (STM32_SYSCLK_FREQUENCY <= 160000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_7
+# elif (STM32_SYSCLK_FREQUENCY <= 168000000) && \
+ (defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) ||
\
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469))
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_8
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F4_VDD <= 2400)
+# if (STM32_SYSCLK_FREQUENCY <= 22000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 44000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 66000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 880000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 110000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 132000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 154000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_6
+# elif (STM32_SYSCLK_FREQUENCY <= 168000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_7
+# elif (STM32_SYSCLK_FREQUENCY <= 176000000) && \
+ (defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) ||
\
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469))
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_7
+# elif (STM32_SYSCLK_FREQUENCY <= 180000000) && \
+ (defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) ||
\
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469))
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_8
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F4_VDD <= 2700)
+# if (STM32_SYSCLK_FREQUENCY <= 24000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 48000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 72000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 960000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 144000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 168000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_6
+# elif (STM32_SYSCLK_FREQUENCY <= 180000000) && \
+ (defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) ||
\
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469))
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_7
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
+#elif (BOARD_STM32F4_VDD <= 3600)
+# if (STM32_SYSCLK_FREQUENCY <= 30000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_0
+# elif (STM32_SYSCLK_FREQUENCY <= 60000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_1
+# elif (STM32_SYSCLK_FREQUENCY <= 90000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_2
+# elif (STM32_SYSCLK_FREQUENCY <= 120000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_3
+# elif (STM32_SYSCLK_FREQUENCY <= 150000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_4
+# elif (STM32_SYSCLK_FREQUENCY <= 168000000)
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# elif (STM32_SYSCLK_FREQUENCY <= 180000000) && \
+ (defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) ||
\
+ defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469))
+# define FLASH_ACR_LATENCY_SETTING FLASH_ACR_LATENCY_5
+# else
+# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# endif
#else
-# error "STM32_SYSCLK_FREQUENCY is out of range!"
+# error "BOARD_STM32F4_VDD is out of range!"
#endif
/****************************************************************************
@@ -815,7 +896,7 @@ static void stm32_stdclockconfig(void)
#ifdef CONFIG_STM32_FLASH_DCACHE
| FLASH_ACR_DCEN
#endif
-#ifdef CONFIG_STM32_FLASH_PREFETCH
+#if defined(CONFIG_STM32_FLASH_PREFETCH) && (BOARD_STM32F4_VDD > 2100)
| FLASH_ACR_PRFTEN
#endif
);
