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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 809f5efb1cdc8657839594ece9e95753cb4a9640
Author: YAMAMOTO Takashi <yamam...@midokura.com>
AuthorDate: Fri Nov 27 14:04:11 2020 +0900
arch/arm/src/cxd56xx/cxd56_sdhci.c: Fix syslog formats
---
arch/arm/src/cxd56xx/cxd56_sdhci.c | 54 +++++++++++++++++++++-----------------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.c
b/arch/arm/src/cxd56xx/cxd56_sdhci.c
index 75b24b5..a5c097e 100644
--- a/arch/arm/src/cxd56xx/cxd56_sdhci.c
+++ b/arch/arm/src/cxd56xx/cxd56_sdhci.c
@@ -41,6 +41,7 @@
#include <nuttx/config.h>
+#include <inttypes.h>
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
@@ -1137,8 +1138,9 @@ static int cxd56_interrupt(int irq, FAR void *context,
FAR void *arg)
regval = getreg32(CXD56_SDHCI_IRQSIGEN);
enabled = getreg32(CXD56_SDHCI_IRQSTAT) & regval;
- mcinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
- getreg32(CXD56_SDHCI_IRQSTAT), regval, enabled);
+ mcinfo("IRQSTAT: %08" PRIx32 " IRQSIGEN %08" PRIx32
+ " enabled: %08" PRIx32 "\n",
+ getreg32(CXD56_SDHCI_IRQSTAT), regval, enabled);
/* Disable card interrupts to clear the card interrupt to the host
* system.
@@ -1218,7 +1220,7 @@ static int cxd56_interrupt(int irq, FAR void *context,
FAR void *arg)
{
/* Clear error interrupts */
- mcerr("ERROR: Occur error interrupts: %08x\n", enabled);
+ mcerr("ERROR: Occur error interrupts: %08" PRIx32 "\n", enabled);
putreg32(enabled & SDHCI_EINT_MASK, CXD56_SDHCI_IRQSTAT);
}
@@ -1347,9 +1349,10 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s
*dev)
putreg32(SDHCI_INT_ALL & (~SDHCI_INT_CINT), CXD56_SDHCI_IRQSTATEN);
- mcinfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
- getreg32(CXD56_SDHCI_SYSCTL), getreg32(CXD56_SDHCI_PRSSTAT),
- getreg32(CXD56_SDHCI_IRQSTATEN));
+ mcinfo("SYSCTL: %08" PRIx32 " PRSSTAT: %08" PRIx32
+ " IRQSTATEN: %08" PRIx32 "\n",
+ getreg32(CXD56_SDHCI_SYSCTL), getreg32(CXD56_SDHCI_PRSSTAT),
+ getreg32(CXD56_SDHCI_IRQSTATEN));
/* Initialize the SDHC slot structure data structure */
@@ -1546,7 +1549,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
regval = getreg32(CXD56_SDHCI_SYSCTL);
regval &= ~SDHCI_SYSCTL_SDCLKEN;
putreg32(regval, CXD56_SDHCI_SYSCTL);
- mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
+ mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
/* sel_ttclk bit[16] */
@@ -1593,7 +1596,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
regval &= ~(SDHCI_SYSCTL_SDCLKFS_MASK | SDHCI_SYSCTL_SDCLKFSUP_MASK);
putreg32(regval, CXD56_SDHCI_SYSCTL);
cxd56_sdio_frequency(CONFIG_CXD56_IDMODE_FREQ);
- mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
+ mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
return;
}
@@ -1635,7 +1638,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
putreg32(regval | SDHCI_SYSCTL_SDCLKEN, CXD56_SDHCI_SYSCTL);
}
while ((getreg32(CXD56_SDHCI_SYSCTL) & SDHCI_SYSCTL_SDCLKEN) == 0);
- mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
+ mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
}
/****************************************************************************
@@ -1821,7 +1824,8 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev,
uint32_t cmd,
/* Other bits? What about CMDTYP? */
- mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ mcinfo("cmd: %08" PRIx32 " arg: %08" PRIx32 " regval: %08" PRIx32 "\n",
+ cmd, arg, regval);
/* The Command Inhibit (CIHB) bit is set in the PRSSTAT bit immediately
* after the transfer type register is written. This bit is cleared when
@@ -1837,8 +1841,8 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev,
uint32_t cmd,
{
if (--timeout <= 0)
{
- mcerr("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
- cmd, getreg32(CXD56_SDHCI_PRSSTAT));
+ mcerr("ERROR: Timeout cmd: %08" PRIx32 " PRSSTAT: %08" PRIx32 "\n",
+ cmd, getreg32(CXD56_SDHCI_PRSSTAT));
return -EBUSY;
}
@@ -1851,8 +1855,9 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev,
uint32_t cmd,
{
if (--timeout <= 0)
{
- mcerr("ERROR: Timeout cmd data: %08x PRSSTAT: %08x\n",
- cmd, getreg32(CXD56_SDHCI_PRSSTAT));
+ mcerr("ERROR: Timeout cmd data: %08" PRIx32
+ " PRSSTAT: %08" PRIx32 "\n",
+ cmd, getreg32(CXD56_SDHCI_PRSSTAT));
return -EBUSY;
}
@@ -2185,7 +2190,7 @@ static int cxd56_sdio_waitresponse(FAR struct sdio_dev_s
*dev, uint32_t cmd)
timeout -= 1;
if (timeout <= 0)
{
- mcerr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
+ mcerr("ERROR: Timeout cmd: %08" PRIx32 " IRQSTAT: %08" PRIx32 "\n",
cmd, getreg32(CXD56_SDHCI_IRQSTAT));
putreg32(0, CXD56_SDHCI_IRQSIGEN);
@@ -2197,8 +2202,9 @@ static int cxd56_sdio_waitresponse(FAR struct sdio_dev_s
*dev, uint32_t cmd)
if ((getreg32(CXD56_SDHCI_IRQSTAT) & errors) != 0)
{
- mcerr("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
- cmd, errors, getreg32(CXD56_SDHCI_IRQSTAT));
+ mcerr("ERROR: cmd: %08" PRIx32 " errors: %08" PRIx32
+ " IRQSTAT: %08" PRIx32 "\n",
+ cmd, errors, getreg32(CXD56_SDHCI_IRQSTAT));
ret = -EIO;
}
@@ -2295,7 +2301,7 @@ static int cxd56_sdio_recvshortcrc(FAR struct sdio_dev_s
*dev, uint32_t cmd,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
- mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
+ mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd);
ret = -EINVAL;
}
else
@@ -2306,12 +2312,12 @@ static int cxd56_sdio_recvshortcrc(FAR struct
sdio_dev_s *dev, uint32_t cmd,
regval = getreg32(CXD56_SDHCI_IRQSTAT);
if ((regval & SDHCI_INT_CTOE) != 0)
{
- mcerr("ERROR: Command timeout: %08x\n", regval);
+ mcerr("ERROR: Command timeout: %08" PRIx32 "\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDHCI_INT_CCE) != 0)
{
- mcerr("ERROR: CRC failure: %08x\n", regval);
+ mcerr("ERROR: CRC failure: %08" PRIx32 "\n", regval);
ret = -EIO;
}
}
@@ -2354,7 +2360,7 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s
*dev, uint32_t cmd,
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
+ mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd);
ret = -EINVAL;
}
else
@@ -2365,12 +2371,12 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s
*dev, uint32_t cmd,
regval = getreg32(CXD56_SDHCI_IRQSTAT);
if (regval & SDHCI_INT_CTOE)
{
- mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
+ mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDHCI_INT_CCE)
{
- mcerr("ERROR: CRC fail IRQSTAT: %08x\n", regval);
+ mcerr("ERROR: CRC fail IRQSTAT: %08" PRIx32 "\n", regval);
ret = -EIO;
}
}
@@ -2465,7 +2471,7 @@ static int cxd56_sdio_recvshort(FAR struct sdio_dev_s
*dev, uint32_t cmd,
regval = getreg32(CXD56_SDHCI_IRQSTAT);
if (regval & SDHCI_INT_CTOE)
{
- mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
+ mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval);
ret = -ETIMEDOUT;
}
}
