This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch merge
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx-testing.git
commit 0b4987406dff880b73332a281a9c54f11a2b0e96
Author: Xiang Xiao <xiaoxi...@xiaomi.com>
AuthorDate: Wed Oct 28 14:15:57 2020 +0800
testlist: Merge avr-mips-riscv-x86-xtensa.dat and renesas.dat into other.dat
will remove avr-mips-riscv-x86-xtensa.dat and renesas.dat after the script
in nuttx/apps update
Signed-off-by: Xiang Xiao <xiaoxi...@xiaomi.com>
---
.github/workflows/build.yml | 4 ++--
testlist/other.dat | 28 ++++++++++++++++++++++++++++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index c515bee..52146e2 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -24,7 +24,7 @@ jobs:
strategy:
matrix:
- boards: [arm-01, arm-02, arm-03, arm-04, arm-05, arm-06, arm-07,
arm-08, arm-09, arm-10, arm-11, arm-12, arm-13, avr-mips-riscv-x86-xtensa, sim,
renesas]
+ boards: [arm-01, arm-02, arm-03, arm-04, arm-05, arm-06, arm-07,
arm-08, arm-09, arm-10, arm-11, arm-12, arm-13, other, sim]
steps:
- name: Checkout nuttx repo
uses: actions/checkout@v2
@@ -91,7 +91,7 @@ jobs:
strategy:
matrix:
- boards: [arm-12, avr-mips-riscv-x86-xtensa, sim]
+ boards: [arm-12, other, sim]
steps:
- name: Checkout nuttx repo
diff --git a/testlist/other.dat b/testlist/other.dat
new file mode 100644
index 0000000..aa1883b
--- /dev/null
+++ b/testlist/other.dat
@@ -0,0 +1,28 @@
+# We do not have a toolchain for avr32 outside of Microchip login wall.
+# The work was never upstreamed to GCC.
+
+/avr
+-avr32dev1:nsh
+-avr32dev1:ostest
+
+/renesas/rx65n/rx65n-grrose
+/renesas/rx65n/rx65n-rsk2mb
+-Darwin,rx65n.*
+
+# PINGUINOL toolchain doesn't provide macOS binaries
+# with the same name
+/mips,CONFIG_MIPS32_TOOLCHAIN_PINGUINOL
+-Darwin,pic32.*
+
+/risc-v,CONFIG_RV32IM_TOOLCHAIN_GNU_RVGL
+-gapuino:nsh
+-nr5m100-nexys4:nsh
+
+# x86_64-elf-gcc from homebrew doesn't seem to
+# provide __udivdi3 etc for -m32
+/x86
+-Darwin,qemu-i486.*
+
+/x86_64
+
+/xtensa
