xiaoxiang781216 commented on code in PR #18472:
URL: https://github.com/apache/nuttx/pull/18472#discussion_r2870245580
##########
drivers/wireless/cc1101.c:
##########
@@ -1574,3 +1577,289 @@ int cc1101_isr(int irq, FAR void *context, FAR void
*arg)
work_queue(HPWORK, &dev->irq_work, cc1101_isr_process, arg, 0);
return 0;
}
+
+/****************************************************************************
+ * Name: cc1101_file_ioctl
+ *
+ * Description:
+ * Standard driver ioctl method. Maps common RF IOCTLs to CC1101 registers.
+ *
+ ****************************************************************************/
+
+static int cc1101_file_ioctl(FAR struct file *filep, int cmd,
+ unsigned long arg)
+{
+ FAR struct inode *inode;
+ FAR struct cc1101_dev_s *dev;
+ int ret = OK;
+ const uint32_t f_xosc = 26000000; /* CC1101 typical XOSC is 26 MHz */
+
+ wlinfo("cmd: %d arg: %ld\n", cmd, arg);
+ inode = filep->f_inode;
+
+ DEBUGASSERT(inode->i_private);
+ dev = inode->i_private;
+
+ /* Get exclusive access to the driver data structure */
+
+ ret = nxmutex_lock(&dev->devlock);
+ if (ret < 0)
+ {
+ return ret;
+ }
+
+ /* Process the IOCTL by command */
+
+ switch (cmd)
+ {
+ /* 1. Radio Frequency */
+
+ case WLIOC_SETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint64_t freq_word = ((uint64_t)(*freq) << 16) / f_xosc;
+ uint8_t regs[3];
+ regs[0] = (uint8_t)((freq_word >> 16) & 0xff);
+ regs[1] = (uint8_t)((freq_word >> 8) & 0xff);
+ regs[2] = (uint8_t)(freq_word & 0xff);
+
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, -3);
+ if (ret >= 0)
+ {
+ uint8_t channr = 0;
+ ret = cc1101_access(dev, CC1101_CHANNR, &channr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ break;
+
+ case WLIOC_GETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint8_t regs[3];
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, 3);
+ if (ret >= 0)
+ {
+ uint32_t freq_word = (regs[0] << 16) | (regs[1] << 8) |
+ regs[2];
+ *freq = (uint32_t)(((uint64_t)freq_word * f_xosc) >> 16);
+ ret = OK;
+ }
+ }
+ break;
+
+ /* 2. Node Address */
+
+ case WLIOC_SETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ case WLIOC_GETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, 1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ /* 3. Output Power */
+
+ case WLIOC_SETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ cc1101_setpower(dev, (uint8_t)*ptr);
+ ret = OK;
+ }
+ break;
+
+ case WLIOC_GETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ *ptr = (int32_t)dev->power;
+ ret = OK;
+ }
+ break;
+
+ /* 4. Modulation Technology */
+
+ case WLIOC_SETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ mdmcfg2 &= ~0x70;
+ switch (*mod)
+ {
+ case WLIOC_FSK:
+ mdmcfg2 |= 0x00;
+ break;
+ case WLIOC_GFSK:
+ mdmcfg2 |= 0x10;
+ break;
+ case WLIOC_OOK:
+ mdmcfg2 |= 0x30;
+ break;
+ default:
+ ret = -ENOTSUP;
+ break;
+ }
+
+ if (ret >= 0)
+ {
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ }
+ break;
+
+ case WLIOC_GETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ uint8_t mod_format = (mdmcfg2 & 0x70) >> 4;
+ if (mod_format == 0x00 || mod_format == 0x04) *mod = WLIOC_FSK;
+ else if (mod_format == 0x01) *mod = WLIOC_GFSK;
+ else if (mod_format == 0x03) *mod = WLIOC_OOK;
+ else ret = -ENOTSUP;
+
+ if (ret >= 0) ret = OK;
+ }
+ }
+ break;
+
+ /* 5. Bitrate / Data Rate */
+
+ case WLIOC_FSK_SETBITRATE:
+ case WLIOC_OOK_SETBITRATE:
+ {
+ FAR uint32_t *bitrate = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(bitrate != NULL);
+
+ uint64_t w = ((uint64_t)(*bitrate) << 28) / f_xosc;
+ uint8_t e = 0;
+ while (w > 511 && e < 15)
+ {
+ w >>= 1;
+ e++;
+ }
+
+ if (w < 256) w = 256;
+ uint8_t m = (uint8_t)(w - 256);
+
+ uint8_t mdmcfg4;
+ ret = cc1101_access(dev, CC1101_MDMCFG4, &mdmcfg4, 1);
+ if (ret >= 0)
+ {
+ mdmcfg4 = (mdmcfg4 & 0xf0) | (e & 0x0f);
+ ret = cc1101_access(dev, CC1101_MDMCFG4, &mdmcfg4, -1);
+ if (ret >= 0)
+ {
+ ret = cc1101_access(dev, CC1101_MDMCFG3, &m, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ }
+ break;
+
+ case WLIOC_FSK_GETBITRATE:
+ case WLIOC_OOK_GETBITRATE:
+ {
+ FAR uint32_t *bitrate = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(bitrate != NULL);
+
+ uint8_t mdmcfg4;
+ uint8_t mdmcfg3;
+ if (cc1101_access(dev, CC1101_MDMCFG4, &mdmcfg4, 1) >= 0 &&
+ cc1101_access(dev, CC1101_MDMCFG3, &mdmcfg3, 1) >= 0)
+ {
+ uint8_t e = mdmcfg4 & 0x0f;
+ uint8_t m = mdmcfg3;
+ *bitrate = (uint32_t)((((uint64_t)(256 + m) << e) *
+ f_xosc) >> 28);
+ ret = OK;
+ }
+ else
+ {
+ ret = -EIO;
+ }
+ }
+ break;
+
+ /* 6. FSK Frequency Deviation */
+
+ case WLIOC_FSK_SETFDEV:
+ {
+ FAR uint32_t *fdev = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(fdev != NULL);
+
+ uint64_t w = ((uint64_t)(*fdev) << 17) / f_xosc;
+ uint8_t e = 0;
+ while (w > 15 && e < 7)
+ {
+ w >>= 1;
+ e++;
+ }
+
+ if (w < 8) w = 8;
+ uint8_t m = (uint8_t)(w - 8);
Review Comment:
all variables definition need locate at the begin of function/block
##########
drivers/wireless/cc1101.c:
##########
@@ -1574,3 +1577,289 @@ int cc1101_isr(int irq, FAR void *context, FAR void
*arg)
work_queue(HPWORK, &dev->irq_work, cc1101_isr_process, arg, 0);
return 0;
}
+
+/****************************************************************************
+ * Name: cc1101_file_ioctl
+ *
+ * Description:
+ * Standard driver ioctl method. Maps common RF IOCTLs to CC1101 registers.
+ *
+ ****************************************************************************/
+
+static int cc1101_file_ioctl(FAR struct file *filep, int cmd,
+ unsigned long arg)
+{
+ FAR struct inode *inode;
+ FAR struct cc1101_dev_s *dev;
+ int ret = OK;
+ const uint32_t f_xosc = 26000000; /* CC1101 typical XOSC is 26 MHz */
+
+ wlinfo("cmd: %d arg: %ld\n", cmd, arg);
+ inode = filep->f_inode;
+
+ DEBUGASSERT(inode->i_private);
+ dev = inode->i_private;
+
+ /* Get exclusive access to the driver data structure */
+
+ ret = nxmutex_lock(&dev->devlock);
+ if (ret < 0)
+ {
+ return ret;
+ }
+
+ /* Process the IOCTL by command */
+
+ switch (cmd)
+ {
+ /* 1. Radio Frequency */
+
+ case WLIOC_SETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint64_t freq_word = ((uint64_t)(*freq) << 16) / f_xosc;
+ uint8_t regs[3];
+ regs[0] = (uint8_t)((freq_word >> 16) & 0xff);
+ regs[1] = (uint8_t)((freq_word >> 8) & 0xff);
+ regs[2] = (uint8_t)(freq_word & 0xff);
+
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, -3);
+ if (ret >= 0)
+ {
+ uint8_t channr = 0;
+ ret = cc1101_access(dev, CC1101_CHANNR, &channr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ break;
+
+ case WLIOC_GETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint8_t regs[3];
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, 3);
+ if (ret >= 0)
+ {
+ uint32_t freq_word = (regs[0] << 16) | (regs[1] << 8) |
+ regs[2];
+ *freq = (uint32_t)(((uint64_t)freq_word * f_xosc) >> 16);
+ ret = OK;
+ }
+ }
+ break;
+
+ /* 2. Node Address */
+
+ case WLIOC_SETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ case WLIOC_GETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, 1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ /* 3. Output Power */
+
+ case WLIOC_SETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ cc1101_setpower(dev, (uint8_t)*ptr);
+ ret = OK;
+ }
+ break;
+
+ case WLIOC_GETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ *ptr = (int32_t)dev->power;
+ ret = OK;
+ }
+ break;
+
+ /* 4. Modulation Technology */
+
+ case WLIOC_SETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ mdmcfg2 &= ~0x70;
+ switch (*mod)
+ {
+ case WLIOC_FSK:
+ mdmcfg2 |= 0x00;
+ break;
+ case WLIOC_GFSK:
+ mdmcfg2 |= 0x10;
+ break;
+ case WLIOC_OOK:
+ mdmcfg2 |= 0x30;
+ break;
+ default:
+ ret = -ENOTSUP;
+ break;
+ }
+
+ if (ret >= 0)
+ {
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ }
+ break;
+
+ case WLIOC_GETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ uint8_t mod_format = (mdmcfg2 & 0x70) >> 4;
+ if (mod_format == 0x00 || mod_format == 0x04) *mod = WLIOC_FSK;
Review Comment:
fix the style by using switch case
##########
drivers/wireless/cc1101.c:
##########
@@ -1574,3 +1577,289 @@ int cc1101_isr(int irq, FAR void *context, FAR void
*arg)
work_queue(HPWORK, &dev->irq_work, cc1101_isr_process, arg, 0);
return 0;
}
+
+/****************************************************************************
+ * Name: cc1101_file_ioctl
+ *
+ * Description:
+ * Standard driver ioctl method. Maps common RF IOCTLs to CC1101 registers.
+ *
+ ****************************************************************************/
+
+static int cc1101_file_ioctl(FAR struct file *filep, int cmd,
+ unsigned long arg)
+{
+ FAR struct inode *inode;
+ FAR struct cc1101_dev_s *dev;
+ int ret = OK;
+ const uint32_t f_xosc = 26000000; /* CC1101 typical XOSC is 26 MHz */
+
+ wlinfo("cmd: %d arg: %ld\n", cmd, arg);
+ inode = filep->f_inode;
+
+ DEBUGASSERT(inode->i_private);
+ dev = inode->i_private;
+
+ /* Get exclusive access to the driver data structure */
+
+ ret = nxmutex_lock(&dev->devlock);
+ if (ret < 0)
+ {
+ return ret;
+ }
+
+ /* Process the IOCTL by command */
+
+ switch (cmd)
+ {
+ /* 1. Radio Frequency */
+
+ case WLIOC_SETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint64_t freq_word = ((uint64_t)(*freq) << 16) / f_xosc;
+ uint8_t regs[3];
+ regs[0] = (uint8_t)((freq_word >> 16) & 0xff);
+ regs[1] = (uint8_t)((freq_word >> 8) & 0xff);
+ regs[2] = (uint8_t)(freq_word & 0xff);
+
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, -3);
+ if (ret >= 0)
+ {
+ uint8_t channr = 0;
+ ret = cc1101_access(dev, CC1101_CHANNR, &channr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ break;
+
+ case WLIOC_GETRADIOFREQ:
+ {
+ FAR uint32_t *freq = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(freq != NULL);
+
+ uint8_t regs[3];
+ ret = cc1101_access(dev, CC1101_FREQ2, regs, 3);
+ if (ret >= 0)
+ {
+ uint32_t freq_word = (regs[0] << 16) | (regs[1] << 8) |
+ regs[2];
+ *freq = (uint32_t)(((uint64_t)freq_word * f_xosc) >> 16);
+ ret = OK;
+ }
+ }
+ break;
+
+ /* 2. Node Address */
+
+ case WLIOC_SETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, -1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ case WLIOC_GETADDR:
+ {
+ FAR uint8_t *addr = (FAR uint8_t *)((uintptr_t)arg);
+ DEBUGASSERT(addr != NULL);
+ ret = cc1101_access(dev, CC1101_ADDR, addr, 1);
+ if (ret >= 0) ret = OK;
+ }
+ break;
+
+ /* 3. Output Power */
+
+ case WLIOC_SETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ cc1101_setpower(dev, (uint8_t)*ptr);
+ ret = OK;
+ }
+ break;
+
+ case WLIOC_GETTXPOWER:
+ {
+ FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
+ DEBUGASSERT(ptr != NULL);
+ *ptr = (int32_t)dev->power;
+ ret = OK;
+ }
+ break;
+
+ /* 4. Modulation Technology */
+
+ case WLIOC_SETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ mdmcfg2 &= ~0x70;
+ switch (*mod)
+ {
+ case WLIOC_FSK:
+ mdmcfg2 |= 0x00;
+ break;
+ case WLIOC_GFSK:
+ mdmcfg2 |= 0x10;
+ break;
+ case WLIOC_OOK:
+ mdmcfg2 |= 0x30;
+ break;
+ default:
+ ret = -ENOTSUP;
+ break;
+ }
+
+ if (ret >= 0)
+ {
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ }
+ break;
+
+ case WLIOC_GETMODU:
+ {
+ FAR enum wlioc_modulation_e *mod =
+ (FAR enum wlioc_modulation_e *)((uintptr_t)arg);
+ DEBUGASSERT(mod != NULL);
+
+ uint8_t mdmcfg2;
+ ret = cc1101_access(dev, CC1101_MDMCFG2, &mdmcfg2, 1);
+ if (ret >= 0)
+ {
+ uint8_t mod_format = (mdmcfg2 & 0x70) >> 4;
+ if (mod_format == 0x00 || mod_format == 0x04) *mod = WLIOC_FSK;
+ else if (mod_format == 0x01) *mod = WLIOC_GFSK;
+ else if (mod_format == 0x03) *mod = WLIOC_OOK;
+ else ret = -ENOTSUP;
+
+ if (ret >= 0) ret = OK;
+ }
+ }
+ break;
+
+ /* 5. Bitrate / Data Rate */
+
+ case WLIOC_FSK_SETBITRATE:
+ case WLIOC_OOK_SETBITRATE:
+ {
+ FAR uint32_t *bitrate = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(bitrate != NULL);
+
+ uint64_t w = ((uint64_t)(*bitrate) << 28) / f_xosc;
+ uint8_t e = 0;
+ while (w > 511 && e < 15)
+ {
+ w >>= 1;
+ e++;
+ }
+
+ if (w < 256) w = 256;
+ uint8_t m = (uint8_t)(w - 256);
+
+ uint8_t mdmcfg4;
+ ret = cc1101_access(dev, CC1101_MDMCFG4, &mdmcfg4, 1);
+ if (ret >= 0)
+ {
+ mdmcfg4 = (mdmcfg4 & 0xf0) | (e & 0x0f);
+ ret = cc1101_access(dev, CC1101_MDMCFG4, &mdmcfg4, -1);
+ if (ret >= 0)
+ {
+ ret = cc1101_access(dev, CC1101_MDMCFG3, &m, -1);
+ if (ret >= 0) ret = OK;
+ }
+ }
+ }
+ break;
+
+ case WLIOC_FSK_GETBITRATE:
+ case WLIOC_OOK_GETBITRATE:
+ {
+ FAR uint32_t *bitrate = (FAR uint32_t *)((uintptr_t)arg);
+ DEBUGASSERT(bitrate != NULL);
Review Comment:
move after line 1800
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