(nuttx) branch master updated: RP2350B has 48 gpio, highers 16 accessed by "HI" registers

[xiaoxiang]

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new e1e9ea2e815 RP2350B has 48 gpio, highers 16 accessed by "HI" registers
e1e9ea2e815 is described below

commit e1e9ea2e815c5058c462f3bd7b543219c915b19e
Author: paolovolpi <paolo.vo...@gmail.com>
AuthorDate: Wed Jul 9 09:04:08 2025 +0200

    RP2350B has 48 gpio, highers 16 accessed by "HI" registers
---
 arch/arm/src/rp23xx/rp23xx_gpio.h | 76 +++++++++++++++++++++++++++++++++++----
 1 file changed, 70 insertions(+), 6 deletions(-)

diff --git a/arch/arm/src/rp23xx/rp23xx_gpio.h 
b/arch/arm/src/rp23xx/rp23xx_gpio.h
index 9b0f9ff05ca..5eaa6d0b266 100644
--- a/arch/arm/src/rp23xx/rp23xx_gpio.h
+++ b/arch/arm/src/rp23xx/rp23xx_gpio.h
@@ -103,10 +103,11 @@ extern "C"
 
 static inline void rp23xx_gpio_put(uint32_t gpio, int set)
 {
-  uint32_t value = 1 << gpio;
-
   DEBUGASSERT(gpio < RP23XX_GPIO_NUM);
 
+#if (RP23XX_GPIO_NUM <= 32)
+  uint32_t value = 1 << gpio;
+
   if (set)
     {
       putreg32(value, RP23XX_SIO_GPIO_OUT_SET);
@@ -115,23 +116,61 @@ static inline void rp23xx_gpio_put(uint32_t gpio, int set)
     {
       putreg32(value, RP23XX_SIO_GPIO_OUT_CLR);
     }
+#else
+  uint32_t mask = 1ul << (gpio & 0x1fu);
+  if (gpio < 32)
+    {
+      if (set)
+        {
+          putreg32(mask, RP23XX_SIO_GPIO_OUT_SET);
+        }
+      else
+        {
+          putreg32(mask, RP23XX_SIO_GPIO_OUT_CLR);
+        }
+    }
+  else
+    {
+        if (set)
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_HI_OUT_SET);
+        }
+        else
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_HI_OUT_CLR);
+        }
+    }
+#endif
 }
 
 static inline bool rp23xx_gpio_get(uint32_t gpio)
 {
-  uint32_t value = 1 << gpio;
-
   DEBUGASSERT(gpio < RP23XX_GPIO_NUM);
 
+#if (RP23XX_GPIO_NUM <= 32)
+  uint32_t value = 1 << gpio;
   return (getreg32(RP23XX_SIO_GPIO_IN) & value) != 0;
+#else
+  if (gpio < 32)
+    {
+        uint32_t value = 1 << gpio;
+        return (getreg32(RP23XX_SIO_GPIO_IN) & value) != 0;
+    }
+  else
+    {
+        uint32_t value = 1 << (gpio -32);
+        return (getreg32(RP23XX_SIO_GPIO_HI_IN) & value) != 0;
+    }
+#endif
 }
 
 static inline void rp23xx_gpio_setdir(uint32_t gpio, int out)
 {
-  uint32_t value = 1 << gpio;
-
   DEBUGASSERT(gpio < RP23XX_GPIO_NUM);
 
+#if (RP23XX_GPIO_NUM <= 32)
+  uint32_t value = 1 << gpio;
+
   if (out)
     {
       putreg32(value, RP23XX_SIO_GPIO_OE_SET);
@@ -140,6 +179,31 @@ static inline void rp23xx_gpio_setdir(uint32_t gpio, int 
out)
     {
       putreg32(value, RP23XX_SIO_GPIO_OE_CLR);
     }
+#else
+  uint32_t mask = 1ul << (gpio & 0x1fu);
+  if (gpio < 32)
+    {
+        if (out)
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_OE_SET);
+        }
+        else
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_OE_CLR);
+        }
+    }
+    else
+    {
+        if (out)
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_HI_OE_SET);
+        }
+        else
+        {
+            putreg32(mask, RP23XX_SIO_GPIO_HI_OE_CLR);
+        }
+    }
+#endif
 }
 
 /****************************************************************************