simbit18 commented on code in PR #16428:
URL: https://github.com/apache/nuttx/pull/16428#discussion_r2104090609
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
Review Comment:
remove spaces and add a tab (116 to 119)
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
Review Comment:
remove spaces and add a tab line 108
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
Review Comment:
add two tabs
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
+
+endif
+
config BCM2711_SPI1
bool "SPI1"
+ depends on BCM2711_SPI
default n
---help---
- Enable the SPI1 interface.
+ Enable the SPI1 interface (auxiliary).
config BCM2711_SPI2
bool "SPI2"
default n
---help---
- Enable the SPI2 interface.
+ Enable the SPI2 interface (auxiliary).
+
+config BCM2711_SPI3
+ bool "SPI3"
+ depends on BCM2711_SPI
Review Comment:
add a tab 167
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
+
+endif
+
config BCM2711_SPI1
bool "SPI1"
+ depends on BCM2711_SPI
default n
---help---
- Enable the SPI1 interface.
+ Enable the SPI1 interface (auxiliary).
config BCM2711_SPI2
bool "SPI2"
default n
---help---
- Enable the SPI2 interface.
+ Enable the SPI2 interface (auxiliary).
+
+config BCM2711_SPI3
+ bool "SPI3"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI3 interface.
+
+config BCM2711_SPI4
+ bool "SPI4"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI4 interface.
+
+config BCM2711_SPI5
+ bool "SPI5"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI5 interface.
+
+config BCM2711_SPI6
+ bool "SPI6"
+ depends on BCM2711_SPI
Review Comment:
add a tab 188
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
Review Comment:
add two tabs 120
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
Review Comment:
add two tabs
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
Review Comment:
add a tab 137 to 140
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
Review Comment:
add a tab 123 to 126
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
Review Comment:
add two tabs
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
Review Comment:
add two tabs
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
Review Comment:
add a tab 130 to 133
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
Review Comment:
add a tab 144 to 147
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
+
+endif
+
config BCM2711_SPI1
bool "SPI1"
+ depends on BCM2711_SPI
Review Comment:
add a tab 154
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
+
+endif
+
config BCM2711_SPI1
bool "SPI1"
+ depends on BCM2711_SPI
default n
---help---
- Enable the SPI1 interface.
+ Enable the SPI1 interface (auxiliary).
config BCM2711_SPI2
bool "SPI2"
default n
---help---
- Enable the SPI2 interface.
+ Enable the SPI2 interface (auxiliary).
+
+config BCM2711_SPI3
+ bool "SPI3"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI3 interface.
+
+config BCM2711_SPI4
+ bool "SPI4"
+ depends on BCM2711_SPI
Review Comment:
add a tab 174
##########
arch/arm64/src/bcm2711/Kconfig:
##########
@@ -103,17 +103,92 @@ config BCM2711_SPI
if BCM2711_SPI
+config BCM2711_SPI0
+ bool "SPI0"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI0 interface.
+
+if BCM2711_SPI0
+
+config BCM2711_SPI0_CE0
+ int "CE0 GPIO"
+ depends on BCM2711_SPI0
+ default 8
+ ---help---
+ The GPIO pin for the chip enable 0 signal (8, 36, 43)
+
+config BCM2711_SPI0_CE1
+ int "CE1 GPIO"
+ depends on BCM2711_SPI0
+ default 7
+ ---help---
+ The GPIO pin for the chip enable 1 signal (7, 35, 44)
+
+config BCM2711_SPI0_MISO
+ int "MISO GPIO"
+ depends on BCM2711_SPI0
+ default 9
+ ---help---
+ The GPIO pin for the MISO signal (9, 37, 40)
+
+config BCM2711_SPI0_MOSI
+ int "MOSI GPIO"
+ depends on BCM2711_SPI0
+ default 10
+ ---help---
+ The GPIO pin for the MOSI signal (10, 38, 41)
+
+config BCM2711_SPI0_SCLK
+ int "SCLK GPIO"
+ depends on BCM2711_SPI0
+ default 11
+ ---help---
+ The GPIO pin for the SCLK signal (11, 39, 42)
+
+endif
+
config BCM2711_SPI1
bool "SPI1"
+ depends on BCM2711_SPI
default n
---help---
- Enable the SPI1 interface.
+ Enable the SPI1 interface (auxiliary).
config BCM2711_SPI2
bool "SPI2"
default n
---help---
- Enable the SPI2 interface.
+ Enable the SPI2 interface (auxiliary).
+
+config BCM2711_SPI3
+ bool "SPI3"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI3 interface.
+
+config BCM2711_SPI4
+ bool "SPI4"
+ depends on BCM2711_SPI
+ default n
+ ---help---
+ Enable the SPI4 interface.
+
+config BCM2711_SPI5
+ bool "SPI5"
+ depends on BCM2711_SPI
Review Comment:
add a tab 181
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