tmedicci opened a new pull request, #16108:
URL: https://github.com/apache/nuttx/pull/16108

   ## Summary
   
   * arch/risc-v/esp32h2: Set the default SPI flash frequency to 64MHz
   
   The default frequency for the SPI flash chip on ESP32-H2 is 64MHz. Although 
it was being set to 48MHz before this PR, this isn't a valid value. The device, 
however, must be flashed using 48MHz when 64MHz is set.
   
   ## Impact
   
   Impact on user: NO.
   
   Impact on build: NO.
   
   Impact on hardware: YES. Enable setting the correct SPI flash frequency and 
boot it properly.
   
   Impact on documentation: NO.
   
   Impact on security: NO.
   
   Impact on compatibility: NO.
   
   ## Testing
   
   Simply build the `esp32he-devkit:nsh` defconfig with 
`CONFIG_DEBUG_FEATURES=y` and check the boot log.
   
   ### Building
   
   ```
   make -j distclean && ./tools/configure.sh esp32h2-devkit:nsh && 
kconfig-tweak -e DEBUG_FEATURES && make olddefconfig && 
ESP_HAL_3RDPARTY_URL="g...@github.com:tmedicci/esp-hal-3rdparty.git" make flash 
ESPTOOL_PORT=/dev/ttyUSB0 -s -j$(nproc) && minicom -D /dev/ttyUSB0
   ```
   
   ### Running
   
   Just press the reset button and capture the boot log.
   
   ### Results
   
   Check the line with `I (73) boot.esp32h2: SPI Speed      : 64MHz`.
   
   ```
   ESP-ROM:esp32h2-20221101
   Build:Nov  1 2022
   rst:0x1 (POWERON),boot:0xc (SPI_FAST_FLASH_BOOT)
   SPIWP:0xee
   mode:DIO, clock div:1
   load:0x40800000,len:0x4aa4
   load:0x40804ab0,len:0x102c
   SHA-256 comparison failed:
   Calculated: 7e6a329da83a439e963e37212cf7e9223fa3d97dd497a079e8112f407efc1dde
   Expected: 00000000f0a40000000000000000000000000000000000000000000000000000
   Attempting to boot anyway...                                            
   entry 0x4080474c                                                        
   pmu_param(dbg): blk_version is less than 3, act dbias not burnt in efuse
   pmu_param(dbg): blk_version is less than 3, act dbias not burnt in efuse
   *** Booting NuttX ***
   D (53) bootloader_flash: non-XMC chip detected by SFDP Read (FF), skip.
   D (54) bootloader_flash: mmu set block paddr=0x00000000 (was 0xffffffff)
   I (56) boot: chip revision: v0.2
   D (59) boot.esp32h2: magic e9
   D (61) boot.esp32h2: segments 02
   D (64) boot.esp32h2: spi_mode 02
   D (67) boot.esp32h2: spi_speed 0f
   D (70) boot.esp32h2: spi_size 02
   I (73) boot.esp32h2: SPI Speed      : 64MHz
   I (77) boot.esp32h2: SPI Mode       : DIO
   I (81) boot.esp32h2: SPI Flash Size : 4MB
   I (85) boot: Enabling RNG early entropy source...
   dram: lma 0x00000020 vma 0x40800000 len 0x4aa4   (19108)
   dram: lma 0x00004acc vma 0x40804ab0 len 0x102c   (4140)
   padd: lma 0x00005b08 vma 0x00000000 len 0xa4f0   (42224)
   imap: lma 0x00010000 vma 0x42020000 len 0xae3c   (44604)
   D (109) bootloader_flash: mmu set block paddr=0x00010000 (was 0x00000000)
   padd: lma 0x0001ae44 vma 0x00000000 len 0x51b4   (20916)
   imap: lma 0x00020000 vma 0x42000000 len 0x1cf64  (118628)
   total segments stored 6
   pmu_param(dbg): blk_version is less than 3, act dbias not burnt in efuse
   pmu_param(dbg): blk_version is less than 3, act dbias not burnt in efuse
   pmu_param(dbg): blk_version is less than 3, act dbias not burnt in efuse
   D (155) clk: RTC_SLOW_CLK calibration value: 3610784
   NuttShell (NSH) NuttX-10.4.0
   nsh>
   ```


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