This is an automated email from the ASF dual-hosted git repository.
lupyuen pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit a99c1839f1d7293e27bdbf126578ac557ac8a388
Author: wangjianyu3 <wangjian...@xiaomi.com>
AuthorDate: Thu Mar 20 19:53:35 2025 +0800
boards/xtensa: Add support for szpi-esp32s3
Add configurations for nsh, adb, fastboot, etc.
Build & Burn
./tools/configure.sh -l lckfb-szpi-esp32s3:adb
make flash -j8 ESPTOOL_PORT=/dev/ttyUSB0
Signed-off-by: wangjianyu3 <wangjian...@xiaomi.com>
---
boards/Kconfig | 11 +
boards/xtensa/esp32s3/lckfb-szpi-esp32s3/Kconfig | 8 +
.../lckfb-szpi-esp32s3/configs/adb/defconfig | 31 ++
.../lckfb-szpi-esp32s3/configs/fastboot/defconfig | 18 +
.../lckfb-szpi-esp32s3/configs/nsh/defconfig | 48 ++
.../lckfb-szpi-esp32s3/configs/txtable/defconfig | 6 +
.../configs/usb_device/defconfig | 51 +++
.../esp32s3/lckfb-szpi-esp32s3/include/board.h | 54 +++
.../lckfb-szpi-esp32s3/include/board_memorymap.h | 118 +++++
.../esp32s3/lckfb-szpi-esp32s3/scripts/Make.defs | 57 +++
.../esp32s3/lckfb-szpi-esp32s3/src/Make.defs | 50 +++
.../esp32s3/lckfb-szpi-esp32s3/src/esp32s3-szpi.h | 181 ++++++++
.../lckfb-szpi-esp32s3/src/esp32s3_appinit.c | 82 ++++
.../lckfb-szpi-esp32s3/src/esp32s3_board_spi.c | 128 ++++++
.../esp32s3/lckfb-szpi-esp32s3/src/esp32s3_boot.c | 85 ++++
.../lckfb-szpi-esp32s3/src/esp32s3_bringup.c | 499 +++++++++++++++++++++
.../esp32s3/lckfb-szpi-esp32s3/src/esp32s3_gpio.c | 390 ++++++++++++++++
.../esp32s3/lckfb-szpi-esp32s3/src/esp32s3_reset.c | 87 ++++
.../lckfb-szpi-esp32s3/src/etc/init.d/rc.sysinit | 24 +
.../esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rcS | 31 ++
.../esp32s3/lckfb-szpi-esp32s3/src/etc/txtable.txt | 2 +
21 files changed, 1961 insertions(+)
diff --git a/boards/Kconfig b/boards/Kconfig
index caed909e28..ba9bd7d025 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -518,6 +518,13 @@ config ARCH_BOARD_ESP32S3_MEADOW
The ESP32-S3-Meadow is a small-sized board produced by
WildernessLabs
featuring the ESP32-S3 CPU with 32MiB Octal SPI PSRAM and 64
MiB flash.
+config ARCH_BOARD_ESP32S3_LCKFB_SZPI
+ bool "LCKFB SZPI ESP32-S3"
+ depends on ARCH_CHIP_ESP32S3WROOM1N16R8
+ select ARCH_HAVE_LEDS
+ select ARCH_HAVE_BUTTONS
+ select ARCH_HAVE_IRQBUTTONS if ESP32S3_GPIO_IRQ
+
config ARCH_BOARD_ESP32C6_DEVKITC
bool "Espressif ESP32-C6-DevKitC-1"
depends on ARCH_CHIP_ESP32C6WROOM1
@@ -3388,6 +3395,7 @@ config ARCH_BOARD
default "esp32s3-lhcbit" if ARCH_BOARD_ESP32S3_LHCBIT
default "esp32s3-box" if ARCH_BOARD_ESP32S3_BOX
default "esp32s3-korvo-2" if ARCH_BOARD_ESP32S3_KORVO_2
+ default "lckfb-szpi-esp32s3" if ARCH_BOARD_ESP32S3_LCKFB_SZPI
default "esp32c6-devkitc" if ARCH_BOARD_ESP32C6_DEVKITC
default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM
default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
@@ -4610,6 +4618,9 @@ endif
if ARCH_BOARD_ESP32S3_KORVO_2
source "boards/xtensa/esp32s3/esp32s3-korvo-2/Kconfig"
endif
+if ARCH_BOARD_ESP32S3_LCKFB_SZPI
+source "boards/xtensa/esp32s3/lckfb-szpi-esp32s3/Kconfig"
+endif
#if ARCH_BOARD_ESP32C6_DEVKITC
#source "boards/risc-v/esp32c6/esp32c6-devkitc/Kconfig"
#endif
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/Kconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/Kconfig
new file mode 100644
index 0000000000..8d353159eb
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_ESP32S3_LCKFB_SZPI
+
+endif # ARCH_BOARD_ESP32S3_LCKFB_SZPI
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/adb/defconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/adb/defconfig
new file mode 100644
index 0000000000..b7c2ec9ef9
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/adb/defconfig
@@ -0,0 +1,31 @@
+#include "../usb_device/defconfig"
+CONFIG_ADBD_FILE_SERVICE=y
+CONFIG_ADBD_SHELL_SERVICE=y
+CONFIG_ADBD_STACKSIZE=8192
+CONFIG_ADBD_USB_BOARDCTL=y
+CONFIG_ADBD_USB_SERVER=y
+CONFIG_CDCACM=n
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_MM=y
+CONFIG_ESP32S3_OTG_ENDPOINT_NUM=2
+CONFIG_ETC_ROMFS=y
+CONFIG_EXAMPLES_USBSERIAL=n
+CONFIG_FS_ROMFS=y
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_LIBUV=y
+CONFIG_MM_BACKTRACE=0
+CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=4096
+CONFIG_PSEUDOTERM=y
+CONFIG_PTHREAD_MUTEX_TYPES=y
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_CHILD_STATUS=y
+CONFIG_SCHED_HAVE_PARENT=y
+CONFIG_SCHED_HPWORKSTACKSIZE=8192
+CONFIG_STACK_COLORATION=y
+CONFIG_STACK_USAGE=y
+CONFIG_SYSLOG_CHARDEV=y
+CONFIG_SYSTEM_ADBD=y
+CONFIG_TLS_NCLEANUP=4
+CONFIG_TLS_NELEM=4
+CONFIG_TLS_TASK_NELEM=4
+CONFIG_USBADB=y
diff --git
a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/fastboot/defconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/fastboot/defconfig
new file mode 100644
index 0000000000..cf1ad5e2eb
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/fastboot/defconfig
@@ -0,0 +1,18 @@
+#include "../usb_device/defconfig"
+CONFIG_BCH=y
+CONFIG_BOARDCTL_USBDEVCTRL=y
+CONFIG_CDCACM=n
+CONFIG_ESP32S3_OTG_ENDPOINT_NUM=2
+CONFIG_ETC_ROMFS=y
+CONFIG_EXAMPLES_USBSERIAL=n
+CONFIG_FS_ROMFS=y
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_PIPES=y
+CONFIG_SCHED_CHILD_STATUS=y
+CONFIG_SCHED_HAVE_PARENT=y
+CONFIG_SYSTEM_FASTBOOTD=y
+CONFIG_SYSTEM_FASTBOOTD_SHELL=y
+CONFIG_SYSTEM_FASTBOOTD_USB_BOARDCTL=y
+CONFIG_SYSTEM_POPEN=y
+CONFIG_USBADB=y
+CONFIG_USBFASTBOOT=y
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/nsh/defconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/nsh/defconfig
new file mode 100644
index 0000000000..9f7a61d927
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/nsh/defconfig
@@ -0,0 +1,48 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that
includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_BOARD="lckfb-szpi-esp32s3"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32S3_LCKFB_SZPI=y
+CONFIG_ARCH_CHIP="esp32s3"
+CONFIG_ARCH_CHIP_ESP32S3=y
+CONFIG_ARCH_CHIP_ESP32S3WROOM1N16R8=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_XTENSA=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ESP32S3_UART0=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LINE_MAX=64
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_SYSLOG_BUFFER=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/txtable/defconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/txtable/defconfig
new file mode 100644
index 0000000000..ea44d97d21
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/txtable/defconfig
@@ -0,0 +1,6 @@
+#include "../adb/defconfig"
+CONFIG_BCH=y
+CONFIG_DEV_ZERO=y
+CONFIG_ESP32S3_SPIFLASH=y
+CONFIG_TXTABLE_DEFAULT_PARTITION=1
+CONFIG_TXTABLE_PARTITION=y
diff --git
a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/usb_device/defconfig
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/usb_device/defconfig
new file mode 100644
index 0000000000..0b0696ccf2
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/configs/usb_device/defconfig
@@ -0,0 +1,51 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that
includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_BOARD="lckfb-szpi-esp32s3"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32S3_LCKFB_SZPI=y
+CONFIG_ARCH_CHIP="esp32s3"
+CONFIG_ARCH_CHIP_ESP32S3=y
+CONFIG_ARCH_CHIP_ESP32S3WROOM1N16R8=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_XTENSA=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_CDCACM=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ESP32S3_OTG=y
+CONFIG_ESP32S3_UART0=y
+CONFIG_EXAMPLES_USBSERIAL=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=4096
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LINE_MAX=64
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_SYSLOG_BUFFER=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board.h
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board.h
new file mode 100644
index 0000000000..afe59061b5
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board.h
@@ -0,0 +1,54 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_H
+#define __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* The LCKFB SZPI ESP32-S3 board is fitted with a 40MHz crystal */
+
+#define BOARD_XTAL_FREQUENCY 40000000
+
+#ifdef CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
+# define BOARD_CLOCK_FREQUENCY (CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000)
+#else
+# define BOARD_CLOCK_FREQUENCY 80000000
+#endif
+
+/* LED definitions **********************************************************/
+
+/* Define how many LEDs this board has (needed by userleds) */
+
+#define BOARD_NLEDS 1
+
+/* GPIO pins used by the GPIO Subsystem */
+
+#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */
+#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
+
+#endif /* __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_H */
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board_memorymap.h
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board_memorymap.h
new file mode 100644
index 0000000000..3a745d7c26
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board_memorymap.h
@@ -0,0 +1,118 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/include/board_memorymap.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_MEMORYMAP_H
+#define __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_MEMORYMAP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Kernel ROM */
+
+#define KIROM_START (uintptr_t)__kirom_start
+#define KIROM_SIZE (uintptr_t)__kirom_size
+#define KDROM_START (uintptr_t)__kdrom_start
+#define KDROM_SIZE (uintptr_t)__kdrom_size
+
+/* Kernel RAM */
+
+#define KIRAM_START (uintptr_t)__kiram_start
+#define KIRAM_SIZE (uintptr_t)__kiram_size
+#define KIRAM_END (uintptr_t)__kiram_end
+#define KDRAM_START (uintptr_t)__kdram_start
+#define KDRAM_SIZE (uintptr_t)__kdram_size
+#define KDRAM_END (uintptr_t)__kdram_end
+
+/* Exception vectors */
+
+#define VECTORS_START (uintptr_t)__vectors_start
+#define VECTORS_END (uintptr_t)__vectors_end
+
+/* User ROM */
+
+#define UIROM_START (uintptr_t)__uirom_start
+#define UIROM_SIZE (uintptr_t)__uirom_size
+#define UIROM_END (uintptr_t)__uirom_end
+#define UDROM_START (uintptr_t)__udrom_start
+#define UDROM_SIZE (uintptr_t)__udrom_size
+#define UDROM_END (uintptr_t)__udrom_end
+
+/* User RAM */
+
+#define UIRAM_START (uintptr_t)__uiram_start
+#define UIRAM_SIZE (uintptr_t)__uiram_size
+#define UIRAM_END (uintptr_t)__uiram_end
+#define UDRAM_START (uintptr_t)__udram_start
+#define UDRAM_SIZE (uintptr_t)__udram_size
+#define UDRAM_END (uintptr_t)__udram_end
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Kernel ROM (RX) */
+
+extern uint8_t __kirom_start[];
+extern uint8_t __kirom_size[];
+extern uint8_t __kdrom_start[];
+extern uint8_t __kdrom_size[];
+
+/* Kernel RAM (RW) */
+
+extern uint8_t __kiram_start[];
+extern uint8_t __kiram_size[];
+extern uint8_t __kiram_end[];
+extern uint8_t __kdram_start[];
+extern uint8_t __kdram_size[];
+extern uint8_t __kdram_end[];
+
+/* Exception vectors */
+
+extern uint8_t __vectors_start[];
+extern uint8_t __vectors_end[];
+
+/* User ROM (RX) */
+
+extern uint8_t __uirom_start[];
+extern uint8_t __uirom_size[];
+extern uint8_t __uirom_end[];
+extern uint8_t __udrom_start[];
+extern uint8_t __udrom_size[];
+extern uint8_t __udrom_end[];
+
+/* User RAM (RW) */
+
+extern uint8_t __uiram_start[];
+extern uint8_t __uiram_size[];
+extern uint8_t __uiram_end[];
+extern uint8_t __udram_start[];
+extern uint8_t __udram_size[];
+extern uint8_t __udram_end[];
+
+#endif /* __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_INCLUDE_BOARD_MEMORYMAP_H
*/
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/scripts/Make.defs
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/scripts/Make.defs
new file mode 100644
index 0000000000..ff7559bb64
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/scripts/Make.defs
@@ -0,0 +1,57 @@
+############################################################################
+# boards/xtensa/esp32s3/lckfb-szpi-esp32s3/scripts/Make.defs
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/tools/esp32s3/Config.mk
+include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
+
+ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
+ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
+
+# Pick the linker scripts from the board level if they exist, if not
+# pick the common linker scripts.
+
+ifeq ($(CONFIG_BUILD_PROTECTED),y)
+ ARCHSCRIPT += $(call FINDSCRIPT,protected_memory.ld)
+ ARCHSCRIPT += $(call FINDSCRIPT,kernel-space.ld)
+else
+ ARCHSCRIPT += $(call FINDSCRIPT,flat_memory.ld)
+ ifneq ($(CONFIG_ESP32S3_APP_FORMAT_LEGACY),y)
+ ARCHSCRIPT += $(call FINDSCRIPT,esp32s3_sections.ld)
+ else
+ ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
+ endif
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += -fno-strength-reduce
+endif
+
+ARCHPICFLAGS = -fpic
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES)
$(ARCHDEFINES) $(EXTRAFLAGS)
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS)
$(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/Make.defs
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/Make.defs
new file mode 100644
index 0000000000..b9c192b661
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/Make.defs
@@ -0,0 +1,50 @@
+############################################################################
+# boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/Make.defs
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+CSRCS = esp32s3_boot.c esp32s3_bringup.c
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += esp32s3_appinit.c
+ifeq ($(CONFIG_BOARDCTL_RESET),y)
+CSRCS += esp32s3_reset.c
+endif
+endif
+
+ifeq ($(CONFIG_ESP32S3_SPI),y)
+CSRCS += esp32s3_board_spi.c
+endif
+
+ifeq ($(CONFIG_DEV_GPIO),y)
+CSRCS += esp32s3_gpio.c
+endif
+
+DEPPATH += --dep-path board
+VPATH += :board
+CFLAGS +=
${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board
+
+ifeq ($(CONFIG_ETC_ROMFS),y)
+RCSRCS = etc/init.d/rc.sysinit etc/init.d/rcS
+
+ifeq ($(CONFIG_TXTABLE_PARTITION),y)
+RCRAWS = etc/txtable.txt
+endif # CONFIG_TXTABLE_PARTITION
+endif
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3-szpi.h
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3-szpi.h
new file mode 100644
index 0000000000..6dfff00005
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3-szpi.h
@@ -0,0 +1,181 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3-szpi.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_SRC_ESP32S3_DEVKIT_H
+#define __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_SRC_ESP32S3_DEVKIT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_bringup
+ *
+ * Description:
+ * Perform architecture-specific initialization
+ *
+ * CONFIG_BOARD_LATE_INITIALIZE=y :
+ * Called from board_late_initialize().
+ *
+ * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
+ * Called from the NSH library via board_app_initialize()
+ *
+ ****************************************************************************/
+
+int esp32s3_bringup(void);
+
+/****************************************************************************
+ * Name: esp32s3_gpio_init
+ *
+ * Description:
+ * Configure the GPIO driver.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; A negated errno value is returned
+ * to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_GPIO
+int esp32s3_gpio_init(void);
+#endif
+
+/****************************************************************************
+ * Name: board_spiflash_init
+ *
+ * Description:
+ * Initialize the SPIFLASH and register the MTD device.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPIFLASH
+int board_spiflash_init(void);
+#endif
+
+/****************************************************************************
+ * Name: board_i2c_init
+ *
+ * Description:
+ * Configure the I2C driver.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; A negated errno value is returned
+ * to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_I2C_DRIVER
+int board_i2c_init(void);
+#endif
+
+/****************************************************************************
+ * Name: board_bmp180_initialize
+ *
+ * Description:
+ * Initialize and register the BMP180 Pressure Sensor driver.
+ *
+ * Input Parameters:
+ * devno - The device number, used to build the device path as /dev/pressN
+ * busno - The I2C bus number
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SENSORS_BMP180
+int board_bmp180_initialize(int devno, int busno);
+#endif
+
+/****************************************************************************
+ * Name: board_i2sdev_initialize
+ *
+ * Description:
+ * This function is called by platform-specific, setup logic to configure
+ * and register the generic I2S audio driver. This function will register
+ * the driver as /dev/audio/pcm[x] where x is determined by the I2S port
+ * number.
+ *
+ * Input Parameters:
+ * port - The I2S port used for the device
+ * enable_tx - Register device as TX if true
+ * enable_rx - Register device as RX if true
+ *
+ * Returned Value:
+ * Zero is returned on success. Otherwise, a negated errno value is
+ * returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_I2S
+int board_i2sdev_initialize(int port, bool enable_tx, bool enable_rx);
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_cs4344_initialize
+ *
+ * Description:
+ * This function is called by platform-specific, setup logic to configure
+ * and register the CS4344 device. This function will register the driver
+ * as /dev/audio/pcm[x] where x is determined by the I2S port number.
+ *
+ * Input Parameters:
+ * port - The I2S port used for the device
+ *
+ * Returned Value:
+ * Zero is returned on success. Otherwise, a negated errno value is
+ * returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_AUDIO_CS4344
+int esp32s3_cs4344_initialize(int port);
+#endif
+
+#ifdef CONFIG_ESP32S3_OPENETH
+int esp_openeth_initialize(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_XTENSA_ESP32S3_LCKFB_SZPI_ESP32S3_SRC_ESP32S3_DEVKIT_H */
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_appinit.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_appinit.c
new file mode 100644
index 0000000000..1d35812866
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_appinit.c
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_appinit.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <nuttx/board.h>
+
+#include "esp32s3-szpi.h"
+
+#ifdef CONFIG_BOARDCTL
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initialization logic and the
+ * matching application logic. The value could be such things as a
+ * mode enumeration value, a set of DIP switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+ /* Board initialization already performed by board_late_initialize() */
+
+ return OK;
+#else
+ /* Perform board-specific initialization */
+
+ return esp32s3_bringup();
+#endif
+}
+
+#endif /* CONFIG_BOARDCTL */
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_board_spi.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_board_spi.c
new file mode 100644
index 0000000000..8bc3a3bcf5
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_board_spi.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_board_spi.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+
+#include "esp32s3_gpio.h"
+#include "esp32s3-szpi.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_spi2_status
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPI2
+
+uint8_t esp32s3_spi2_status(struct spi_dev_s *dev, uint32_t devid)
+{
+ uint8_t status = 0;
+
+ return status;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi2_cmddata
+ ****************************************************************************/
+
+#if defined(CONFIG_ESP32S3_SPI2) && defined(CONFIG_SPI_CMDDATA)
+
+int esp32s3_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ if (devid == SPIDEV_DISPLAY(0))
+ {
+ /* This is the Data/Command control pad which determines whether the
+ * data bits are data or a command.
+ */
+
+ esp32s3_gpiowrite(GPIO_LCD_DC, !cmd);
+
+ return OK;
+ }
+
+ spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" :
+ "data");
+
+ return -ENODEV;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi3_status
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPI3
+
+uint8_t esp32s3_spi3_status(struct spi_dev_s *dev, uint32_t devid)
+{
+ uint8_t status = 0;
+
+ return status;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi3_cmddata
+ ****************************************************************************/
+
+#if defined(CONFIG_ESP32S3_SPI3) && defined(CONFIG_SPI_CMDDATA)
+
+int esp32s3_spi3_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ if (devid == SPIDEV_DISPLAY(0))
+ {
+ /* This is the Data/Command control pad which determines whether the
+ * data bits are data or a command.
+ */
+
+ esp32s3_gpiowrite(CONFIG_ESP32S3_SPI3_MISOPIN, !cmd);
+
+ return OK;
+ }
+
+ spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" :
+ "data");
+
+ return -ENODEV;
+}
+
+#endif
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_boot.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_boot.c
new file mode 100644
index 0000000000..20e5cd6941
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_boot.c
@@ -0,0 +1,85 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_boot.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <nuttx/mm/mm.h>
+#include <arch/board/board.h>
+
+#include "esp32s3-szpi.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_board_initialize
+ *
+ * Description:
+ * All ESP32-S3 boards must provide the following entry point.
+ * This entry point is called early in the initialization -- after all
+ * memory has been configured and mapped but before any devices have been
+ * initialized.
+ *
+ ****************************************************************************/
+
+void esp32s3_board_initialize(void)
+{
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ * initialization call will be performed in the boot-up sequence to a
+ * function called board_late_initialize(). board_late_initialize() will
+ * be called immediately after up_initialize() is called and just before
+ * the initial application is started. This additional initialization
+ * phase may be used, for example, to initialize board-specific device
+ * drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+ /* Perform board-specific initialization */
+
+ esp32s3_bringup();
+}
+#endif
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_bringup.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_bringup.c
new file mode 100644
index 0000000000..c759ddbc03
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_bringup.c
@@ -0,0 +1,499 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_bringup.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <fcntl.h>
+#include <unistd.h>
+#include <syslog.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <stdio.h>
+
+#include <errno.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/himem/himem.h>
+#include <arch/board/board.h>
+
+#ifdef CONFIG_ESP32S3_TIMER
+# include "esp32s3_board_tim.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI
+# include "esp32s3_board_wlan.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_BLE
+# include "esp32s3_ble.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
+# include "esp32s3_wifi_adapter.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_RT_TIMER
+# include "esp32s3_rt_timer.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_I2C
+# include "esp32s3_i2c.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_I2S
+# include "esp32s3_i2s.h"
+#endif
+
+#ifdef CONFIG_WATCHDOG
+# include "esp32s3_board_wdt.h"
+#endif
+
+#ifdef CONFIG_RTC_DRIVER
+# include "esp32s3_rtc_lowerhalf.h"
+#endif
+
+#ifdef CONFIG_VIDEO_FB
+#include <nuttx/video/fb.h>
+#endif
+
+#ifdef CONFIG_ESP32S3_EFUSE
+# include "esp32s3_efuse.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_PARTITION_TABLE
+# include "esp32s3_partition.h"
+#endif
+
+#ifdef CONFIG_ESP_MCPWM
+# include "esp32s3_board_mcpwm.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_SPI
+#include "esp32s3_spi.h"
+#include "esp32s3_board_spidev.h"
+# ifdef CONFIG_ESPRESSIF_SPI_BITBANG
+# include "espressif/esp_spi_bitbang.h"
+# endif
+#endif
+
+#ifdef CONFIG_ESP32S3_SDMMC
+#include "esp32s3_board_sdmmc.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_AES_ACCELERATOR
+# include "esp32s3_aes.h"
+#endif
+
+#ifdef CONFIG_ESP32S3_ADC
+#include "esp32s3_board_adc.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_TEMP
+# include "espressif/esp_temperature_sensor.h"
+#endif
+
+#ifdef CONFIG_ESP_PCNT
+# include "espressif/esp_pcnt.h"
+# include "esp32s3_board_pcnt.h"
+#endif
+
+#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
+# include "espressif/esp_nxdiag.h"
+#endif
+
+#include "esp32s3-szpi.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_bringup
+ *
+ * Description:
+ * Perform architecture-specific initialization
+ *
+ * CONFIG_BOARD_LATE_INITIALIZE=y :
+ * Called from board_late_initialize().
+ *
+ * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ * Called from the NSH library
+ *
+ ****************************************************************************/
+
+int esp32s3_bringup(void)
+{
+ int ret;
+#if (defined(CONFIG_ESP32S3_I2S0) && !defined(CONFIG_AUDIO_CS4344)) || \
+ defined(CONFIG_ESP32S3_I2S1)
+ bool i2s_enable_tx;
+ bool i2s_enable_rx;
+#endif
+
+#if defined(CONFIG_ESP32S3_SPIRAM) && \
+ defined(CONFIG_ESP32S3_SPIRAM_BANKSWITCH_ENABLE)
+ ret = esp_himem_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to init HIMEM: %d\n", ret);
+ }
+#endif
+
+#if defined(CONFIG_ESP32S3_SPI) && defined(CONFIG_SPI_DRIVER)
+ #ifdef CONFIG_ESP32S3_SPI2
+ ret = board_spidev_initialize(ESP32S3_SPI2);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret);
+ }
+ #endif
+
+ #ifdef CONFIG_ESP32S3_SPI3
+ ret = board_spidev_initialize(ESP32S3_SPI3);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret);
+ }
+ #endif
+
+ #ifdef CONFIG_ESPRESSIF_SPI_BITBANG
+ ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret);
+ }
+ #endif /* CONFIG_ESPRESSIF_SPI_BITBANG */
+#endif /* CONFIG_ESP32S3_SPI && CONFIG_SPI_DRIVER*/
+
+#if defined(CONFIG_ESP32S3_EFUSE)
+ ret = esp32s3_efuse_initialize("/dev/efuse");
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_FS_PROCFS
+ /* Mount the procfs file system */
+
+ ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_FS_TMPFS
+ /* Mount the tmpfs file system */
+
+ ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to mount tmpfs at %s: %d\n",
+ CONFIG_LIBC_TMPDIR, ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_TIMER
+ /* Configure general purpose timers */
+
+ ret = board_tim_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize timers: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_SPIFLASH
+ ret = board_spiflash_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n");
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_PARTITION_TABLE
+ ret = esp32s3_partition_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n",
+ ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_RT_TIMER
+ ret = esp32s3_rt_timer_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_TEMP
+ struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50);
+ ret = esp_temperature_sensor_initialize(cfg);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize temperature sensor driver: %d\n",
+ ret);
+ }
+#endif
+
+#ifdef CONFIG_RTC_DRIVER
+ /* Instantiate the ESP32-S3 RTC driver */
+
+ ret = esp32s3_rtc_driverinit();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR,
+ "ERROR: Failed to Instantiate the RTC driver: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_WATCHDOG
+ /* Configure watchdog timer */
+
+ ret = board_wdt_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize watchdog timer: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_I2C_DRIVER
+ /* Configure I2C peripheral interfaces */
+
+ ret = board_i2c_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_SENSORS_BMP180
+ /* Try to register BMP180 device in I2C0 */
+
+ ret = board_bmp180_initialize(0, ESP32S3_I2C0);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR,
+ "Failed to initialize BMP180 driver for I2C0: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_I2S
+
+#ifdef CONFIG_AUDIO_CS4344
+
+ /* Configure CS4344 audio on I2S0 */
+
+ ret = esp32s3_cs4344_initialize(ESP32S3_I2S0);
+ if (ret != OK)
+ {
+ syslog(LOG_ERR, "Failed to initialize CS4344 audio: %d\n", ret);
+ }
+#else
+
+#ifdef CONFIG_ESP32S3_I2S0_TX
+ i2s_enable_tx = true;
+#else
+ i2s_enable_tx = false;
+#endif /* CONFIG_ESP32S3_I2S0_TX */
+
+#ifdef CONFIG_ESP32S3_I2S0_RX
+ i2s_enable_rx = true;
+#else
+ i2s_enable_rx = false;
+#endif /* CONFIG_ESP32S3_I2S0_RX */
+
+ /* Configure I2S generic audio on I2S0 */
+
+ ret = board_i2sdev_initialize(ESP32S3_I2S0, i2s_enable_tx, i2s_enable_rx);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize I2S0 driver: %d\n", ret);
+ }
+#endif /* CONFIG_AUDIO_CS4344 */
+
+#ifdef CONFIG_ESP32S3_I2S1
+
+#ifdef CONFIG_ESP32S3_I2S1_TX
+ i2s_enable_tx = true;
+#else
+ i2s_enable_tx = false;
+#endif /* CONFIG_ESP32S3_I2S1_TX */
+
+#ifdef CONFIG_ESP32S3_I2S1_RX
+ i2s_enable_rx = true;
+#else
+ i2s_enable_rx = false;
+#endif /* CONFIG_ESP32S3_I2S1_RX */
+
+ /* Configure I2S generic audio on I2S1 */
+
+ ret = board_i2sdev_initialize(ESP32S3_I2S1, i2s_enable_tx, i2s_enable_rx);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize I2S%d driver: %d\n",
+ CONFIG_ESP32S3_I2S1, ret);
+ }
+
+#endif /* CONFIG_ESP32S3_I2S1 */
+
+#endif /* CONFIG_ESP32S3_I2S */
+
+#ifdef CONFIG_ESPRESSIF_WIRELESS
+
+#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
+ ret = esp_wifi_bt_coexist_init();
+ if (ret)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi and BT coexist\n");
+ }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_BLE
+ ret = esp32s3_ble_initialize();
+ if (ret)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n");
+ }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI
+ ret = board_wlan_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n",
+ ret);
+ }
+#endif
+
+#endif
+
+#ifdef CONFIG_ESP32S3_OPENETH
+ ret = esp_openeth_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize Open ETH ethernet.\n");
+ }
+#endif
+
+#ifdef CONFIG_DEV_GPIO
+ ret = esp32s3_gpio_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_VIDEO_FB
+ ret = fb_register(0, 0);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize Frame Buffer Driver.\n");
+ }
+#elif defined(CONFIG_LCD)
+ ret = board_lcd_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize LCD.\n");
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_SDMMC
+ ret = board_sdmmc_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize SDMMC: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP32S3_AES_ACCELERATOR
+ ret = esp32s3_aes_init();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize AES: %d\n", ret);
+ }
+#ifdef CONFIG_ESP32S3_AES_ACCELERATOR_TEST
+ else
+ {
+ esp32s3_aes_test();
+ }
+#endif
+#endif
+
+#ifdef CONFIG_ESP32S3_ADC
+ /* Configure ADC */
+
+ ret = board_adc_init();
+ if (ret)
+ {
+ syslog(LOG_ERR, "ERROR: board_adc_init() failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP_MCPWM_CAPTURE
+ ret = board_capture_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: board_capture_initialize failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP_MCPWM_MOTOR_BDC
+ ret = board_motor_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: board_motor_initialize failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ESP_PCNT
+ ret = board_pcnt_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: board_pcnt_initialize failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
+ ret = esp_nxdiag_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: esp_nxdiag_initialize failed: %d\n", ret);
+ }
+#endif
+
+ /* If we got here then perhaps not all initialization was successful, but
+ * at least enough succeeded to bring-up NSH with perhaps reduced
+ * capabilities.
+ */
+
+ UNUSED(ret);
+ return OK;
+}
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_gpio.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_gpio.c
new file mode 100644
index 0000000000..8cdb4bb10a
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_gpio.c
@@ -0,0 +1,390 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_gpio.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <nuttx/irq.h>
+#include <arch/irq.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/ioexpander/gpio.h>
+
+#include <arch/board/board.h>
+
+#include "esp32s3-szpi.h"
+#include "esp32s3_gpio.h"
+#include "hardware/esp32s3_gpio_sigmap.h"
+
+#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_ESP32S3_GPIO_IRQ) && BOARD_NGPIOINT > 0
+# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled"
+#endif
+
+/* Output pins. GPIO15 is used as an example, any other outputs could be
+ * used.
+ */
+
+#define GPIO_OUT1 15
+
+/* Input pins. GPIO18 is used as an example, any other inputs could be
+ * used.
+ */
+
+#define GPIO_IN1 18
+
+/* Interrupt pins. GPIO21 is used as an example, any other inputs could be
+ * used.
+ */
+
+#define GPIO_IRQPIN1 21
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct esp32s3gpio_dev_s
+{
+ struct gpio_dev_s gpio;
+ uint8_t id;
+};
+
+struct esp32s3gpint_dev_s
+{
+ struct esp32s3gpio_dev_s esp32s3gpio;
+ pin_interrupt_t callback;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(struct gpio_dev_s *dev, bool *value);
+static int gpout_write(struct gpio_dev_s *dev, bool value);
+#endif
+
+#if BOARD_NGPIOIN > 0
+static int gpin_read(struct gpio_dev_s *dev, bool *value);
+#endif
+
+#if BOARD_NGPIOINT > 0
+static int gpint_read(struct gpio_dev_s *dev, bool *value);
+static int gpint_attach(struct gpio_dev_s *dev,
+ pin_interrupt_t callback);
+static int gpint_enable(struct gpio_dev_s *dev, bool enable);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static const struct gpio_operations_s gpout_ops =
+{
+ .go_read = gpout_read,
+ .go_write = gpout_write,
+ .go_attach = NULL,
+ .go_enable = NULL,
+};
+
+/* This array maps the GPIO pins used as OUTPUT */
+
+static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
+{
+ GPIO_OUT1
+};
+
+static struct esp32s3gpio_dev_s g_gpout[BOARD_NGPIOOUT];
+#endif
+
+#if BOARD_NGPIOIN > 0
+static const struct gpio_operations_s gpin_ops =
+{
+ .go_read = gpin_read,
+ .go_write = NULL,
+ .go_attach = NULL,
+ .go_enable = NULL,
+};
+
+/* This array maps the GPIO pins used as INTERRUPT INPUTS */
+
+static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
+{
+ GPIO_IN1
+};
+
+static struct esp32s3gpio_dev_s g_gpin[BOARD_NGPIOIN];
+#endif
+
+#if BOARD_NGPIOINT > 0
+static const struct gpio_operations_s gpint_ops =
+{
+ .go_read = gpint_read,
+ .go_write = NULL,
+ .go_attach = gpint_attach,
+ .go_enable = gpint_enable,
+};
+
+/* This array maps the GPIO pins used as INTERRUPT INPUTS */
+
+static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
+{
+ GPIO_IRQPIN1,
+};
+
+static struct esp32s3gpint_dev_s g_gpint[BOARD_NGPIOINT];
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpout_read
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(struct gpio_dev_s *dev, bool *value)
+{
+ struct esp32s3gpio_dev_s *esp32s3gpio = (struct esp32s3gpio_dev_s *)dev;
+
+ DEBUGASSERT(esp32s3gpio != NULL && value != NULL);
+ DEBUGASSERT(esp32s3gpio->id < BOARD_NGPIOOUT);
+ gpioinfo("Reading...\n");
+
+ *value = esp32s3_gpioread(g_gpiooutputs[esp32s3gpio->id]);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: gpout_write
+ ****************************************************************************/
+
+static int gpout_write(struct gpio_dev_s *dev, bool value)
+{
+ struct esp32s3gpio_dev_s *esp32s3gpio = (struct esp32s3gpio_dev_s *)dev;
+
+ DEBUGASSERT(esp32s3gpio != NULL);
+ DEBUGASSERT(esp32s3gpio->id < BOARD_NGPIOOUT);
+ gpioinfo("Writing %d\n", (int)value);
+
+ esp32s3_gpiowrite(g_gpiooutputs[esp32s3gpio->id], value);
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: gpin_read
+ ****************************************************************************/
+
+#if BOARD_NGPIOIN > 0
+static int gpin_read(struct gpio_dev_s *dev, bool *value)
+{
+ struct esp32s3gpio_dev_s *esp32s3gpio = (struct esp32s3gpio_dev_s *)dev;
+
+ DEBUGASSERT(esp32s3gpio != NULL && value != NULL);
+ DEBUGASSERT(esp32s3gpio->id < BOARD_NGPIOIN);
+ gpioinfo("Reading... pin %d\n", g_gpioinputs[esp32s3gpio->id]);
+
+ *value = esp32s3_gpioread(g_gpioinputs[esp32s3gpio->id]);
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: esp32s3gpio_interrupt
+ ****************************************************************************/
+
+#if BOARD_NGPIOINT > 0
+static int esp32s3gpio_interrupt(int irq, void *context, void *arg)
+{
+ struct esp32s3gpint_dev_s *esp32s3gpint = (struct esp32s3gpint_dev_s *)arg;
+
+ DEBUGASSERT(esp32s3gpint != NULL && esp32s3gpint->callback != NULL);
+ gpioinfo("Interrupt! callback=%p\n", esp32s3gpint->callback);
+
+ esp32s3gpint->callback(&esp32s3gpint->esp32s3gpio.gpio,
+ esp32s3gpint->esp32s3gpio.id);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_read
+ ****************************************************************************/
+
+static int gpint_read(struct gpio_dev_s *dev, bool *value)
+{
+ struct esp32s3gpint_dev_s *esp32s3gpint = (struct esp32s3gpint_dev_s *)dev;
+
+ DEBUGASSERT(esp32s3gpint != NULL && value != NULL);
+ DEBUGASSERT(esp32s3gpint->esp32s3gpio.id < BOARD_NGPIOINT);
+ gpioinfo("Reading int pin...\n");
+
+ *value = esp32s3_gpioread(g_gpiointinputs[esp32s3gpint->esp32s3gpio.id]);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_attach
+ ****************************************************************************/
+
+static int gpint_attach(struct gpio_dev_s *dev,
+ pin_interrupt_t callback)
+{
+ struct esp32s3gpint_dev_s *esp32s3gpint =
+ (struct esp32s3gpint_dev_s *)dev;
+ int irq = ESP32S3_PIN2IRQ(g_gpiointinputs[esp32s3gpint->esp32s3gpio.id]);
+ int ret;
+
+ gpioinfo("Attaching the callback\n");
+
+ /* Make sure the interrupt is disabled */
+
+ esp32s3_gpioirqdisable(irq);
+ ret = irq_attach(irq,
+ esp32s3gpio_interrupt,
+ &g_gpint[esp32s3gpint->esp32s3gpio.id]);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret);
+ return ret;
+ }
+
+ gpioinfo("Attach %p\n", callback);
+ esp32s3gpint->callback = callback;
+ return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_enable
+ ****************************************************************************/
+
+static int gpint_enable(struct gpio_dev_s *dev, bool enable)
+{
+ struct esp32s3gpint_dev_s *esp32s3gpint = (struct esp32s3gpint_dev_s *)dev;
+ int irq = ESP32S3_PIN2IRQ(g_gpiointinputs[esp32s3gpint->esp32s3gpio.id]);
+
+ if (enable)
+ {
+ if (esp32s3gpint->callback != NULL)
+ {
+ gpioinfo("Enabling the interrupt\n");
+
+ /* Configure the interrupt for rising edge */
+
+ esp32s3_gpioirqenable(irq, RISING);
+ }
+ }
+ else
+ {
+ gpioinfo("Disable the interrupt\n");
+ esp32s3_gpioirqdisable(irq);
+ }
+
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_gpio_init
+ ****************************************************************************/
+
+int esp32s3_gpio_init(void)
+{
+ int pincount = 0;
+ int i;
+
+#if BOARD_NGPIOOUT > 0
+ for (i = 0; i < BOARD_NGPIOOUT; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
+ g_gpout[i].gpio.gp_ops = &gpout_ops;
+ g_gpout[i].id = i;
+ gpio_pin_register(&g_gpout[i].gpio, pincount);
+
+ /* Configure the pins that will be used as output */
+
+ esp32s3_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
+ esp32s3_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_2 |
+ INPUT_FUNCTION_2);
+ esp32s3_gpiowrite(g_gpiooutputs[i], 0);
+
+ pincount++;
+ }
+#endif
+
+#if BOARD_NGPIOIN > 0
+ for (i = 0; i < BOARD_NGPIOIN; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
+ g_gpin[i].gpio.gp_ops = &gpin_ops;
+ g_gpin[i].id = i;
+ gpio_pin_register(&g_gpin[i].gpio, pincount);
+
+ /* Configure the pins that will be used as INPUT */
+
+ esp32s3_configgpio(g_gpioinputs[i], INPUT_FUNCTION_2);
+
+ pincount++;
+ }
+#endif
+
+#if BOARD_NGPIOINT > 0
+ for (i = 0; i < BOARD_NGPIOINT; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpint[i].esp32s3gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
+ g_gpint[i].esp32s3gpio.gpio.gp_ops = &gpint_ops;
+ g_gpint[i].esp32s3gpio.id = i;
+ gpio_pin_register(&g_gpint[i].esp32s3gpio.gpio, pincount);
+
+ /* Configure the pins that will be used as interrupt input */
+
+ esp32s3_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_2 | PULLDOWN);
+
+ pincount++;
+ }
+#endif
+
+ return OK;
+}
+#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_reset.c
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_reset.c
new file mode 100644
index 0000000000..5b438315bd
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_reset.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/esp32s3_reset.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdlib.h>
+#include <debug.h>
+#include <assert.h>
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#include "esp32s3_systemreset.h"
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+#if CONFIG_BOARD_ASSERT_RESET_VALUE == EXIT_SUCCESS
+# error "CONFIG_BOARD_ASSERT_RESET_VALUE must not be equal to EXIT_SUCCESS"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ * Reset board. Support for this function is required by board-level
+ * logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ * status - Status information provided with the reset event. This
+ * meaning of this status information is board-specific. If not
+ * used by a board, the value zero may be provided in calls to
+ * board_reset().
+ *
+ * Returned Value:
+ * If this function returns, then it was not possible to power-off the
+ * board due to some constraints. The return value in this case is a
+ * board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+
+int board_reset(int status)
+{
+ syslog(LOG_INFO, "reboot status=%d\n", status);
+
+ switch (status)
+ {
+ case EXIT_SUCCESS:
+ up_shutdown_handler();
+ break;
+ case CONFIG_BOARD_ASSERT_RESET_VALUE:
+ break;
+ default:
+ break;
+ }
+
+ up_systemreset();
+
+ return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rc.sysinit
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rc.sysinit
new file mode 100644
index 0000000000..9e5496e2ab
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rc.sysinit
@@ -0,0 +1,24 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rc.sysinit
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rcS
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rcS
new file mode 100644
index 0000000000..1e043aa976
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rcS
@@ -0,0 +1,31 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/init.d/rcS
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifdef CONFIG_SYSTEM_ADBD
+adbd &
+#endif
+
+#ifdef CONFIG_SYSTEM_FASTBOOTD
+fastbootd &
+#endif
diff --git a/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/txtable.txt
b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/txtable.txt
new file mode 100644
index 0000000000..903b1684fe
--- /dev/null
+++ b/boards/xtensa/esp32s3/lckfb-szpi-esp32s3/src/etc/txtable.txt
@@ -0,0 +1,2 @@
+TXTABLE0
+data 0x100000 0
