fdcavalcanti opened a new pull request, #15882:
URL: https://github.com/apache/nuttx/pull/15882

   This fixes build warnings when different archs are used. Simply changes "lx" 
to "PRIx32" when using uint32_t.
   
   ## Summary
   
   Changed format specifiers from `%08x` to `PRIx32` for better compatibility 
with long data types.
   Affects only a few log lines.
   
   ## Impact
   
   Impact on user: NO.
   
   Impact on build: NO.
   
   Impact on hardware: NO.
   
   Impact on documentation: NO.
   
   Impact on security: NO.
   
   Impact on compatibility: NO.
   
   ## Testing
   
   This test simply builds the binary and checks for compilation errors.
   Unfortunately I don't have this device to test (requires external LAN9250).
   
   ### Building
   1. ./tools/configure.sh esp32s3-devkit:eth_lan9250
   2. make
   
   ### Results
   No build errors.
   
   ```
   CPP:  
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld->
 
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ldCPP:
  
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.libgcc.ld->
 
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.libCPP:
  
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.newlib.ld->
 
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.newCPP:
  
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/esp32s3/ld/esp32s3.rom.version.ld->
 
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/esp_rom/
 esp32s3/ld/esp32s3.rom.veCPP:  
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/soc/esp32s3/ld/esp32s3.peripherals.ld->
 
/home/fdcavalcanti/nuttxspace3/nuttx/arch/xtensa/src/chip/esp-hal-3rdparty/components/soc/esp32s3/ld/esp32s3.peripherals.ldLD:
 nuttx
   Memory region         Used Size  Region Size  %age Used
                ROM:      299075 B    4194272 B      7.13%
        iram0_0_seg:       20992 B       304 KB      6.74%
        irom0_0_seg:      364611 B    4194272 B      8.69%
        dram0_0_seg:       33392 B       288 KB     11.32%
        drom0_0_seg:      115912 B    4194272 B      2.76%
       rtc_iram_seg:          0 GB       8168 B      0.00%
       rtc_data_seg:          0 GB       8168 B      0.00%
   rtc_reserved_seg:          0 GB         24 B      0.00%
       rtc_slow_seg:          0 GB         8 KB      0.00%
   CP: nuttx.hex
   MKIMAGE: ESP32-S3 binary
   esptool.py -c esp32s3 elf2image --ram-only-header -fs 4MB -fm dio -ff 40m -o 
nuttx.bin nuttx
   esptool.py v4.8.1
   Creating esp32s3 image...
   Image has only RAM segments visible. ROM segments are hidden and SHA256 
digest is not appended.
   Merged 1 ELF section
   Successfully created esp32s3 image.
   Generated: nuttx.bin
   esptool.py -c esp32s3 merge_bin --output nuttx.merged.bin --fill-flash-size 
4MB -fm dio -ff 40m  0x0000 nuttx.bin
   esptool.py v4.8.1
   Wrote 0x400000 bytes to file nuttx.merged.bin, ready to flash to offset 0x0
   Generated: nuttx.merged.bin
   ```


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