anchao commented on code in PR #15848: URL: https://github.com/apache/nuttx/pull/15848#discussion_r1958367568
########## arch/arm/include/spinlock.h: ########## @@ -42,33 +42,13 @@ #define SP_UNLOCKED 0 /* The Un-locked state */ #define SP_LOCKED 1 /* The Locked state */ -/* Memory barriers for use with NuttX spinlock logic - * - * Data Memory Barrier (DMB) acts as a memory barrier. It ensures that all - * explicit memory accesses that appear in program order before the DMB - * instruction are observed before any explicit memory accesses that appear - * in program order after the DMB instruction. It does not affect the - * ordering of any other instructions executing on the processor - * - * dmb st - Data memory barrier. Wait for stores to complete. - * - * Data Synchronization Barrier (DSB) acts as a special kind of memory - * barrier. No instruction in program order after this instruction executes - * until this instruction completes. This instruction completes when: (1) All - * explicit memory accesses before this instruction complete, and (2) all - * Cache, Branch predictor and TLB maintenance operations before this - * instruction complete. - * - * dsb sy - Data syncrhonization barrier. Assures that the CPU waits until - * all memory accesses are complete - */ Review Comment: Since all memory barrier related definitions have been removed, the comments should also been remove. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
