eren-terzioglu opened a new pull request, #15849:
URL: https://github.com/apache/nuttx/pull/15849

   
   ## Summary
   
   Add esp_spiram_writeback_range function to flush some areas of spiram cache 
to update spiram faster and more reliable.
   
   - esp32[s2|s3]: Enhance SPIRAM/PSRAM support
   - esp32[s2|s3|c3|c6|h2]: Update common layer
   
   ## Impact
   
   ESP32, ESP32S2 and ESP32S3
   
   ## Testing
   
   #### Build for esp32 command
   ```
   make -j distclean && ./tools/configure.sh esp32-devkitc:psram && make flash 
EXTRAFLAGS="-Wno-cpp -Werror" ESPTOOL_BINDIR=./ ESPTOOL_PORT=/dev/ttyUSB0 -s 
-j$(nproc) && minicom
   ```
   
   #### Build for esp32s2 command
   
   ```
   make -j distclean && ./tools/configure.sh esp32s2-saola-1:nsh && 
kconfig-tweak -e CONFIG_ESP32S2_FLASH_FREQ_80M && kconfig-tweak -e 
CONFIG_ESP32S2_SPIRAM && kconfig-tweak -e CONFIG_MM_REGIONS && kconfig-tweak -e 
CONFIG_TESTING_MM && make olddefconfig && make flash EXTRAFLAGS="-Wno-cpp 
-Werror" ESPTOOL_BINDIR=./ ESPTOOL_PORT=/dev/ttyUSB0 -s -j$(nproc) && minicom
   ```
   
   #### Build for esp32s3 command
   ```
   make -j distclean && ./tools/configure.sh esp32s3-devkit:psram_quad && make 
flash EXTRAFLAGS="-Wno-cpp -Werror" ESPTOOL_BINDIR=./ ESPTOOL_PORT=/dev/ttyUSB0 
-s -j$(nproc) && minicom
   ```
   
   Before build and flash I changed these lines which are pointed with `+` to 
check flush is working fine:
   
   Note: Change can be applied every chip's related file 
(`nuttx/arch/xtensa/src/esp32s2/esp32s2_spiram.c` and 
`nuttx/arch/xtensa/src/esp32s3/esp32s3_spiram.c`) which are mentioned on impact 
section.
   
   ```
   // nuttx/arch/xtensa/src/esp32/esp32_spiram.c
   int esp_spiram_test(void)
   {
     volatile int *spiram = (volatile int *)PRO_DRAM1_START_ADDR;
   
     /* Set size value to 4 MB which is related to psize argument on
      * cache_sram_mmu_set() calls. In this SoC, psize is 32 Mbit.
      */
   
     size_t s = 4 * 1024 * 1024;
     size_t p;
     int errct = 0;
     int initial_err = -1;
   
     for (p = 0; p < (s / sizeof(int)); p += 8)
       {
         spiram[p] = p ^ 0xaaaaaaaa;
       }
   
   + esp_spiram_writeback_range(spiram, s);
   
     for (p = 0; p < (s / sizeof(int)); p += 8)
       {
         if (spiram[p] != (p ^ 0xaaaaaaaa))
           {
             errct++;
             if (errct == 1)
               {
                 initial_err = p * sizeof(int);
               }
   
             if (errct < 4)
               {
                 merr("SPI SRAM error@%p:%08x/%08x \n", &spiram[p], spiram[p],
                      p ^ 0xaaaaaaaa);
               }
           }
       }
   
     if (errct != 0)
       {
         merr("SPI SRAM memory test fail. %d/%d writes failed, first @ %X\n",
              errct, s / 32, initial_err + SOC_EXTRAM_DATA_LOW);
         return ERROR;
       }
     else
       {
         minfo("SPI SRAM memory test OK!");
         return OK;
       }
   }
   
   ```
   
   Additionaly, `Cache_Disable_DCache_Autoload` function used to disable auto 
flush on. To enable that feature properly you can change this lines:
   
   ```
   //nuttx/arch/xtensa/src/esp32/esp32_start.c
   //nuttx/arch/xtensa/src/esp32s2/esp32s2_start.c
   //nuttx/arch/xtensa/src/esp32s3/esp32s3_start.c
   
   +     Cache_Disable_DCache_Autoload();
         if (esp_spiram_test() != OK)
           {
             ets_printf("SPIRAM test failed\n");
             PANIC();
           }
   ```
   
   
   Change inspired from 
`esp-hal-3rdparty/components/esp_common/test_apps/esp_common/main/test_attr.c:89
 (write_spiram_and_reset)`. 
   Also tested with `mm` command


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