fdcavalcanti commented on code in PR #15815: URL: https://github.com/apache/nuttx/pull/15815#discussion_r1951225283
########## arch/risc-v/src/common/riscv_exception_common.S: ########## @@ -207,25 +207,46 @@ handle_irq: .cfi_offset x2, 8 /* Toolchain not support macro, is REG_X2 * 4 */ .cfi_offset ra, 0 /* Toolchain not support macro, is REG_EPC * 4 */ + REGLOAD ra, REG_EPC(sp) + REGLOAD s0, REG_X8(sp) Review Comment: On 210 we load from stack the EPC of the function that caused the exception as RA, because we create a frame below using this value. We need to link the exception routine to the code that created it, so we can have backtrace. Then on 211 we restore the fp/s0 value since it was used previously on line 140 (`csrr s0, CSR_STATUS`). -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
