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commit 05f6445493e6bb76eb97490914e79d1f0139abb5
Author: Xiang Xiao <xiaoxi...@xiaomi.com>
AuthorDate: Thu Jul 9 02:39:29 2020 +0800
arch: Move *_getsp to the common place arch/arch.h
so other place can get the stack pointer easily
Signed-off-by: Xiang Xiao <xiaoxi...@xiaomi.com>
---
arch/arm/include/arch.h | 22 ++++++++++++--
arch/arm/include/tls.h | 18 -----------
arch/hc/include/arch.h | 15 ++++++++++
arch/hc/include/hcs12/irq.h | 24 +++++----------
arch/hc/include/tls.h | 15 ----------
arch/mips/include/arch.h | 15 ++++++++++
arch/mips/include/tls.h | 15 ----------
arch/misoc/include/arch.h | 50 +++++++++++++++++++++++++++++++
arch/misoc/include/tls.h | 13 --------
arch/or1k/include/arch.h | 21 +++++++++++--
arch/or1k/include/tls.h | 17 -----------
arch/xtensa/include/arch.h | 17 +++++++++++
arch/xtensa/include/tls.h | 17 -----------
arch/xtensa/src/common/xtensa_dumpstate.c | 19 ------------
14 files changed, 143 insertions(+), 135 deletions(-)
diff --git a/arch/arm/include/arch.h b/arch/arm/include/arch.h
index 88828b0..6f55a37 100644
--- a/arch/arm/include/arch.h
+++ b/arch/arm/include/arch.h
@@ -124,6 +124,24 @@ do { \
****************************************************************************/
/****************************************************************************
+ * Name: arm_getsp
+ ****************************************************************************/
+
+/* I don't know if the builtin to get SP is enabled */
+
+static inline uint32_t arm_getsp(void)
+{
+ uint32_t sp;
+ __asm__
+ (
+ "\tmov %0, sp\n\t"
+ : "=r"(sp)
+ );
+
+ return sp;
+}
+
+/****************************************************************************
* Public Types
****************************************************************************/
@@ -134,8 +152,8 @@ do { \
* nuttx/arch/<architecture>/include/arch.h.
*
* These tables would hold the physical address of the level 2 page tables.
- * All would be initially NULL and would not be backed up with physical memory
- * until mappings in the level 2 page table are required.
+ * All would be initially NULL and would not be backed up with physical
+ * memory until mappings in the level 2 page table are required.
*/
struct group_addrenv_s
diff --git a/arch/arm/include/tls.h b/arch/arm/include/tls.h
index c6d86fd..fec56ad 100644
--- a/arch/arm/include/tls.h
+++ b/arch/arm/include/tls.h
@@ -35,24 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: arm_getsp
- ****************************************************************************/
-
-/* I don't know if the builtin to get SP is enabled */
-
-static inline uint32_t arm_getsp(void)
-{
- uint32_t sp;
- __asm__
- (
- "\tmov %0, sp\n\t"
- : "=r"(sp)
- );
-
- return sp;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/hc/include/arch.h b/arch/hc/include/arch.h
index cfef5de..ff28e1f 100644
--- a/arch/hc/include/arch.h
+++ b/arch/hc/include/arch.h
@@ -55,6 +55,21 @@
****************************************************************************/
/****************************************************************************
+ * Name: hc_getsp
+ ****************************************************************************/
+
+static inline uint16_t hc_getsp(void)
+{
+ uint16_t ret;
+ __asm__
+ (
+ "\tsts %0\n"
+ : "=m"(ret) :
+ );
+ return ret;
+}
+
+/****************************************************************************
* Public Types
****************************************************************************/
diff --git a/arch/hc/include/hcs12/irq.h b/arch/hc/include/hcs12/irq.h
index a3d1ba2..4989180 100644
--- a/arch/hc/include/hcs12/irq.h
+++ b/arch/hc/include/hcs12/irq.h
@@ -50,6 +50,7 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
+
/* CCR bit definitions */
#define HCS12_CCR_C (1 << 0) /* Bit 0: Carry/Borrow status bit */
@@ -62,7 +63,7 @@
#define HCS12_CCR_S (1 << 7) /* Bit 7: STOP instruction control bit */
/************************************************************************************
- * Register state save strucure
+ * Register state save strucure
* Low Address <-- SP after state save
* [PPAGE]
* [soft regisers]
@@ -88,6 +89,7 @@
************************************************************************************/
/* Byte offsets */
+
/* PPAGE register (only in banked mode) */
#ifndef CONFIG_HCS12_NONBANKED
@@ -174,9 +176,9 @@ struct xcptcontext
uint8_t regs[XCPTCONTEXT_REGS];
};
-/****************************************************************************
+/************************************************************************************
* Inline functions
- ****************************************************************************/
+
************************************************************************************/
/* Name: up_irq_save, up_irq_restore, and friends.
*
@@ -194,19 +196,6 @@ struct xcptcontext
#define xenable() __asm("andcc #0xbf")
#define xdisable() __asm("orcc #0x40")
-/* Get the current value of the stack pointer */
-
-static inline uint16_t up_getsp(void)
-{
- uint16_t ret;
- __asm__
- (
- "\tsts %0\n"
- : "=m"(ret) :
- );
- return ret;
-}
-
/* Get the current value of the CCR */
static inline irqstate_t up_getccr(void)
@@ -256,6 +245,7 @@ static inline void system_call3(unsigned int nbr, uintptr_t
parm1,
uintptr_t parm2, uintptr_t parm3)
{
/* To be provided */
+
/* __asm("swi") */
}
@@ -272,7 +262,7 @@ extern "C"
#endif
/************************************************************************************
- * Public Functions
+ * Public Functions Prototypes
************************************************************************************/
#undef EXTERN
diff --git a/arch/hc/include/tls.h b/arch/hc/include/tls.h
index a390f0b..f258c6c 100644
--- a/arch/hc/include/tls.h
+++ b/arch/hc/include/tls.h
@@ -35,21 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: hc_getsp
- ****************************************************************************/
-
-static inline uint16_t hc_getsp(void)
-{
- uint16_t ret;
- __asm__
- (
- "\tsts %0\n"
- : "=m"(ret) :
- );
- return ret;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/mips/include/arch.h b/arch/mips/include/arch.h
index 40ffc02..d730e11 100644
--- a/arch/mips/include/arch.h
+++ b/arch/mips/include/arch.h
@@ -55,6 +55,21 @@
****************************************************************************/
/****************************************************************************
+ * Name: mips_getsp
+ ****************************************************************************/
+
+static inline uint32_t mips_getsp(void)
+{
+ register uint32_t sp;
+ __asm__
+ (
+ "\tadd %0, $0, $29\n"
+ : "=r"(sp)
+ );
+ return sp;
+}
+
+/****************************************************************************
* Public Types
****************************************************************************/
diff --git a/arch/mips/include/tls.h b/arch/mips/include/tls.h
index d29c0a0..2510cfa 100644
--- a/arch/mips/include/tls.h
+++ b/arch/mips/include/tls.h
@@ -35,21 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: mips_getsp
- ****************************************************************************/
-
-static inline uint32_t mips_getsp(void)
-{
- register uint32_t sp;
- __asm__
- (
- "\tadd %0, $0, $29\n"
- : "=r"(sp)
- );
- return sp;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/misoc/include/arch.h b/arch/misoc/include/arch.h
index 8b13789..f054c46 100644
--- a/arch/misoc/include/arch.h
+++ b/arch/misoc/include/arch.h
@@ -1 +1,51 @@
+/****************************************************************************
+ * arch/misoc/include/arch.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+/* This file should never be included directly but, rather,
+ * only indirectly through nuttx/arch.h
+ */
+
+#ifndef __ARCH_MISOC_INCLUDE_ARCH_H
+#define __ARCH_MISOC_INCLUDE_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_getsp
+ ****************************************************************************/
+
+static inline uint32_t misoc_getsp(void)
+{
+ register uint32_t sp;
+
+ __asm__ __volatile__("addi %0, sp, 0" : "=r" (sp));
+
+ return sp;
+}
+
+#endif /* __ARCH_MISOC_INCLUDE_ARCH_H */
diff --git a/arch/misoc/include/tls.h b/arch/misoc/include/tls.h
index 3fc95a1..f751e66 100644
--- a/arch/misoc/include/tls.h
+++ b/arch/misoc/include/tls.h
@@ -35,19 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: misoc_getsp
- ****************************************************************************/
-
-static inline uint32_t misoc_getsp(void)
-{
- register uint32_t sp;
-
- __asm__ __volatile__("addi %0, sp, 0" : "=r" (sp));
-
- return sp;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/or1k/include/arch.h b/arch/or1k/include/arch.h
index 15d92c1..47d0b68 100644
--- a/arch/or1k/include/arch.h
+++ b/arch/or1k/include/arch.h
@@ -88,6 +88,23 @@
****************************************************************************/
/****************************************************************************
+ * Name: or1k_getsp
+ ****************************************************************************/
+
+static inline uint32_t or1k_getsp(void)
+{
+ uint32_t sp;
+
+ __asm__
+ (
+ "\tmov %0, sp\n\t"
+ : "=r"(sp)
+ );
+
+ return sp;
+}
+
+/****************************************************************************
* Public Types
****************************************************************************/
@@ -98,8 +115,8 @@
* nuttx/arch/<architecture>/include/arch.h.
*
* These tables would hold the physical address of the level 2 page tables.
- * All would be initially NULL and would not be backed up with physical memory
- * until mappings in the level 2 page table are required.
+ * All would be initially NULL and would not be backed up with physical
+ * memory until mappings in the level 2 page table are required.
*/
struct group_addrenv_s
diff --git a/arch/or1k/include/tls.h b/arch/or1k/include/tls.h
index 85759e2..92d8bbd 100644
--- a/arch/or1k/include/tls.h
+++ b/arch/or1k/include/tls.h
@@ -35,23 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: or1k_getsp
- ****************************************************************************/
-
-static inline uint32_t or1k_getsp(void)
-{
- uint32_t sp;
-
- __asm__
- (
- "\tmov %0, sp\n\t"
- : "=r"(sp)
- );
-
- return sp;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/xtensa/include/arch.h b/arch/xtensa/include/arch.h
index b986c7f..cc073a1 100644
--- a/arch/xtensa/include/arch.h
+++ b/arch/xtensa/include/arch.h
@@ -55,6 +55,23 @@
****************************************************************************/
/****************************************************************************
+ * Name: xtensa_getsp
+ ****************************************************************************/
+
+static inline uint32_t xtensa_getsp(void)
+{
+ register uint32_t sp;
+
+ __asm__ __volatile__
+ (
+ "mov %0, sp\n"
+ : "=r" (sp)
+ );
+
+ return sp;
+}
+
+/****************************************************************************
* Public Types
****************************************************************************/
diff --git a/arch/xtensa/include/tls.h b/arch/xtensa/include/tls.h
index e351cf8..a7968fb 100644
--- a/arch/xtensa/include/tls.h
+++ b/arch/xtensa/include/tls.h
@@ -35,23 +35,6 @@
****************************************************************************/
/****************************************************************************
- * Name: xtensa_getsp
- ****************************************************************************/
-
-static inline uint32_t xtensa_getsp(void)
-{
- register uint32_t sp;
-
- __asm__ __volatile__
- (
- "mov %0, sp\n"
- : "=r" (sp)
- );
-
- return sp;
-}
-
-/****************************************************************************
* Name: up_tls_info
*
* Description:
diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c
b/arch/xtensa/src/common/xtensa_dumpstate.c
index 42274f7..6f5beac 100644
--- a/arch/xtensa/src/common/xtensa_dumpstate.c
+++ b/arch/xtensa/src/common/xtensa_dumpstate.c
@@ -66,25 +66,6 @@ static uint32_t s_last_regs[XCPTCONTEXT_REGS];
****************************************************************************/
/****************************************************************************
- * Name: xtensa_getsp
- ****************************************************************************/
-
-/* I don't know if the builtin to get SP is enabled */
-
-static inline uint32_t xtensa_getsp(void)
-{
- register uint32_t sp;
-
- __asm__ __volatile__
- (
- "mov %0, sp\n"
- : "=r" (sp)
- );
-
- return sp;
-}
-
-/****************************************************************************
* Name: up_taskdump
****************************************************************************/
