(nuttx) branch master updated: tools/[Rust|D]: Fix build break for RISC-V

[xiaoxiang]

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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 1eca39eacc tools/[Rust|D]: Fix build break for RISC-V
1eca39eacc is described below

commit 1eca39eacca7435a88ff72ffe3cc833cc8b5497e
Author: Huang Qi <huang...@xiaomi.com>
AuthorDate: Sun Aug 4 22:18:15 2024 +0800

    tools/[Rust|D]: Fix build break for RISC-V
    
    Rust/D support for RISC-V is broken after 
https://github.com/apache/nuttx/pull/11549,
    since the target triple is quite different bewteen Rust/D toolchain and GCC,
    only few RISC-V targets are supported by Rust toolchain now, so it's better 
to
    construct target triple in Rust.defs/D.defs for RISC-V.
---
 tools/D.defs    | 20 +++++++++++++++++++-
 tools/Rust.defs | 20 +++++++++++++++++++-
 2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/tools/D.defs b/tools/D.defs
index 5f64a79cdf..1f317daa02 100644
--- a/tools/D.defs
+++ b/tools/D.defs
@@ -47,7 +47,25 @@ ifeq ($(CONFIG_ARCH_SIM),y)
   endif
 else ifeq ($(CONFIG_ARCH_RISCV),y)
   # Traget triple is riscv[32|64][isa]-unknown-none-elf
-  DFLAGS += 
-mtriple=$(LLVM_ARCHTYPE)$(ARCHRVISAM)$(ARCHRVISAA)$(ARCHRVISAF)$(ARCHRVISAD)$(ARCHRVISAC)-unknown-none-elf
+
+  D_ARCHTYPE = $(LLVM_ARCHTYPE)i
+  ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
+    D_ARCHTYPE := $(D_ARCHTYPE)m
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
+    D_ARCHTYPE := $(D_ARCHTYPE)a
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_F),y)
+    D_ARCHTYPE := $(D_ARCHTYPE)f
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_D),y)
+    D_ARCHTYPE := $(D_ARCHTYPE)d
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
+    D_ARCHTYPE := $(D_ARCHTYPE)c
+  endif
+
+  DFLAGS += -mtriple=$(D_ARCHTYPE)-unknown-none-elf
   DFLAGS += -mattr=+m,+a,+f,+d,+c -mabi=ilp32d
   DFLAGS += -mcpu=generic-rv32
 else
diff --git a/tools/Rust.defs b/tools/Rust.defs
index 88f3fb78f6..3a762e9a6b 100644
--- a/tools/Rust.defs
+++ b/tools/Rust.defs
@@ -46,7 +46,25 @@ ifeq ($(CONFIG_ARCH_SIM),y)
   endif
 else ifeq ($(CONFIG_ARCH_RISCV),y)
   # Traget triple is riscv[32|64][isa]-unknown-none-elf
-  RUSTFLAGS += --target 
$(LLVM_ARCHTYPE)i$(ARCHRVISAM)$(ARCHRVISAA)$(ARCHRVISAF)$(ARCHRVISAD)$(ARCHRVISAC)-unknown-none-elf
+
+  RUST_ARCHTYPE = $(LLVM_ARCHTYPE)i
+  ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
+    RUST_ARCHTYPE := $(RUST_ARCHTYPE)m
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
+    RUST_ARCHTYPE := $(RUST_ARCHTYPE)a
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_F),y)
+    RUST_ARCHTYPE := $(RUST_ARCHTYPE)f
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_D),y)
+    RUST_ARCHTYPE := $(RUST_ARCHTYPE)d
+  endif
+  ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
+    RUST_ARCHTYPE := $(RUST_ARCHTYPE)c
+  endif
+
+  RUSTFLAGS += --target $(RUST_ARCHTYPE)-unknown-none-elf
 else
   # For arm, but there are some other archs not support yet,
   # such as xtensa, x86 bare metal, etc.