pussuw commented on code in PR #12353:
URL: https://github.com/apache/nuttx/pull/12353#discussion_r1601980787


##########
arch/arm64/src/imx9/imx9_boot.c:
##########
@@ -44,19 +44,39 @@
 #include "imx9_gpio.h"
 #include "imx9_lowputc.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC  1700000000
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
+#ifdef CONFIG_IMX9_BOOTLOADER
+extern uint8_t _szbootloader[];
+#endif
+
 static const struct arm_mmu_region g_mmu_regions[] =
 {
-    MMU_REGION_FLAT_ENTRY("DEVICE_REGION",
-                          CONFIG_DEVICEIO_BASEADDR, CONFIG_DEVICEIO_SIZE,
-                          MT_DEVICE_NGNRNE | MT_RW | MT_SECURE),
+  MMU_REGION_FLAT_ENTRY("DEVICE_REGION",
+                        CONFIG_DEVICEIO_BASEADDR, CONFIG_DEVICEIO_SIZE,
+                        MT_DEVICE_NGNRNE | MT_RW | MT_SECURE),
+
+  MMU_REGION_FLAT_ENTRY("DRAM0_S0",
+                        CONFIG_RAMBANK1_ADDR, CONFIG_RAMBANK1_SIZE,
+                        MT_NORMAL | MT_RW | MT_SECURE),
+#ifdef CONFIG_IMX9_BOOTLOADER
+  /* OCRAM secure region protection keeps the binary at RO mode,
+   * overriding any MMU settings. However, data and heap accesses
+   * beyond the binary require RW access.
+   */
 
-    MMU_REGION_FLAT_ENTRY("DRAM0_S0",
-                          CONFIG_RAMBANK1_ADDR, CONFIG_RAMBANK1_SIZE,
-                          MT_NORMAL | MT_RW | MT_SECURE),
+  MMU_REGION_FLAT_ENTRY("BOOTLOADER",
+                        (uint64_t)_stext, (uint64_t)_szbootloader,
+                        MT_NORMAL | MT_RW | MT_SECURE),

Review Comment:
   Yeah I was just wondering about the RW permission for .text (which should be 
RX), but like the comment says it seems the code section has some other kind of 
memory protection enforced on it ?



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