acassis commented on code in PR #11605: URL: https://github.com/apache/nuttx/pull/11605#discussion_r1468651557
########## include/nuttx/coresight/coresight.h: ########## @@ -0,0 +1,241 @@ +/**************************************************************************** + * include/nuttx/coresight/coresight.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_CORESIGHT_CORESIGHT_H +#define __INCLUDE_NUTTX_CORESIGHT_CORESIGHT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <stdint.h> +#include <nuttx/list.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum coresight_dev_type_e +{ + CORESIGHT_DEV_TYPE_SOURCE, + CORESIGHT_DEV_TYPE_LINK, + CORESIGHT_DEV_TYPE_SINK, + CORESIGHT_DEV_TYPE_MAX +}; + +enum coresight_dev_subtype_source_e +{ + CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, /* ETM */ + CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, /* STM */ +}; + +enum coresight_dev_subtype_link_e +{ + CORESIGHT_DEV_SUBTYPE_LINK_MERG, /* Funnel */ + CORESIGHT_DEV_SUBTYPE_LINK_SPLIT, /* Replocator */ + CORESIGHT_DEV_SUBTYPE_LINK_FIFO, /* TMC ETR */ +}; + +enum coresight_dev_subtype_sink_e +{ + CORESIGHT_DEV_SUBTYPE_SINK_PORT, /* TPIU */ + CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, /* ETB */ +}; + +/* This structure is used to unify different subtype of devices. */ + +union coresight_dev_subtype_u +{ + enum coresight_dev_subtype_source_e source_subtype; + enum coresight_dev_subtype_link_e link_subtype; + enum coresight_dev_subtype_sink_e sink_subtype; +}; + +struct coresight_dev_s; + +struct coresight_sink_ops_s +{ + int (*enable)(FAR struct coresight_dev_s *csdev); + void (*disable)(FAR struct coresight_dev_s *csdev); +}; + +struct coresight_link_ops_s +{ + int (*enable)(FAR struct coresight_dev_s *csdev, int iport, int oport); + void (*disable)(FAR struct coresight_dev_s *csdev, int iport, int oport); +}; + +struct coresight_source_ops_s +{ + int (*enable)(FAR struct coresight_dev_s *csdev); + void (*disable)(FAR struct coresight_dev_s *csdev); +}; + +/* This structure is used to unify different operations of devices. */ + +struct coresight_ops_s +{ + union + { + FAR const struct coresight_sink_ops_s *sink_ops; + FAR const struct coresight_link_ops_s *link_ops; + FAR const struct coresight_source_ops_s *source_ops; + }; +}; + +struct coresight_portdesc_s +{ + /* Coresight device's name this port connects to. */ + + FAR const char *remote; + + /* Port connects to. */ + + int port; +}; + +struct coresight_desc_s +{ + FAR const char *name; + uintptr_t addr; + enum coresight_dev_type_e type; + union coresight_dev_subtype_u subtype; + + /* Description of outports of current device. */ + + int outport_num; + struct coresight_portdesc_s outports[CONFIG_CORESIGHT_MAX_OUTPORT_NUM]; +}; + +/* Use to build the trace path. */ + +struct coresight_connect_s +{ + int srcport; + int destport; + + /* Used to find the dest device when build the trace path. */ + + FAR const char *destname; + FAR struct coresight_dev_s *srcdev; + FAR struct coresight_dev_s *destdev; +}; + +struct coresight_dev_s +{ + FAR const char *name; + + /* Memory-mapped base address of current coresight device. */ + + uintptr_t addr; + enum coresight_dev_type_e type; + union coresight_dev_subtype_u subtype; + FAR const struct coresight_ops_s *ops; + + /* Used to connect all the coresight device register to coresight bus. */ + + struct list_node node; + + /* Used in source coresight device as trace path's list head. */ + + struct list_node path; + + /* Out port number current coresight device have. */ + + int outport_num; + + /* Pointer to an array of connections, array size is equal + * to the outport number. + */ + + FAR struct coresight_connect_s *outconns; +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: coresight_register + * + * Description: + * Register a coresight device to the coresight bus. + * + * Input Parameters: + * csdev - Pointer to the coresight device that needs to be registered. + * desc - Pointer to the attribute description of this coresight device. + * + * Returned Value: + * Zero on success; a negative value on failure. + * + ****************************************************************************/ + +int coresight_register(FAR struct coresight_dev_s *csdev, + FAR const struct coresight_desc_s *desc); + +/**************************************************************************** + * Name: coresight_unregister + * + * Description: + * Unregister a coresight device from coresight bus. + * + * Input Parameters: + * csdev - Pointer to the coresight device that needs to be unregistered. + * + ****************************************************************************/ + +void coresight_unregister(FAR struct coresight_dev_s *csdev); + +/**************************************************************************** + * Name: coresight_enable + * + * Description: + * Enable trace start from srcdev to destdev. + * + * Input Parameters: + * srcdev - Source device that generates trace data. + * destdev - Sink device that finally accepts the trace data. + * + * Returned Value: + * Zero on success; a negative value on failure. + * + ****************************************************************************/ + +int coresight_enable(FAR struct coresight_dev_s *srcdev, + FAR struct coresight_dev_s *destdev); + +/**************************************************************************** + * Name: coresight_disable + * + * Description: + * Disable the trace start from srcdev to destdev. + * + * Input Parameters: + * srcdev - Source device that generates trace data. + * + ****************************************************************************/ + +void coresight_disable(FAR struct coresight_dev_s *srcdev); + +#endif //__INCLUDE_NUTTX_CORESIGHT_CORESIGHT_H Review Comment: Please use /* ... */ ########## drivers/coresight/coresight_core.c: ########## @@ -0,0 +1,678 @@ +/**************************************************************************** + * drivers/coresight/coresight_core.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <errno.h> +#include <debug.h> +#include <stdbool.h> +#include <nuttx/kmalloc.h> +#include <nuttx/irq.h> + +#include <nuttx/coresight/coresight.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* Used for build path */ + +struct coresight_node_s +{ + FAR struct coresight_dev_s *csdev; + struct list_node link; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct list_node g_csdev_list = LIST_INITIAL_VALUE(g_csdev_list); + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: coresight_enable_sink + ****************************************************************************/ + +static int coresight_enable_sink(FAR struct coresight_dev_s *csdev) +{ + if (csdev->ops->sink_ops->enable != NULL) + { + return csdev->ops->sink_ops->enable(csdev); + } + else + { + return -EINVAL; + } +} + +/**************************************************************************** + * Name: coresight_disable_sink + ****************************************************************************/ + +static void coresight_disable_sink(FAR struct coresight_dev_s *csdev) +{ + if (csdev->ops->sink_ops->disable != NULL) + { + csdev->ops->sink_ops->disable(csdev); + } +} + +/**************************************************************************** + * Name: coresight_find_link_inport + ****************************************************************************/ + +static int coresight_find_link_inport(FAR struct coresight_dev_s *csdev, + FAR struct coresight_dev_s *prev) +{ + FAR struct coresight_connect_s *conn; + int i; + + for (i = 0; i < prev->outport_num; i++) + { + conn = &prev->outconns[i]; + if (conn->destdev == csdev) + { + return conn->destport; + } + } + + return -ENODEV; +} + +/**************************************************************************** + * Name: coresight_find_link_outport + ****************************************************************************/ + +static int coresight_find_link_outport(FAR struct coresight_dev_s *csdev, + FAR struct coresight_dev_s *next) +{ + FAR struct coresight_connect_s *conn; + int i; + + for (i = 0; i < csdev->outport_num; i++) + { + conn = &csdev->outconns[i]; + if (conn->destdev == next) + { + return conn->srcport; + } + } + + return -ENODEV; +} + +/**************************************************************************** + * Name: coresight_enable_link + ****************************************************************************/ + +static int coresight_enable_link(FAR struct coresight_dev_s *csdev, + FAR struct coresight_dev_s *prev, + FAR struct coresight_dev_s *next) +{ + int inport = 0; + int outport = 0; + + if (csdev->ops->link_ops->enable == NULL) + { + return -EINVAL; + } + + if (csdev->subtype.link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) + { + inport = coresight_find_link_inport(csdev, prev); + if (inport < 0) + { + return inport; + } + } + + if (csdev->subtype.link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) + { + outport = coresight_find_link_outport(csdev, next); + if (outport < 0) + { + return outport; + } + } + + return csdev->ops->link_ops->enable(csdev, inport, outport); +} + +/**************************************************************************** + * Name: coresight_disable_link + ****************************************************************************/ + +static void coresight_disable_link(FAR struct coresight_dev_s *csdev, + FAR struct coresight_dev_s *prev, + FAR struct coresight_dev_s *next) +{ + if (csdev->ops->sink_ops->disable != NULL) + { + int inport = coresight_find_link_inport(csdev, prev); + int outport = coresight_find_link_outport(csdev, next); + csdev->ops->link_ops->disable(csdev, inport, outport); + } +} + +/**************************************************************************** + * Name: coresight_enable_source + ****************************************************************************/ + +static int coresight_enable_source(FAR struct coresight_dev_s *csdev) +{ + if (csdev->ops->source_ops->enable != NULL) + { + return csdev->ops->source_ops->enable(csdev); + } + else + { + return -EINVAL; + } +} + +/**************************************************************************** + * Name: coresight_disable_source + ****************************************************************************/ + +static void coresight_disable_source(FAR struct coresight_dev_s *csdev) +{ + if (csdev->ops->source_ops->disable != NULL) + { + csdev->ops->source_ops->disable(csdev); + } +} + +/**************************************************************************** + * Name: coresight_validate_source + * + * Description: + * Indicate if this coresight device is a valid source device. + * + ****************************************************************************/ + +static int coresight_validate_source(FAR struct coresight_dev_s *csdev) +{ + uint8_t type = csdev->type; + uint8_t subtype = csdev->subtype.source_subtype; + + if (type != CORESIGHT_DEV_TYPE_SOURCE) + { + cserr("not a source coresight device\n"); + return -EINVAL; + } + + if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && + subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) + { + cserr("not a supported subtype of source device\n"); + return -EINVAL; + } + + return 0; +} + +/**************************************************************************** + * Name: coresight_build_path + * + * Description: + * Build path from srcdev to destdev. + * Review Comment: Please include the input parameters -- This is an automated message from the Apache Git Service. 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