xiaoxiang781216 commented on code in PR #11583: URL: https://github.com/apache/nuttx/pull/11583#discussion_r1462972330
########## boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c: ########## @@ -0,0 +1,398 @@ +/**************************************************************************** + * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The MSI and MSI-X vector setup function are taken from Jailhouse inmate + * library + * + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (c) Siemens AG, 2014 + * + * Authors: + * Jan Kiszka <jan.kis...@siemens.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> + +#include <nuttx/pcie/pcie.h> + +#include "qemu_pcie_readwrite.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions Definitions + ****************************************************************************/ + +static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR const void *buffer, unsigned int size); + +static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR void *buffer, unsigned int size); + +static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr, + unsigned long length); + +static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr, + unsigned long length); + +static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev, + uint32_t vector, uint32_t index); + +static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, + uint16_t vector); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +struct pcie_bus_ops_s qemu_pcie_bus_ops = Review Comment: static const struct pcie_bus_ops_s g_qemu_pcie_bus_ops = ########## boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c: ########## @@ -0,0 +1,398 @@ +/**************************************************************************** + * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The MSI and MSI-X vector setup function are taken from Jailhouse inmate + * library + * + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (c) Siemens AG, 2014 + * + * Authors: + * Jan Kiszka <jan.kis...@siemens.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> + +#include <nuttx/pcie/pcie.h> + +#include "qemu_pcie_readwrite.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions Definitions + ****************************************************************************/ + +static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR const void *buffer, unsigned int size); + +static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR void *buffer, unsigned int size); + +static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr, + unsigned long length); + +static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr, + unsigned long length); + +static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev, + uint32_t vector, uint32_t index); + +static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, + uint16_t vector); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +struct pcie_bus_ops_s qemu_pcie_bus_ops = +{ + .pci_cfg_write = qemu_pci_cfg_write, + .pci_cfg_read = qemu_pci_cfg_read, + .pci_map_bar = qemu_pci_map_bar, + .pci_map_bar64 = qemu_pci_map_bar64, + .pci_msix_register = qemu_pci_msix_register, + .pci_msi_register = qemu_pci_msi_register, +}; + +struct pcie_bus_s qemu_pcie_bus = Review Comment: ``` static struct pcie_bus_s g_qemu_pcie_bus = ``` ########## drivers/virt/Make.defs: ########## @@ -0,0 +1,37 @@ +############################################################################ +# drivers/pcie/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +# Don't build anything if there is no CAN support + +ifeq ($(CONFIG_VIRT_QEMU_PCI_TEST),y) + +CSRCS += qemu_pci_test.c + +endif + +# Include virt device driver build support +# +ifeq ($(CONFIG_VIRT),y) + +DEPPATH += --dep-path virt +VPATH += :virt +CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)virt} Review Comment: ``` ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)drivers$(DELIM)virt ``` ########## Kconfig: ########## @@ -2196,6 +2196,41 @@ config DEBUG_IPC_INFO endif # DEBUG_IPC +======= Review Comment: remove ===== ########## drivers/virt/qemu_edu.c: ########## @@ -0,0 +1,448 @@ +/***************************************************************************** + * drivers/virt/qemu_edu.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + *****************************************************************************/ + +/***************************************************************************** + * Included Files + *****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/arch.h> +#include <nuttx/irq.h> +#include <nuttx/kmalloc.h> + +#include <stdio.h> +#include <stdint.h> +#include <string.h> +#include <math.h> +#include <unistd.h> +#include <errno.h> +#include <sched.h> + +#include <nuttx/pci/pci.h> +#include <nuttx/virt/qemu_pci.h> + +/***************************************************************************** + * Pre-processor Definitions + *****************************************************************************/ + +/* Registers defined for device. Size 4 for < 0x80. Size 8 for >= 0x80. */ + +#define EDU_REG_ID 0x00 /* Identification */ +#define EDU_REG_LIVE 0x04 /* Liveness Check */ +#define EDU_REG_FAC 0x08 /* Factorial Computation */ +#define EDU_REG_STATUS 0x20 /* Status */ +#define EDU_REG_INT_STATUS 0x24 /* Interupt Status */ +#define EDU_REG_INT_RAISE 0x60 /* Raise an interrupt */ +#define EDU_REG_INT_ACK 0x64 /* Acknowledge interrupt */ +#define EDU_REG_DMA_SOURCE 0x80 /* Source address for DMA transfer */ +#define EDU_REG_DMA_DEST 0x88 /* Destination address for DMA transfer */ +#define EDU_REG_DMA_COUNT 0x90 /* Size of area to transfer with DMA */ +#define EDU_REG_DMA_CMD 0x98 /* Control DMA tranfer */ + +#define EDU_CONTROL_BAR_ID 0 +#define EDU_CONTROL_BAR_OFFSET PCI_HEADER_NORM_BAR0 + +/***************************************************************************** + * Private Types + *****************************************************************************/ + +struct qemu_edu_priv_s +{ + uintptr_t base_addr; + sem_t isr_done; + uint32_t test_result; +}; + +/***************************************************************************** + * Private Functions Definitions + *****************************************************************************/ + +static void qemu_edu_write_reg32(uintptr_t addr, uint32_t val); + +static uint32_t qemu_edu_read_reg32(uintptr_t addr); + +static void qemu_edu_write_reg64(uintptr_t addr, uint64_t val); + +static void qemu_edu_test_poll(FAR struct pci_dev_s *dev, + uintptr_t base_addr); + +static void qemu_edu_test_intx(FAR struct pci_dev_s *dev, + struct qemu_edu_priv_s *drv_priv); + +static int qemu_edu_interrupt(int irq, void *context, FAR void *arg); + +/***************************************************************************** + * Private Data + *****************************************************************************/ + +/***************************************************************************** + * Private Functions + *****************************************************************************/ + +/***************************************************************************** + * Name: qemu_edu_write_reg32 + * + * Description: + * Provide a write interface for 32bit mapped registers + * + * Input Parameters: + * addr - Register address + * val - Value to assign to register + * + *****************************************************************************/ + +static void qemu_edu_write_reg32(uintptr_t addr, uint32_t val) +{ + *(volatile uint32_t *)addr = val; +} + +/***************************************************************************** + * Name: qemu_edu_read_reg32 + * + * Description: + * Provide a read interface for 32bit mapped registers + * + * Returned Value: + * Register value + * + *****************************************************************************/ + +static uint32_t qemu_edu_read_reg32(uintptr_t addr) +{ + return *(volatile uint32_t *)addr; +} + +/***************************************************************************** + * Name: qemu_edu_write_reg64 + * + * Description: + * Provide a write interface for 64bit mapped registers + * + * Input Parameters: + * addr - Register address + * val - Value to assign to register + * + *****************************************************************************/ + +static void qemu_edu_write_reg64(uintptr_t addr, uint64_t val) +{ + *(volatile uint64_t *)addr = val; +} + +/***************************************************************************** + * Name: qemu_edu_test_poll + * + * Description: + * Performs basic functional test of PCI device and MMIO using polling + * of mapped register interfaces. + * + * Input Parameters: + * bus - An PCI device + * base_addr - Base address of device register space + * + *****************************************************************************/ + +static void qemu_edu_test_poll(FAR struct pci_dev_s *dev, uintptr_t base_addr) +{ + uint32_t test_value; + uint32_t test_read; + + pciinfo("Identification: 0x%08xu\n", + qemu_edu_read_reg32(base_addr + EDU_REG_ID)); + + /* Test Live Check */ + + test_value = 0xdeadbeef; + qemu_edu_write_reg32(base_addr + EDU_REG_LIVE, test_value); + test_read = qemu_edu_read_reg32(base_addr + EDU_REG_LIVE); + pciinfo("Live Check: Wrote: 0x%08x Read: 0x%08x Error Bits 0x%08x\n", + test_value, test_read, test_read ^ ~test_value); + pciinfo("TEST %s\n", ((test_read ^ ~test_value) == 0) ? "PASS" : "FAIL"); + + /* Test Factorial */ + + test_value = 10; + qemu_edu_write_reg32(base_addr + EDU_REG_STATUS, 0); + qemu_edu_write_reg32(base_addr + EDU_REG_FAC, test_value); + while (qemu_edu_read_reg32(base_addr + EDU_REG_STATUS) & 0x01) + { + pciinfo("Waiting to compute factorial..."); + usleep(10000); + } + + test_read = qemu_edu_read_reg32(base_addr + EDU_REG_FAC); + pciinfo("Computed factorial of %d as %d\n", test_value, test_read); + pciinfo("TEST %s\n", (test_read == 3628800) ? "PASS" : "FAIL"); +} + +/***************************************************************************** + * Name: qemu_edu_test_intx + * + * Description: + * Performs basic functional test of PCI device and MMIO using INTx + * + * Input Parameters: + * bus - An PCI device + * drv_priv - Struct containing internal state of driver + * + *****************************************************************************/ + +static void qemu_edu_test_intx(FAR struct pci_dev_s *dev, + struct qemu_edu_priv_s *drv_priv) +{ + uintptr_t base_addr = drv_priv->base_addr; + uint32_t test_value; + + pciinfo("Identification: 0x%08xu\n", + qemu_edu_read_reg32(base_addr + EDU_REG_ID)); + + /* Test Read/Write */ + + test_value = 0xdeadbeef; + pciinfo("Triggering interrupt with value 0x%08x\n", test_value); + qemu_edu_write_reg32(base_addr + EDU_REG_INT_RAISE, test_value); + sem_wait(&drv_priv->isr_done); + pciinfo("TEST %s\n", + (drv_priv->test_result == test_value) ? "PASS" : "FAIL"); + + /* Test Factorial */ + + test_value = 5; + pciinfo("Computing factorial of %d\n", test_value); + qemu_edu_write_reg32(base_addr + EDU_REG_STATUS, 0x80); + qemu_edu_write_reg32(base_addr + EDU_REG_FAC, test_value); + sem_wait(&drv_priv->isr_done); + pciinfo("TEST %s\n", (drv_priv->test_result == 120) ? "PASS" : "FAIL"); + + /* Test ISR Status Cleanup */ + + qemu_edu_write_reg32(base_addr + EDU_REG_INT_RAISE, test_value); + sem_wait(&drv_priv->isr_done); + pciinfo("TEST %s\n", + (drv_priv->test_result == test_value) ? "PASS" : "FAIL"); +} + +/***************************************************************************** + * Name: qemu_edu_test_dma + * + * Description: + * Performs dma functional test of PCI device + * + * Input Parameters: + * bus - An PCI device + * drv_priv - Struct containing internal state of driver + * + *****************************************************************************/ + +static void qemu_edu_test_dma(FAR struct pci_dev_s *dev, + struct qemu_edu_priv_s *drv_priv) +{ + uintptr_t base_addr = drv_priv->base_addr; + void *test_block; + size_t block_size = 2048; + int i; + uint32_t psrand; + uint32_t tx_checksum; + uint32_t rx_checksum; + uint32_t dev_addr = 0x40000; + + pciinfo("Identification: 0x%08xu\n", + qemu_edu_read_reg32(base_addr + EDU_REG_ID)); + + test_block = kmm_malloc(block_size); + for (i = 0; i < block_size; i++) + { + *((uint8_t *)test_block + i) = i & 0xff; + } + + tx_checksum = 0; + psrand = 0x0011223344; + for (i = 0; i < (block_size / 4); i++) + { + /* Fill the memory block with "random" data */ + + psrand ^= psrand << 13; + psrand ^= psrand >> 17; + psrand ^= psrand << 5; + *((uint32_t *)test_block + i) = psrand; + tx_checksum += psrand; + } + + pciinfo("Test block checksum 0x%08x\n", tx_checksum); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_SOURCE, (uint64_t)test_block); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_DEST, (uint64_t)dev_addr); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_COUNT, (uint64_t)block_size); + qemu_edu_write_reg32(base_addr + EDU_REG_STATUS, 0x00); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_CMD, 0x01 | 0x04); + sem_wait(&drv_priv->isr_done); + + pciinfo("DMA transfer to device complete.\n"); + + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_DEST, (uint64_t)test_block); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_SOURCE, (uint64_t)dev_addr); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_COUNT, (uint64_t)block_size); + qemu_edu_write_reg32(base_addr + EDU_REG_STATUS, 0x00); + qemu_edu_write_reg64(base_addr + EDU_REG_DMA_CMD, 0x01 | 0x02 | 0x04); + sem_wait(&drv_priv->isr_done); + + pciinfo("DMA transfer from device complete.\n"); + rx_checksum = 0; + for (i = 0; i < block_size / 4; i++) + { + rx_checksum += *((uint32_t *)test_block + i); + } + + pciinfo("Received block checksum 0x%08x\n", rx_checksum); + pciinfo("TEST %s\n", (rx_checksum == tx_checksum) ? "PASS" : "FAIL"); +} + +/***************************************************************************** + * Name: qemu_edu_interrupt + * + * Description: + * EDU interrupt handler + * + *****************************************************************************/ + +static int qemu_edu_interrupt(int irq, void *context, FAR void *arg) +{ + struct qemu_edu_priv_s *drv_priv = (struct qemu_edu_priv_s *)arg; + uintptr_t base_addr = drv_priv->base_addr; + + uint32_t status = qemu_edu_read_reg32(base_addr + EDU_REG_INT_STATUS); + + qemu_edu_write_reg32(base_addr + EDU_REG_INT_ACK, ~0U); + switch (status) + { + case 0x1: /* Factorial triggered */ + drv_priv->test_result = qemu_edu_read_reg32(base_addr + EDU_REG_FAC); + pciinfo("Computed factorial: %d\n", + drv_priv->test_result); + break; + case 0x100: /* DMA triggered */ + pciinfo("DMA transfer complete\n"); + break; + default: /* Generic write */ + drv_priv->test_result = status; + pciinfo("Received value: 0x%08x\n", status); + } + + sem_post(&drv_priv->isr_done); + return OK; +} + +/***************************************************************************** + * Public Functions + *****************************************************************************/ + +/***************************************************************************** + * Name: qemu_edu_probe + * + * Description: + * Initialize device + *****************************************************************************/ + +int qemu_edu_probe(FAR struct pci_bus_s *bus, Review Comment: static ########## boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c: ########## @@ -0,0 +1,398 @@ +/**************************************************************************** + * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The MSI and MSI-X vector setup function are taken from Jailhouse inmate + * library + * + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (c) Siemens AG, 2014 + * + * Authors: + * Jan Kiszka <jan.kis...@siemens.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> + +#include <nuttx/pcie/pcie.h> + +#include "qemu_pcie_readwrite.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions Definitions + ****************************************************************************/ + +static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR const void *buffer, unsigned int size); + +static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR void *buffer, unsigned int size); + +static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr, + unsigned long length); + +static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr, + unsigned long length); + +static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev, + uint32_t vector, uint32_t index); + +static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, + uint16_t vector); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +struct pcie_bus_ops_s qemu_pcie_bus_ops = +{ + .pci_cfg_write = qemu_pci_cfg_write, + .pci_cfg_read = qemu_pci_cfg_read, + .pci_map_bar = qemu_pci_map_bar, + .pci_map_bar64 = qemu_pci_map_bar64, + .pci_msix_register = qemu_pci_msix_register, + .pci_msi_register = qemu_pci_msi_register, +}; + +struct pcie_bus_s qemu_pcie_bus = +{ + .ops = &qemu_pcie_bus_ops, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: qemu_pci_cfg_write + * + * Description: + * Write 8, 16, 32, 64 bits data to PCI-E configuration space of device + * specified by dev + * + * Input Parameters: + * bdf - Device private data + * buffer - A pointer to the read-only buffer of data to be written + * size - The number of bytes to send from the buffer + * + * Returned Value: + * 0: success, <0: A negated errno + * + ****************************************************************************/ + +static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR const void *buffer, unsigned int size) +{ + if (!buffer) + return -EINVAL; + + switch (size) + { + case 1: + case 2: + case 4: + return __qemu_pci_cfg_write(dev->bdf, addr, buffer, size); + case 8: + return __qemu_pci_cfg_write(dev->bdf, addr, buffer, size); Review Comment: __qemu_pci_cfg_write64 ########## boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c: ########## @@ -0,0 +1,398 @@ +/**************************************************************************** + * boards/x86_64/intel64/qemu-intel64/src/qemu_pcie.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The MSI and MSI-X vector setup function are taken from Jailhouse inmate + * library + * + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (c) Siemens AG, 2014 + * + * Authors: + * Jan Kiszka <jan.kis...@siemens.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> + +#include <nuttx/pcie/pcie.h> + +#include "qemu_pcie_readwrite.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions Definitions + ****************************************************************************/ + +static int qemu_pci_cfg_write(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR const void *buffer, unsigned int size); + +static int qemu_pci_cfg_read(FAR struct pcie_dev_s *dev, uintptr_t addr, + FAR void *buffer, unsigned int size); + +static int qemu_pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t addr, + unsigned long length); + +static int qemu_pci_map_bar64(FAR struct pcie_dev_s *dev, uint64_t addr, + unsigned long length); + +static int qemu_pci_msix_register(FAR struct pcie_dev_s *dev, + uint32_t vector, uint32_t index); + +static int qemu_pci_msi_register(FAR struct pcie_dev_s *dev, + uint16_t vector); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +struct pcie_bus_ops_s qemu_pcie_bus_ops = +{ + .pci_cfg_write = qemu_pci_cfg_write, + .pci_cfg_read = qemu_pci_cfg_read, + .pci_map_bar = qemu_pci_map_bar, + .pci_map_bar64 = qemu_pci_map_bar64, Review Comment: remove extra space ########## include/nuttx/virt/qemu_pci.h: ########## @@ -0,0 +1,53 @@ +/**************************************************************************** + * include/nuttx/serial/uart_mcs99xx.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H Review Comment: __INCLUDE_NUTTX_VIRT_QEMU_PCI_H ########## drivers/pcie/Make.defs: ########## @@ -0,0 +1,32 @@ +############################################################################ +# drivers/pcie/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +# Don't build anything if there is no CAN support + +ifeq ($(CONFIG_PCIE),y) + +CSRCS += pcie_root.c + +# Include PCIE device driver build support + +DEPPATH += --dep-path pcie +VPATH += :pcie +CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)pcie} Review Comment: ``` ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)drivers$(DELIM)pcie ``` ########## drivers/pcie/pcie_root.c: ########## @@ -0,0 +1,446 @@ +/**************************************************************************** + * nuttx/drivers/pcie/pcie_root.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> +#include <errno.h> +#include <debug.h> + +#include <nuttx/pcie/pcie.h> +#include <nuttx/virt/qemu_pci.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +struct pcie_dev_type_s *pci_device_types[] = Review Comment: ``` static const struct pcie_dev_type_s *g_pci_device_types[] = ``` -- This is an automated message from the Apache Git Service. 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