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commit e42780bb0f5c1bf406179fcd036d37813919addc
Author: Xiang Xiao <xiaoxi...@xiaomi.com>
AuthorDate: Mon Dec 18 17:48:07 2023 +0800
arch/arm: Disable -Warray-bound for rp2040, dm320 and lpc31xx
since gcc report the false alarm if the pointer offset from zero address:
inlined from 'up_vectormapping' at chip/dm320_boot.c:162:7,
inlined from 'arm_boot' at chip/dm320_boot.c:211:3:
Error: chip/dm320_boot.c:117:17: error: array subscript 0 is outside array
bounds of 'uint32_t[0]' {aka 'long unsigned int[]'} [-Werror=array-bounds=]
117 | ctable[index] = (paddr | mmuflags);
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~
Signed-off-by: Xiang Xiao <xiaoxi...@xiaomi.com>
---
arch/arm/src/a1x/a1x_boot.c | 2 +-
arch/arm/src/am335x/am335x_boot.c | 2 +-
arch/arm/src/dm320/Make.defs | 2 ++
arch/arm/src/dm320/dm320_boot.c | 2 +-
arch/arm/src/imx6/imx_boot.c | 2 +-
arch/arm/src/lpc31xx/Make.defs | 2 ++
arch/arm/src/lpc31xx/lpc31_boot.c | 4 ++--
arch/arm/src/rp2040/Make.defs | 2 ++
arch/arm/src/sama5/sam_boot.c | 2 +-
9 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/src/a1x/a1x_boot.c b/arch/arm/src/a1x/a1x_boot.c
index 731e46e6fd..59d675661a 100644
--- a/arch/arm/src/a1x/a1x_boot.c
+++ b/arch/arm/src/a1x/a1x_boot.c
@@ -188,7 +188,7 @@ static void a1x_vectormapping(void)
while (vector_paddr < end_paddr)
{
- mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
+ mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
diff --git a/arch/arm/src/am335x/am335x_boot.c
b/arch/arm/src/am335x/am335x_boot.c
index 4a96276f6a..ee68fad9ad 100644
--- a/arch/arm/src/am335x/am335x_boot.c
+++ b/arch/arm/src/am335x/am335x_boot.c
@@ -272,7 +272,7 @@ static void am335x_vectormapping(void)
while (vector_paddr < end_paddr)
{
- mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
+ mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
diff --git a/arch/arm/src/dm320/Make.defs b/arch/arm/src/dm320/Make.defs
index 349f9ef3ab..5507bcbabf 100644
--- a/arch/arm/src/dm320/Make.defs
+++ b/arch/arm/src/dm320/Make.defs
@@ -20,6 +20,8 @@
include arm/Make.defs
+CFLAGS += -Wno-array-bounds
+
CHIP_ASRCS = dm320_lowputc.S dm320_restart.S
CHIP_CSRCS = dm320_allocateheap.c dm320_boot.c dm320_decodeirq.c
diff --git a/arch/arm/src/dm320/dm320_boot.c b/arch/arm/src/dm320/dm320_boot.c
index b1ace97494..c64ce1032f 100644
--- a/arch/arm/src/dm320/dm320_boot.c
+++ b/arch/arm/src/dm320/dm320_boot.c
@@ -102,7 +102,7 @@ static inline void
up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
uint32_t vaddr, uint32_t mmuflags)
{
- uint32_t *ctable = (uint32_t *)ctabvaddr;
+ uint32_t *ctable = (uint32_t *)ctabvaddr;
uint32_t index;
/* The coarse table divides a 1Mb address space up into 256 entries, each
diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c
index a78eda0c2f..764943cbd7 100644
--- a/arch/arm/src/imx6/imx_boot.c
+++ b/arch/arm/src/imx6/imx_boot.c
@@ -179,7 +179,7 @@ static void imx_vectormapping(void)
while (vector_paddr < end_paddr)
{
- mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
+ mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
diff --git a/arch/arm/src/lpc31xx/Make.defs b/arch/arm/src/lpc31xx/Make.defs
index 93d02ce3c8..c625fc0b1d 100644
--- a/arch/arm/src/lpc31xx/Make.defs
+++ b/arch/arm/src/lpc31xx/Make.defs
@@ -20,6 +20,8 @@
include arm/Make.defs
+CFLAGS += -Wno-array-bounds
+
CGU_CSRCS = lpc31_bcrndx.c lpc31_clkdomain.c lpc31_clkexten.c
CGU_CSRCS += lpc31_clkfreq.c lpc31_clkinit.c lpc31_defclk.c
CGU_CSRCS += lpc31_esrndx.c lpc31_fdcndx.c lpc31_fdivinit.c
diff --git a/arch/arm/src/lpc31xx/lpc31_boot.c
b/arch/arm/src/lpc31xx/lpc31_boot.c
index 913c868756..9618c2b381 100644
--- a/arch/arm/src/lpc31xx/lpc31_boot.c
+++ b/arch/arm/src/lpc31xx/lpc31_boot.c
@@ -139,7 +139,7 @@ static inline void up_setlevel2coarseentry(uint32_t
ctabvaddr,
uint32_t vaddr,
uint32_t mmuflags)
{
- uint32_t *ctable = (uint32_t *)ctabvaddr;
+ uint32_t *ctable = (uint32_t *)ctabvaddr;
uint32_t index;
/* The coarse table divides a 1Mb address space up into 256 entries, each
@@ -246,7 +246,7 @@ static void up_vectormapping(void)
while (vector_paddr < end_paddr)
{
- up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr,
+ up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr,
vector_vaddr, MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs
index 9b978bb0d7..76aab70927 100644
--- a/arch/arm/src/rp2040/Make.defs
+++ b/arch/arm/src/rp2040/Make.defs
@@ -20,6 +20,8 @@
include armv6-m/Make.defs
+CFLAGS += -Wno-array-bounds
+
CHIP_CSRCS += rp2040_idle.c
CHIP_CSRCS += rp2040_irq.c
CHIP_CSRCS += rp2040_uart.c
diff --git a/arch/arm/src/sama5/sam_boot.c b/arch/arm/src/sama5/sam_boot.c
index bc9a0bb0fe..7efbb28f8e 100644
--- a/arch/arm/src/sama5/sam_boot.c
+++ b/arch/arm/src/sama5/sam_boot.c
@@ -181,7 +181,7 @@ static void sam_vectormapping(void)
while (vector_paddr < end_paddr)
{
- mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
+ mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
