On 5 juil. 2012, at 07:41, Nathan Day <nathan_...@mac.com> wrote: > It must if 64bits is read in that mean you have just read in two 32bit words. > So to put a 32bit word in a 64bit register some bit must be ditched, in some > way, and if the CPU is optimise to only work with 64bit word alignment (don't > know how intel does it), then to get 32 bit aligned words it must do some bit > shift.
Modern CPU do not enforce strict alignment for integer access. You can perfectly access a Dword (64 bits) at any address, even or odd. It is just more efficient to align 64-bits words at 8-bytes boundary, 32-bits at 4-bytes, etc. This contrasts with the old times: for example, on a 68000 processor, trying to access a 16-bit word at an odd address (e.g. move.w d0, (a0)+ with a0 odd) would result in a exception n°3 (address error). You still get boundary enforcement for SIMD instructions though (SSE, AVX). This is somehow reflected in C code through the use of special macros to instruct the compiler to respect these alignments. Vincent _______________________________________________ Cocoa-dev mailing list (Cocoa-dev@lists.apple.com) Please do not post admin requests or moderator comments to the list. Contact the moderators at cocoa-dev-admins(at)lists.apple.com Help/Unsubscribe/Update your Subscription: https://lists.apple.com/mailman/options/cocoa-dev/archive%40mail-archive.com This email sent to arch...@mail-archive.com
