The biggest issue with these sort of chips (this design is known as the
Intel Xeon Phi) is memory. 50+ cores sharing the same memory bus means that
cache miss penalties go through the roof. And unless these chips are
optimized for efficient CAS operations that can be a issue as well. See for
instance the CUDA recommendations on CAS: "it works, it's there, don't use
it if you value performance".

So I doubt simply plopping a JVM on this thing and booting Clojure will be
that impressive. Manycore introduces a whole new set of problems.

Timothy


On Sat, Apr 27, 2013 at 9:23 PM, Yves S. Garret
<yoursurrogate...@gmail.com>wrote:

> I'll take a blind stab at this and say that Erlang might actually do
> more poorly, unless the chip's interchip message passing is taken
> advantage of by Erlang.  If there's a separate piece of hardware
> taking on the role of being the messenger, having to waste computer
> cycles to send a message isn't terribly efficient.
>
>
> On Sat, Apr 27, 2013 at 11:17 PM, Cedric Greevey <cgree...@gmail.com>wrote:
>
>> On Sat, Apr 27, 2013 at 11:13 PM, Yves S. Garret <
>> yoursurrogate...@gmail.com> wrote:
>>
>>> How would this compare to Erlang?
>>>
>>>
>>> On Sat, Apr 27, 2013 at 10:51 PM, Cedric Greevey <cgree...@gmail.com>wrote:
>>>
>>>> https://en.wikipedia.org/wiki/Intel_MIC
>>>>
>>>> 50+ cores?! Clojure will leave every other language in the dust on
>>>> something like that, thanks to its inherently scaleable concurrency
>>>> constructs. Try writing a 50-threaded Java application without getting
>>>> deadlocks all over the place, or cheating and using very coarse-grained
>>>> locks (have fun with the task manager showing 2% CPU utilization when your
>>>> app is running full-bore!).
>>>>
>>>> If big, 32-bit addressing spaces were what made automatic memory
>>>> management really begin to come into its own (and with it, Java), then it's
>>>> doubtless 50-core machines that will make automatic concurrency management
>>>> really begin to come into its own.
>>>>
>>>
>> Erlang might also do well on such a machine. The actor model likely
>> involves more communication among the cores to get full utilization, but
>> then, the page describes some sort of message-passing system among the
>> cores on MIC, so ...
>>
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