On Fri, 19 Jun 2020 at 13:29, Robert Raszuk <[email protected]> wrote:
Hey, > What you are saying is technically true but not realistically important. > > Why - the answer is history of PTX. I think this is interesting anecdote, but not much more. > It was originally designed and architected on the very basis of hardware cost > and performance when you would only need to switch at rates MPLS. > > Well real world showed that you can't sell such box and IP switching has been > added to data plane there. IP switching was there day 1, just not at DFZ scale in Broadway. But indeed, they got DFZ scale at Paradise, using off-chip HMC. Which is bad in numerous ways, not just because it costs a lot (there is either 2 or 3 HMC chip for every PE chip, so like double the front-plate without HMC) but it also makes the device fragile. There are 6 PE chips per LC, so 3*6 18 HMC chips, any of these HMC chips gets any problem and it's a full linecard reload of 15-20min. Even though 2/3 of the HMC chips are just delay buffer, and could be reloaded locally without impacting anything else. The remaiing 1/3 is lookup tables, and it can be argued it's cheaper to reload whole linecard than figure out how to resynchornise the FIB. Anyhow this design adds your cost, removes your ports and increases your outages. > Bottom line - I doubt you will find any vendor (from OEM to big ones) which > can afford to differentiate price wise boxes which would do line rate MPLS > and any thing less then line rate for IP. And as such IP clearly brings a lot > of value for simplification of control plane and route aggregation and IMHO > is a good (well best) universal transport today for all types of services > from WAN via Campus to DCs (or even MSDCs). Maybe I'm naive, but I believe we can learn. -- ++ytti _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
