================ @@ -0,0 +1,15 @@ +// REQUIRES: riscv-registered-target ---------------- topperc wrote:
Does this really require the riscv target to be registered? We're not running any backend code. The clang binary includes the code for all targets. https://github.com/llvm/llvm-project/pull/206260 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
