llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-arm Author: Jonathan Thackray (jthackray) <details> <summary>Changes</summary> This introduces the Armv9.8-A architecture version, including the relevant command-line option for -march. More details about the Armv9.8-A architecture version can be found at: * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2026 * https://support.arm.com/documentation/109697/2026_09/2026-Architecture-Extensions * https://support.arm.com/documentation/109697/2026_09/Future-Architecture-Technologies * https://support.arm.com/documentation/ddi0602/2026-09/ --- <sub>Stack created with <a href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub> --- Patch is 24.55 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/229361.diff 21 Files Affected: - (modified) clang/lib/Basic/Targets/AArch64.cpp (+11) - (modified) clang/lib/Basic/Targets/AArch64.h (+2) - (modified) clang/lib/Basic/Targets/ARM.cpp (+4) - (modified) clang/test/CodeGen/arm-acle-coproc.c (+2) - (added) clang/test/Driver/aarch64-v98a.c (+19) - (modified) clang/test/Driver/arm-cortex-cpus-1.c (+16) - (modified) clang/test/Preprocessor/aarch64-target-features.c (+2) - (modified) clang/test/Preprocessor/arm-target-features.c (+5) - (modified) llvm/docs/ReleaseNotes.md (+3) - (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+3-3) - (modified) llvm/include/llvm/TargetParser/ARMTargetParser.def (+5) - (modified) llvm/include/llvm/TargetParser/Triple.h (+1) - (modified) llvm/lib/Target/AArch64/AArch64Features.td (+7) - (modified) llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (+2) - (modified) llvm/lib/Target/ARM/ARMArchitectures.td (+12) - (modified) llvm/lib/Target/ARM/ARMFeatures.td (+5) - (modified) llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp (+1) - (modified) llvm/lib/TargetParser/ARMTargetParser.cpp (+2) - (modified) llvm/lib/TargetParser/ARMTargetParserCommon.cpp (+1) - (modified) llvm/lib/TargetParser/Triple.cpp (+2) - (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+8-2) ``````````diff diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index a4841514be35e..3c53acb8cee4e 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -400,6 +400,12 @@ void AArch64TargetInfo::getTargetDefinesARMV97A(const LangOptions &Opts, getTargetDefinesARMV96A(Opts, Builder); } +void AArch64TargetInfo::getTargetDefinesARMV98A(const LangOptions &Opts, + MacroBuilder &Builder) const { + // Armv9.8-A does not have a v8.* equivalent, but is a superset of v9.7-A. + getTargetDefinesARMV97A(Opts, Builder); +} + void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { // Target identification. @@ -766,6 +772,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, getTargetDefinesARMV96A(Opts, Builder); else if (*ArchInfo == llvm::AArch64::ARMV9_7A) getTargetDefinesARMV97A(Opts, Builder); + else if (*ArchInfo == llvm::AArch64::ARMV9_8A) + getTargetDefinesARMV98A(Opts, Builder); // All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8|16) builtins work. Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1"); @@ -1279,6 +1287,9 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features, if (Feature == "+v9.7a" && ArchInfo->Version < llvm::AArch64::ARMV9_7A.Version) ArchInfo = &llvm::AArch64::ARMV9_7A; + if (Feature == "+v9.8a" && + ArchInfo->Version < llvm::AArch64::ARMV9_8A.Version) + ArchInfo = &llvm::AArch64::ARMV9_8A; if (Feature == "+v8r") ArchInfo = &llvm::AArch64::ARMV8R; if (Feature == "+fullfp16") { diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index 3ccfa265399be..ed5c0559f460e 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -185,6 +185,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { MacroBuilder &Builder) const; void getTargetDefinesARMV97A(const LangOptions &Opts, MacroBuilder &Builder) const; + void getTargetDefinesARMV98A(const LangOptions &Opts, + MacroBuilder &Builder) const; void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index 0e424d031700b..091df5ff82847 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -196,6 +196,8 @@ StringRef ARMTargetInfo::getCPUAttr() const { return "9_6A"; case llvm::ARM::ArchKind::ARMV9_7A: return "9_7A"; + case llvm::ARM::ArchKind::ARMV9_8A: + return "9_8A"; case llvm::ARM::ArchKind::ARMV8MBaseline: return "8M_BASE"; case llvm::ARM::ArchKind::ARMV8MMainline: @@ -869,6 +871,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, case llvm::ARM::ArchKind::ARMV9_5A: case llvm::ARM::ArchKind::ARMV9_6A: case llvm::ARM::ArchKind::ARMV9_7A: + case llvm::ARM::ArchKind::ARMV9_8A: // Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3; break; @@ -1040,6 +1043,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, case llvm::ARM::ArchKind::ARMV9_5A: case llvm::ARM::ArchKind::ARMV9_6A: case llvm::ARM::ArchKind::ARMV9_7A: + case llvm::ARM::ArchKind::ARMV9_8A: getTargetDefinesARMV83A(Opts, Builder); break; } diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c index 000fff632f0b7..989bbd7c73754 100644 --- a/clang/test/CodeGen/arm-acle-coproc.c +++ b/clang/test/CodeGen/arm-acle-coproc.c @@ -27,6 +27,7 @@ // RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple armv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple armv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s +// RUN: %clang_cc1 -triple armv9.8a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s // RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s // RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s @@ -58,6 +59,7 @@ // RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s +// RUN: %clang_cc1 -triple thumbv9.8a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s // RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s // RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s diff --git a/clang/test/Driver/aarch64-v98a.c b/clang/test/Driver/aarch64-v98a.c new file mode 100644 index 0000000000000..b578c577d00a1 --- /dev/null +++ b/clang/test/Driver/aarch64-v98a.c @@ -0,0 +1,19 @@ +// ===== Base v9.8a architecture ===== + +// RUN: %clang -target aarch64 -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// RUN: %clang -target aarch64 -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s +// GENERICV98A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.8a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}} + +// RUN: %clang -target aarch64_be -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// RUN: %clang -target aarch64_be -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s +// GENERICV98A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.8a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}} + +// ===== Features supported on aarch64 ===== diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c index 08cb63b1a9230..535541bc2706c 100644 --- a/clang/test/Driver/arm-cortex-cpus-1.c +++ b/clang/test/Driver/arm-cortex-cpus-1.c @@ -529,3 +529,19 @@ // RUN: %clang -target arm -march=armebv9.7a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s // RUN: %clang -target arm -march=armebv9.7-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s // CHECK-BE-V97A: "-cc1"{{.*}} "-triple" "armebv9.7{{.*}}" "-target-cpu" "generic" +// +// RUN: %clang -target armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// RUN: %clang -target arm -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// RUN: %clang -target arm -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// RUN: %clang -target armv9.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// RUN: %clang -target arm -march=armv9.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// RUN: %clang -target arm -march=armv9.8-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s +// CHECK-V98A: "-cc1"{{.*}} "-triple" "armv9.8{{.*}}" "-target-cpu" "generic" + +// RUN: %clang -target armebv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// RUN: %clang -target armv9.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// RUN: %clang -target armeb -march=armebv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// RUN: %clang -target armeb -march=armebv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// RUN: %clang -target arm -march=armebv9.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// RUN: %clang -target arm -march=armebv9.8-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s +// CHECK-BE-V98A: "-cc1"{{.*}} "-triple" "armebv9.8{{.*}}" "-target-cpu" "generic" diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index a3ded91d5695f..5a7ada1a78fdc 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -217,6 +217,7 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // CHECK-SVE2: __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-SVE2: __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 @@ -698,6 +699,7 @@ // RUN: %clang -target aarch64-none-elf -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s +// RUN: %clang -target aarch64-none-elf -march=armv9.8-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // CHECK-V81-OR-LATER: __ARM_FEATURE_ATOMICS 1 // CHECK-V85-OR-LATER: __ARM_FEATURE_BTI 1 // CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1 diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c index 689cd8184fd3b..9db77507ab327 100644 --- a/clang/test/Preprocessor/arm-target-features.c +++ b/clang/test/Preprocessor/arm-target-features.c @@ -939,6 +939,11 @@ // CHECK-V97A: #define __ARM_ARCH_9_7A__ 1 // CHECK-V97A: #define __ARM_ARCH_PROFILE 'A' +// RUN: %clang -target armv9.8a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V98A %s +// CHECK-V98A: #define __ARM_ARCH 9 +// CHECK-V98A: #define __ARM_ARCH_9_8A__ 1 +// CHECK-V98A: #define __ARM_ARCH_PROFILE 'A' + // RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s // CHECK-SOFTVFP-NOT: #define __ARM_FP 0x diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index 7c09b303442a3..8b45d4a4b5256 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -234,6 +234,9 @@ Makes programs 10x faster by doing Special New Thing. ### Changes to the AArch64 Backend +* Assembler/disassembler support has been added for Armv9.8-A (2026) + architecture extensions. + ### Changes to the AMDGPU Backend * Replaced `xnack` and `sramecc` target features with `amdgpu.xnack` diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index 7dfd4f6678240..51ea58a3ec413 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -124,9 +124,9 @@ struct ArchInfo { // Defines the following partial order, indicating when an architecture is // a superset of another: // - // v9.7a > v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a; - // v v v v v - // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > ... > v8a; + // v9.8a > v9.7a > v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a; + // v v v v v + // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > ... // // v8r has no relation to anything. This is used to determine which // features to enable for a given architecture. See diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def index 27dbfcaf07b42..f3aab7cd34da9 100644 --- a/llvm/include/llvm/TargetParser/ARMTargetParser.def +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def @@ -192,6 +192,11 @@ ARM_ARCH("armv9.7-a", ARMV9_7A, "9.7-A", "+v9.7a", ARMBuildAttrs::CPUArch::v9_A, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM)) +ARM_ARCH("armv9.8-a", ARMV9_8A, "9.8-A", "+v9.8a", ARMBuildAttrs::CPUArch::v9_A, + FK_NEON_FP_ARMV8, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | + ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM)) ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R, FK_FPV5_SP_D16, (ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h index 98760af2ac296..6fb2904def2e5 100644 --- a/llvm/include/llvm/TargetParser/Triple.h +++ b/llvm/include/llvm/TargetParser/Triple.h @@ -120,6 +120,7 @@ class Triple { enum SubArchType { NoSubArch, + ARMSubArch_v9_8a, ARMSubArch_v9_7a, ARMSubArch_v9_6a, ARMSubArch_v9_5a, diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td index 440151ae6f4e1..cda947c1bbea0 100644 --- a/llvm/lib/Target/AArch64/AArch64Features.td +++ b/llvm/lib/Target/AArch64/AArch64Features.td @@ -617,6 +617,10 @@ def FeatureF16F32DOT : ExtensionWithMArch<"f16f32dot", "F16F32DOT", "FEAT_F16F32 def FeatureF16F32MM : ExtensionWithMArch<"f16f32mm", "F16F32MM", "FEAT_F16F32MM", "Enable Armv9.7-A Advanced SIMD half-precision matrix multiply-accumulate to single-precision", [FeatureNEON, FeatureFullFP16]>; +//===----------------------------------------------------------------------===// +// Armv9.8 Architecture Extensions +//===----------------------------------------------------------------------===// + //===----------------------------------------------------------------------===// // Future Architecture Technologies //===----------------------------------------------------------------------===// @@ -1121,6 +1125,9 @@ def HasV9_7aOps : Architecture64<9, 7, "a", "v9.7a", [HasV9_6aOps, FeatureSVE2p3, FeatureFPRCVT, FeatureF16F32DOT], !listconcat(HasV9_6aOps.DefaultExts, [FeatureSVE2p3, FeatureFPRCVT, FeatureF16F32DOT])>; +def HasV9_8aOps : Architecture64<9, 8, "a", "v9.8a", + [HasV9_7aOps], + HasV9_7aOps.DefaultExts>; def HasV8_0rOps : Architecture64<8, 0, "r", "v8r", [ //v8.1 FeatureCRC, FeaturePAN, FeatureLSE, FeatureCONTEXTIDREL2, diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index aaa54e658bcc7..b2928485d46ad 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3797,6 +3797,8 @@ static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) { Str += "ARMv9.6a"; else if (FBS[AArch64::HasV9_7aOps]) Str += "ARMv9.7a"; + else if (FBS[AArch64::HasV9_8aOps]) + Str += "ARMv9.8a"; else if (FBS[AArch64::HasV8_0rOps]) Str += "ARMv8r"; else { diff --git a/llvm/lib/Target/ARM/ARMArchitectures.td b/llvm/lib/Target/ARM/ARMArchitectures.td index 9e5bf00007f3f..f2a0e29cabf80 100644 --- a/llvm/lib/Target/ARM/ARMArchitectures.td +++ b/llvm/lib/Target/ARM/ARMArchitectures.td @@ -313,6 +313,18 @@ def ARMv97a : Architecture<"armv9.7-a", "ARMv97a", [HasV9_7aOps, FeatureCRC, FeatureRAS, FeatureDotProd]>; +def ARMv98a : Architecture<"armv9.8-a", "ARMv98a", [HasV9_8aOps, + FeatureAClass, + FeatureDB, + FeatureFPARMv8, + FeatureNEON, + FeatureDSP, + FeatureTrustZone, + FeatureMP, + FeatureVirtualization, + FeatureCRC, + FeatureRAS, + FeatureDotProd]>; def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops, FeatureRClass, FeatureDB, diff --git a/llvm/lib/Target/ARM/ARMFeatures.td b/llvm/lib/Target/ARM/ARMFeatures.td index 3797ae45a1f1e..581f8c9590e4d 100644 --- a/llvm/lib/Target/ARM/ARMFeatures.td +++ b/llvm/lib/Target/ARM/ARMFeatures.td @@ -769,6 +769,11 @@ def HasV9_7aOps : SubtargetFeature<"v9.7a", "HasV9_7aOps", "true", "Support ARM v9.7a instructions", [HasV9_6aOps]>; +// Armv9.8-A is a v9-only architecture. +def HasV9_8aOps : SubtargetFeature<"v9.8a", "HasV9_8aOps", "true", + "Support ARM v9.8a instructions", + [HasV9_7aOps]>; + def HasV8_1MMainlineOps : SubtargetFeature< "v8.1m.main", "HasV8_1MMainlineOps", "true", "Support ARM v8-1M Mainline instructions", diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp index 0397eef92c856..f51a8fd890f3e 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp @@ -902,6 +902,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() { case ARM::ArchKind::ARMV9_5A: case ARM::ArchKind::ARMV9_6A: case ARM::ArchKind::ARMV9_7A: + case ARM::ArchKind::ARMV9_8A: S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false); S.setAttributeItem(ARM_ISA_use, Allowed, false); S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false); diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp index 0da4c2a524b31..783150eef34f5 100644 --- a/llvm/lib/TargetParser/ARMTargetParser.cpp +++ b/llvm/lib/TargetParser/ARMTargetParser.cpp @@ -88,6 +88,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) { case ArchKind::ARMV9_5A: case ArchKind::ARMV9_6A: case ArchKind::ARMV9_7A: + case Ar... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/229361 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
