https://github.com/TelGome created https://github.com/llvm/llvm-project/pull/227211
This pr support [Packed Widening Unzip](https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-widening-unzip) >From 68e3b8c4e71790fded5f82575962f9158b65044b Mon Sep 17 00:00:00 2001 From: Dongyan Chen <[email protected]> Date: Tue, 29 Sep 2026 07:29:07 +0000 Subject: [PATCH] [RISCV][P-ext] Support Packed Widening Unzip --- clang/lib/Headers/riscv_packed_simd.h | 58 +++ clang/test/CodeGen/RISCV/rvp-intrinsics.c | 460 ++++++++++++++++++ .../riscv_packed_simd.c | 156 ++++++ 3 files changed, 674 insertions(+) diff --git a/clang/lib/Headers/riscv_packed_simd.h b/clang/lib/Headers/riscv_packed_simd.h index a1b610204be64..78879b9765c4b 100644 --- a/clang/lib/Headers/riscv_packed_simd.h +++ b/clang/lib/Headers/riscv_packed_simd.h @@ -346,6 +346,21 @@ typedef uint32_t uint32x2_t __attribute__((__vector_size__(8))); 7, 15); \ } +#define __packed_wunzip_ext(name, rty, ty, ext) \ + static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \ + return ext(__rs1); \ + } + +#define __packed_wunzip_shift(name, rty, ty, op, shamt) \ + static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \ + return (rty)__rs1 op shamt; \ + } + +#define __packed_wunzip_odd_hi(name, rty, ty, zip) \ + static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \ + return (rty)zip((rty){0}, (rty)__rs1); \ + } + #define __packed_abdsum(name, rty, ty, builtin) \ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, \ ty __rs2) { \ @@ -1075,6 +1090,46 @@ __packed_unary_builtin(psext_h_i32x2, int32x2_t, __builtin_riscv_psext_h_i32x2) __packed_unary_builtin(pzext_b_u16x4, uint16x4_t, __builtin_riscv_pzext_b_u16x4) __packed_unary_builtin(pzext_h_u32x2, uint32x2_t, __builtin_riscv_pzext_h_u32x2) +/* Packed Widening Unzip (32-bit) */ +__packed_wunzip_ext(pwunzipe_i16x2, int16x2_t, int8x4_t, + __riscv_psext_b_i16x2) +__packed_wunzip_shift(pwunzipo_i16x2, int16x2_t, int8x4_t, >>, 8) +__packed_wunzip_ext(pwunzipue_u16x2, uint16x2_t, uint8x4_t, + __riscv_pzext_b_u16x2) +__packed_wunzip_shift(pwunzipuo_u16x2, uint16x2_t, uint8x4_t, >>, 8) +__packed_wunzip_shift(pwunziphe_i16x2, int16x2_t, int8x4_t, <<, 8) +__packed_wunzip_shift(pwunziphe_u16x2, uint16x2_t, uint8x4_t, <<, 8) +__packed_wunzip_odd_hi(pwunzipho_i16x2, int16x2_t, int8x4_t, + __riscv_pnziph_i8x4) +__packed_wunzip_odd_hi(pwunzipho_u16x2, uint16x2_t, uint8x4_t, + __riscv_pnziph_u8x4) + +/* Packed Widening Unzip (64-bit) */ +__packed_wunzip_ext(pwunzipe_i16x4, int16x4_t, int8x8_t, + __riscv_psext_b_i16x4) +__packed_wunzip_shift(pwunzipo_i16x4, int16x4_t, int8x8_t, >>, 8) +__packed_wunzip_ext(pwunzipue_u16x4, uint16x4_t, uint8x8_t, + __riscv_pzext_b_u16x4) +__packed_wunzip_shift(pwunzipuo_u16x4, uint16x4_t, uint8x8_t, >>, 8) +__packed_wunzip_ext(pwunzipe_i32x2, int32x2_t, int16x4_t, + __riscv_psext_h_i32x2) +__packed_wunzip_shift(pwunzipo_i32x2, int32x2_t, int16x4_t, >>, 16) +__packed_wunzip_ext(pwunzipue_u32x2, uint32x2_t, uint16x4_t, + __riscv_pzext_h_u32x2) +__packed_wunzip_shift(pwunzipuo_u32x2, uint32x2_t, uint16x4_t, >>, 16) +__packed_wunzip_shift(pwunziphe_i16x4, int16x4_t, int8x8_t, <<, 8) +__packed_wunzip_odd_hi(pwunzipho_i16x4, int16x4_t, int8x8_t, + __riscv_pnziph_i8x8) +__packed_wunzip_shift(pwunziphe_u16x4, uint16x4_t, uint8x8_t, <<, 8) +__packed_wunzip_odd_hi(pwunzipho_u16x4, uint16x4_t, uint8x8_t, + __riscv_pnziph_u8x8) +__packed_wunzip_shift(pwunziphe_i32x2, int32x2_t, int16x4_t, <<, 16) +__packed_wunzip_odd_hi(pwunzipho_i32x2, int32x2_t, int16x4_t, + __riscv_pnziph_i16x4) +__packed_wunzip_shift(pwunziphe_u32x2, uint32x2_t, uint16x4_t, <<, 16) +__packed_wunzip_odd_hi(pwunzipho_u32x2, uint32x2_t, uint16x4_t, + __riscv_pnziph_u16x4) + /* Packed "Q-format" Multiplication (32-bit) */ __packed_binary_builtin(pmulq_i16x2, int16x2_t, __builtin_riscv_pmulq_i16x2) __packed_binary_builtin(pmulqr_i16x2, int16x2_t, __builtin_riscv_pmulqr_i16x2) @@ -1456,6 +1511,9 @@ __packed_reinterpret(u32x2_i32x2, int32x2_t, uint32x2_t) #undef __packed_nzip4 #undef __packed_nziph2 #undef __packed_nziph4 +#undef __packed_wunzip_ext +#undef __packed_wunzip_shift +#undef __packed_wunzip_odd_hi #undef __packed_abdsum #undef __packed_ternary_builtin_cast #undef __packed_extract diff --git a/clang/test/CodeGen/RISCV/rvp-intrinsics.c b/clang/test/CodeGen/RISCV/rvp-intrinsics.c index 873400da8c6d1..93c6e6e441c3e 100644 --- a/clang/test/CodeGen/RISCV/rvp-intrinsics.c +++ b/clang/test/CodeGen/RISCV/rvp-intrinsics.c @@ -8704,3 +8704,463 @@ int16x4_t test_psati_i16x4(int16x4_t a) { return __riscv_psati_i16x4(a, 8); } // CHECK-NEXT: ret i64 [[TMP2]] // int32x2_t test_psati_i32x2(int32x2_t a) { return __riscv_psati_i32x2(a, 16); } + +/* Packed Widening Unzip (32-bit) */ + +// RV32-LABEL: define dso_local i32 @test_pwunzipe_i16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.psext.b.v2i16(<2 x i16> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipe_i16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.psext.b.v2i16(<2 x i16> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +int16x2_t test_pwunzipe_i16x2(int8x4_t a) { return __riscv_pwunzipe_i16x2(a); } + +// RV32-LABEL: define dso_local i32 @test_pwunzipo_i16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[SHR_I:%.*]] = ashr <2 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipo_i16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[SHR_I:%.*]] = ashr <2 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +int16x2_t test_pwunzipo_i16x2(int8x4_t a) { return __riscv_pwunzipo_i16x2(a); } + +// RV32-LABEL: define dso_local i32 @test_pwunzipue_u16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.pzext.b.v2i16(<2 x i16> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipue_u16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.pzext.b.v2i16(<2 x i16> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint16x2_t test_pwunzipue_u16x2(uint8x4_t a) { + return __riscv_pwunzipue_u16x2(a); +} + +// RV32-LABEL: define dso_local i32 @test_pwunzipuo_u16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[SHR_I:%.*]] = lshr <2 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipuo_u16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[SHR_I:%.*]] = lshr <2 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +uint16x2_t test_pwunzipuo_u16x2(uint8x4_t a) { + return __riscv_pwunzipuo_u16x2(a); +} + +// RV32-LABEL: define dso_local i32 @test_pwunziphe_i16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunziphe_i16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +int16x2_t test_pwunziphe_i16x2(int8x4_t a) { return __riscv_pwunziphe_i16x2(a); } + +// RV32-LABEL: define dso_local i32 @test_pwunziphe_u16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunziphe_u16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +uint16x2_t test_pwunziphe_u16x2(uint8x4_t a) { + return __riscv_pwunziphe_u16x2(a); +} + +// RV32-LABEL: define dso_local i32 @test_pwunzipho_i16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipho_i16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +int16x2_t test_pwunzipho_i16x2(int8x4_t a) { return __riscv_pwunzipho_i16x2(a); } + +// RV32-LABEL: define dso_local i32 @test_pwunzipho_u16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32 +// RV32-NEXT: ret i32 [[TMP1]] +// +// RV64-LABEL: define dso_local i32 @test_pwunzipho_u16x2( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32 +// RV64-NEXT: ret i32 [[TMP1]] +// +uint16x2_t test_pwunzipho_u16x2(uint8x4_t a) { + return __riscv_pwunzipho_u16x2(a); +} + +/* Packed Widening Unzip (64-bit) */ + +// RV32-LABEL: define dso_local i64 @test_pwunzipe_i16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.psext.b.v4i16(<4 x i16> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64 +// RV32-NEXT: ret i64 [[TMP2]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipe_i16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.psext.b.v4i16(<4 x i16> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64 +// RV64-NEXT: ret i64 [[TMP2]] +// +int16x4_t test_pwunzipe_i16x4(int8x8_t a) { return __riscv_pwunzipe_i16x4(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipo_i16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHR_I:%.*]] = ashr <4 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipo_i16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHR_I:%.*]] = ashr <4 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int16x4_t test_pwunzipo_i16x4(int8x8_t a) { return __riscv_pwunzipo_i16x4(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipue_u16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.pzext.b.v4i16(<4 x i16> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64 +// RV32-NEXT: ret i64 [[TMP2]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipue_u16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.pzext.b.v4i16(<4 x i16> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64 +// RV64-NEXT: ret i64 [[TMP2]] +// +uint16x4_t test_pwunzipue_u16x4(uint8x8_t a) { + return __riscv_pwunzipue_u16x4(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunzipuo_u16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHR_I:%.*]] = lshr <4 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipuo_u16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHR_I:%.*]] = lshr <4 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint16x4_t test_pwunzipuo_u16x4(uint8x8_t a) { + return __riscv_pwunzipuo_u16x4(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunzipe_i32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.psext.h.v2i32(<2 x i32> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64 +// RV32-NEXT: ret i64 [[TMP2]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipe_i32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.psext.h.v2i32(<2 x i32> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64 +// RV64-NEXT: ret i64 [[TMP2]] +// +int32x2_t test_pwunzipe_i32x2(int16x4_t a) { return __riscv_pwunzipe_i32x2(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipo_i32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[SHR_I:%.*]] = ashr <2 x i32> [[TMP0]], splat (i32 16) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipo_i32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[SHR_I:%.*]] = ashr <2 x i32> [[TMP0]], splat (i32 16) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int32x2_t test_pwunzipo_i32x2(int16x4_t a) { return __riscv_pwunzipo_i32x2(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipue_u32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.pzext.h.v2i32(<2 x i32> [[TMP0]]) +// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64 +// RV32-NEXT: ret i64 [[TMP2]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipue_u32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.pzext.h.v2i32(<2 x i32> [[TMP0]]) +// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64 +// RV64-NEXT: ret i64 [[TMP2]] +// +uint32x2_t test_pwunzipue_u32x2(uint16x4_t a) { + return __riscv_pwunzipue_u32x2(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunzipuo_u32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[SHR_I:%.*]] = lshr <2 x i32> [[TMP0]], splat (i32 16) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipuo_u32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[SHR_I:%.*]] = lshr <2 x i32> [[TMP0]], splat (i32 16) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint32x2_t test_pwunzipuo_u32x2(uint16x4_t a) { + return __riscv_pwunzipuo_u32x2(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunziphe_i16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunziphe_i16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int16x4_t test_pwunziphe_i16x4(int8x8_t a) { return __riscv_pwunziphe_i16x4(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunziphe_u16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunziphe_u16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint16x4_t test_pwunziphe_u16x4(uint8x8_t a) { + return __riscv_pwunziphe_u16x4(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunzipho_i16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipho_i16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int16x4_t test_pwunzipho_i16x4(int8x8_t a) { return __riscv_pwunzipho_i16x4(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipho_u16x4( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipho_u16x4( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint16x4_t test_pwunzipho_u16x4(uint8x8_t a) { + return __riscv_pwunzipho_u16x4(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunziphe_i32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunziphe_i32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int32x2_t test_pwunziphe_i32x2(int16x4_t a) { return __riscv_pwunziphe_i32x2(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunziphe_u32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16) +// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunziphe_u32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32> +// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16) +// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint32x2_t test_pwunziphe_u32x2(uint16x4_t a) { + return __riscv_pwunziphe_u32x2(a); +} + +// RV32-LABEL: define dso_local i64 @test_pwunzipho_i32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipho_i32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +int32x2_t test_pwunzipho_i32x2(int16x4_t a) { return __riscv_pwunzipho_i32x2(a); } + +// RV32-LABEL: define dso_local i64 @test_pwunzipho_u32x2( +// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64 +// RV32-NEXT: ret i64 [[TMP1]] +// +// RV64-LABEL: define dso_local i64 @test_pwunzipho_u32x2( +// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16> +// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> +// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64 +// RV64-NEXT: ret i64 [[TMP1]] +// +uint32x2_t test_pwunzipho_u32x2(uint16x4_t a) { + return __riscv_pwunzipho_u32x2(a); +} diff --git a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c index d2296665c952f..d72f8fbf76ac9 100644 --- a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c +++ b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c @@ -5251,3 +5251,159 @@ uint16x4_t test_pset_u16x2_u16x4_lo(uint16x4_t v, uint16x2_t s) { uint16x4_t test_pset_u16x2_u16x4_hi(uint16x4_t v, uint16x2_t s) { return __riscv_pset_u16x2_u16x4(v, s, 1); } + +// CHECK-LABEL: test_pwunzipe_i16x2: +// RV32: psext.h.b{{[[:space:]]}} +// RV64: psext.h.b{{[[:space:]]}} +int16x2_t test_pwunzipe_i16x2(int8x4_t a) { return __riscv_pwunzipe_i16x2(a); } + +// CHECK-LABEL: test_pwunzipo_i16x2: +// RV32: psrai.h{{[[:space:]]}} +// RV64: psrai.h{{[[:space:]]}} +int16x2_t test_pwunzipo_i16x2(int8x4_t a) { return __riscv_pwunzipo_i16x2(a); } + +// CHECK-LABEL: test_pwunzipue_u16x2: +// RV32: pzext.h.b{{[[:space:]]}} +// RV64: pzext.h.b{{[[:space:]]}} +uint16x2_t test_pwunzipue_u16x2(uint8x4_t a) { + return __riscv_pwunzipue_u16x2(a); +} + +// CHECK-LABEL: test_pwunzipuo_u16x2: +// RV32: psrli.h{{[[:space:]]}} +// RV64: psrli.h{{[[:space:]]}} +uint16x2_t test_pwunzipuo_u16x2(uint8x4_t a) { + return __riscv_pwunzipuo_u16x2(a); +} + +// CHECK-LABEL: test_pwunziphe_i16x2: +// RV32: pslli.h{{[[:space:]]}} +// RV64: pslli.h{{[[:space:]]}} +int16x2_t test_pwunziphe_i16x2(int8x4_t a) { + return __riscv_pwunziphe_i16x2(a); +} + +// CHECK-LABEL: test_pwunziphe_u16x2: +// RV32: pslli.h{{[[:space:]]}} +// RV64: pslli.h{{[[:space:]]}} +uint16x2_t test_pwunziphe_u16x2(uint8x4_t a) { + return __riscv_pwunziphe_u16x2(a); +} + +// CHECK-LABEL: test_pwunzipho_i16x2: +// RV32: ppaireo.b{{[[:space:]]}} +// RV64: ppaireo.b{{[[:space:]]}} +int16x2_t test_pwunzipho_i16x2(int8x4_t a) { + return __riscv_pwunzipho_i16x2(a); +} + +// CHECK-LABEL: test_pwunzipho_u16x2: +// RV32: ppaireo.b{{[[:space:]]}} +// RV64: ppaireo.b{{[[:space:]]}} +uint16x2_t test_pwunzipho_u16x2(uint8x4_t a) { + return __riscv_pwunzipho_u16x2(a); +} + +// CHECK-LABEL: test_pwunzipe_i16x4: +// RV32: psext.dh.b{{[[:space:]]}} +// RV64: psext.h.b{{[[:space:]]}} +int16x4_t test_pwunzipe_i16x4(int8x8_t a) { return __riscv_pwunzipe_i16x4(a); } + +// CHECK-LABEL: test_pwunzipo_i16x4: +// RV32: psrai.dh{{[[:space:]]}} +// RV64: psrai.h{{[[:space:]]}} +int16x4_t test_pwunzipo_i16x4(int8x8_t a) { return __riscv_pwunzipo_i16x4(a); } + +// CHECK-LABEL: test_pwunzipue_u16x4: +// RV32: pzext.dh.b{{[[:space:]]}} +// RV64: pzext.h.b{{[[:space:]]}} +uint16x4_t test_pwunzipue_u16x4(uint8x8_t a) { + return __riscv_pwunzipue_u16x4(a); +} + +// CHECK-LABEL: test_pwunzipuo_u16x4: +// RV32: psrli.dh{{[[:space:]]}} +// RV64: psrli.h{{[[:space:]]}} +uint16x4_t test_pwunzipuo_u16x4(uint8x8_t a) { + return __riscv_pwunzipuo_u16x4(a); +} + +// CHECK-LABEL: test_pwunzipe_i32x2: +// RV32: psext.dw.h{{[[:space:]]}} +// RV64: psext.w.h{{[[:space:]]}} +int32x2_t test_pwunzipe_i32x2(int16x4_t a) { return __riscv_pwunzipe_i32x2(a); } + +// CHECK-LABEL: test_pwunzipo_i32x2: +// RV32: psrai.dw{{[[:space:]]}} +// RV64: psrai.w{{[[:space:]]}} +int32x2_t test_pwunzipo_i32x2(int16x4_t a) { return __riscv_pwunzipo_i32x2(a); } + +// CHECK-LABEL: test_pwunzipue_u32x2: +// RV32: pzext.dw.h{{[[:space:]]}} +// RV64: pzext.w.h{{[[:space:]]}} +uint32x2_t test_pwunzipue_u32x2(uint16x4_t a) { + return __riscv_pwunzipue_u32x2(a); +} + +// CHECK-LABEL: test_pwunzipuo_u32x2: +// RV32: psrli.dw{{[[:space:]]}} +// RV64: psrli.w{{[[:space:]]}} +uint32x2_t test_pwunzipuo_u32x2(uint16x4_t a) { + return __riscv_pwunzipuo_u32x2(a); +} + +// CHECK-LABEL: test_pwunziphe_i16x4: +// RV32: pslli.dh{{[[:space:]]}} +// RV64: pslli.h{{[[:space:]]}} +int16x4_t test_pwunziphe_i16x4(int8x8_t a) { + return __riscv_pwunziphe_i16x4(a); +} + +// CHECK-LABEL: test_pwunziphe_u16x4: +// RV32: pslli.dh{{[[:space:]]}} +// RV64: pslli.h{{[[:space:]]}} +uint16x4_t test_pwunziphe_u16x4(uint8x8_t a) { + return __riscv_pwunziphe_u16x4(a); +} + +// CHECK-LABEL: test_pwunzipho_i16x4: +// RV32: ppaireo.db{{[[:space:]]}} +// RV64: ppaireo.b{{[[:space:]]}} +int16x4_t test_pwunzipho_i16x4(int8x8_t a) { + return __riscv_pwunzipho_i16x4(a); +} + +// CHECK-LABEL: test_pwunzipho_u16x4: +// RV32: ppaireo.db{{[[:space:]]}} +// RV64: ppaireo.b{{[[:space:]]}} +uint16x4_t test_pwunzipho_u16x4(uint8x8_t a) { + return __riscv_pwunzipho_u16x4(a); +} + +// CHECK-LABEL: test_pwunziphe_i32x2: +// RV32: pslli.dw{{[[:space:]]}} +// RV64: pslli.w{{[[:space:]]}} +int32x2_t test_pwunziphe_i32x2(int16x4_t a) { + return __riscv_pwunziphe_i32x2(a); +} + +// CHECK-LABEL: test_pwunziphe_u32x2: +// RV32: pslli.dw{{[[:space:]]}} +// RV64: pslli.w{{[[:space:]]}} +uint32x2_t test_pwunziphe_u32x2(uint16x4_t a) { + return __riscv_pwunziphe_u32x2(a); +} + +// CHECK-LABEL: test_pwunzipho_i32x2: +// RV32: ppaireo.dh{{[[:space:]]}} +// RV64: ppaireo.h{{[[:space:]]}} +int32x2_t test_pwunzipho_i32x2(int16x4_t a) { + return __riscv_pwunzipho_i32x2(a); +} + +// CHECK-LABEL: test_pwunzipho_u32x2: +// RV32: ppaireo.dh{{[[:space:]]}} +// RV64: ppaireo.h{{[[:space:]]}} +uint32x2_t test_pwunzipho_u32x2(uint16x4_t a) { + return __riscv_pwunzipho_u32x2(a); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
