llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-spir-v @llvm/pr-subscribers-hlsl Author: Kaitlin Peng (kmpeng) <details> <summary>Changes</summary> Closes #<!-- -->184491. This PR implements the matrix api for `abs` in `HLSLintrinsics.td`, adds matrix codegen tests, matrix sema tests, and SPIRV matrix backend tests. DirectX matrix backend tests were not added because no DirectX backend changes were made. Assisted-by: Claude Opus 4.8 --- Patch is 32.74 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/227131.diff 6 Files Affected: - (modified) clang/include/clang/Basic/HLSLIntrinsics.td (-2) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+2) - (added) clang/test/CodeGenHLSL/builtins/abs_mat.hlsl (+564) - (added) clang/test/SemaHLSL/BuiltIns/abs_mat-errors.hlsl (+22) - (modified) llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp (+1) - (added) llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs_mat.ll (+115) ``````````diff diff --git a/clang/include/clang/Basic/HLSLIntrinsics.td b/clang/include/clang/Basic/HLSLIntrinsics.td index f067d060d5a2d..d0a8d5b456a99 100644 --- a/clang/include/clang/Basic/HLSLIntrinsics.td +++ b/clang/include/clang/Basic/HLSLIntrinsics.td @@ -326,7 +326,6 @@ def hlsl_abs : HLSLOneArgBuiltin<"abs", "__builtin_elementwise_abs"> { }]; let VaryingTypes = SignedTypes; let VaryingLongVector = 1; - let VaryingMatDims = []; } // Unsigned abs is a constexpr identity - unsigned values are already non-negative. @@ -344,7 +343,6 @@ function returns its input unchanged. let IsConstexpr = 1; let VaryingTypes = UnsignedIntTypes; let VaryingLongVector = 1; - let VaryingMatDims = []; } // Returns the arccosine of the input value, Val. diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index f500162532777..233609605fb21 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -4351,6 +4351,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, if (auto *VecTy = QT->getAs<VectorType>()) QT = VecTy->getElementType(); + else if (auto *MatTy = QT->getAs<ConstantMatrixType>()) + QT = MatTy->getElementType(); if (QT->isIntegerType()) Result = Builder.CreateBinaryIntrinsic( Intrinsic::abs, EmitScalarExpr(E->getArg(0)), Builder.getFalse(), diff --git a/clang/test/CodeGenHLSL/builtins/abs_mat.hlsl b/clang/test/CodeGenHLSL/builtins/abs_mat.hlsl new file mode 100644 index 0000000000000..ec5c7b4a98689 --- /dev/null +++ b/clang/test/CodeGenHLSL/builtins/abs_mat.hlsl @@ -0,0 +1,564 @@ +// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \ +// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: --check-prefixes=CHECK,NATIVE_HALF +// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ +// RUN: spirv-unknown-vulkan-library %s -emit-llvm -disable-llvm-passes \ +// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF + +#ifdef __HLSL_ENABLE_16_BIT +// NATIVE_HALF-LABEL: test_abs_short1x2 +// NATIVE_HALF: call <2 x i16> @llvm.abs.v2i16(<2 x i16> %{{.*}}, i1 false) +int16_t1x2 test_abs_short1x2(int16_t1x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short1x3 +// NATIVE_HALF: call <3 x i16> @llvm.abs.v3i16(<3 x i16> %{{.*}}, i1 false) +int16_t1x3 test_abs_short1x3(int16_t1x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short1x4 +// NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(<4 x i16> %{{.*}}, i1 false) +int16_t1x4 test_abs_short1x4(int16_t1x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short2x1 +// NATIVE_HALF: call <2 x i16> @llvm.abs.v2i16(<2 x i16> %{{.*}}, i1 false) +int16_t2x1 test_abs_short2x1(int16_t2x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short2x2 +// NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(<4 x i16> %{{.*}}, i1 false) +int16_t2x2 test_abs_short2x2(int16_t2x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short2x3 +// NATIVE_HALF: call <6 x i16> @llvm.abs.v6i16(<6 x i16> %{{.*}}, i1 false) +int16_t2x3 test_abs_short2x3(int16_t2x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short2x4 +// NATIVE_HALF: call <8 x i16> @llvm.abs.v8i16(<8 x i16> %{{.*}}, i1 false) +int16_t2x4 test_abs_short2x4(int16_t2x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short3x1 +// NATIVE_HALF: call <3 x i16> @llvm.abs.v3i16(<3 x i16> %{{.*}}, i1 false) +int16_t3x1 test_abs_short3x1(int16_t3x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short3x2 +// NATIVE_HALF: call <6 x i16> @llvm.abs.v6i16(<6 x i16> %{{.*}}, i1 false) +int16_t3x2 test_abs_short3x2(int16_t3x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short3x3 +// NATIVE_HALF: call <9 x i16> @llvm.abs.v9i16(<9 x i16> %{{.*}}, i1 false) +int16_t3x3 test_abs_short3x3(int16_t3x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short3x4 +// NATIVE_HALF: call <12 x i16> @llvm.abs.v12i16(<12 x i16> %{{.*}}, i1 false) +int16_t3x4 test_abs_short3x4(int16_t3x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short4x1 +// NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(<4 x i16> %{{.*}}, i1 false) +int16_t4x1 test_abs_short4x1(int16_t4x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short4x2 +// NATIVE_HALF: call <8 x i16> @llvm.abs.v8i16(<8 x i16> %{{.*}}, i1 false) +int16_t4x2 test_abs_short4x2(int16_t4x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short4x3 +// NATIVE_HALF: call <12 x i16> @llvm.abs.v12i16(<12 x i16> %{{.*}}, i1 false) +int16_t4x3 test_abs_short4x3(int16_t4x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_short4x4 +// NATIVE_HALF: call <16 x i16> @llvm.abs.v16i16(<16 x i16> %{{.*}}, i1 false) +int16_t4x4 test_abs_short4x4(int16_t4x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort1x2 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t1x2 test_abs_ushort1x2(uint16_t1x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort1x3 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t1x3 test_abs_ushort1x3(uint16_t1x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort1x4 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t1x4 test_abs_ushort1x4(uint16_t1x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort2x1 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t2x1 test_abs_ushort2x1(uint16_t2x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort2x2 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t2x2 test_abs_ushort2x2(uint16_t2x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort2x3 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t2x3 test_abs_ushort2x3(uint16_t2x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort2x4 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t2x4 test_abs_ushort2x4(uint16_t2x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort3x1 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t3x1 test_abs_ushort3x1(uint16_t3x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort3x2 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t3x2 test_abs_ushort3x2(uint16_t3x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort3x3 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t3x3 test_abs_ushort3x3(uint16_t3x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort3x4 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t3x4 test_abs_ushort3x4(uint16_t3x4 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort4x1 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t4x1 test_abs_ushort4x1(uint16_t4x1 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort4x2 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t4x2 test_abs_ushort4x2(uint16_t4x2 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort4x3 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t4x3 test_abs_ushort4x3(uint16_t4x3 p0) { return abs(p0); } + +// NATIVE_HALF-LABEL: test_abs_ushort4x4 +// NATIVE_HALF: call {{.*}} @{{.*}}hlsl3abs +uint16_t4x4 test_abs_ushort4x4(uint16_t4x4 p0) { return abs(p0); } +#endif + +// CHECK-LABEL: test_abs_int1x2 +// CHECK: call <2 x i32> @llvm.abs.v2i32(<2 x i32> %{{.*}}, i1 false) +int1x2 test_abs_int1x2(int1x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int1x3 +// CHECK: call <3 x i32> @llvm.abs.v3i32(<3 x i32> %{{.*}}, i1 false) +int1x3 test_abs_int1x3(int1x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int1x4 +// CHECK: call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false) +int1x4 test_abs_int1x4(int1x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int2x1 +// CHECK: call <2 x i32> @llvm.abs.v2i32(<2 x i32> %{{.*}}, i1 false) +int2x1 test_abs_int2x1(int2x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int2x2 +// CHECK: call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false) +int2x2 test_abs_int2x2(int2x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int2x3 +// CHECK: call <6 x i32> @llvm.abs.v6i32(<6 x i32> %{{.*}}, i1 false) +int2x3 test_abs_int2x3(int2x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int2x4 +// CHECK: call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false) +int2x4 test_abs_int2x4(int2x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int3x1 +// CHECK: call <3 x i32> @llvm.abs.v3i32(<3 x i32> %{{.*}}, i1 false) +int3x1 test_abs_int3x1(int3x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int3x2 +// CHECK: call <6 x i32> @llvm.abs.v6i32(<6 x i32> %{{.*}}, i1 false) +int3x2 test_abs_int3x2(int3x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int3x3 +// CHECK: call <9 x i32> @llvm.abs.v9i32(<9 x i32> %{{.*}}, i1 false) +int3x3 test_abs_int3x3(int3x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int3x4 +// CHECK: call <12 x i32> @llvm.abs.v12i32(<12 x i32> %{{.*}}, i1 false) +int3x4 test_abs_int3x4(int3x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int4x1 +// CHECK: call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false) +int4x1 test_abs_int4x1(int4x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int4x2 +// CHECK: call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false) +int4x2 test_abs_int4x2(int4x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int4x3 +// CHECK: call <12 x i32> @llvm.abs.v12i32(<12 x i32> %{{.*}}, i1 false) +int4x3 test_abs_int4x3(int4x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_int4x4 +// CHECK: call <16 x i32> @llvm.abs.v16i32(<16 x i32> %{{.*}}, i1 false) +int4x4 test_abs_int4x4(int4x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint1x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint1x2 test_abs_uint1x2(uint1x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint1x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint1x3 test_abs_uint1x3(uint1x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint1x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint1x4 test_abs_uint1x4(uint1x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint2x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint2x1 test_abs_uint2x1(uint2x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint2x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint2x2 test_abs_uint2x2(uint2x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint2x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint2x3 test_abs_uint2x3(uint2x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint2x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint2x4 test_abs_uint2x4(uint2x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint3x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint3x1 test_abs_uint3x1(uint3x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint3x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint3x2 test_abs_uint3x2(uint3x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint3x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint3x3 test_abs_uint3x3(uint3x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint3x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint3x4 test_abs_uint3x4(uint3x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint4x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint4x1 test_abs_uint4x1(uint4x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint4x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint4x2 test_abs_uint4x2(uint4x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint4x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint4x3 test_abs_uint4x3(uint4x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_uint4x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint4x4 test_abs_uint4x4(uint4x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long1x2 +// CHECK: call <2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) +int64_t1x2 test_abs_long1x2(int64_t1x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long1x3 +// CHECK: call <3 x i64> @llvm.abs.v3i64(<3 x i64> %{{.*}}, i1 false) +int64_t1x3 test_abs_long1x3(int64_t1x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long1x4 +// CHECK: call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) +int64_t1x4 test_abs_long1x4(int64_t1x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long2x1 +// CHECK: call <2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) +int64_t2x1 test_abs_long2x1(int64_t2x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long2x2 +// CHECK: call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) +int64_t2x2 test_abs_long2x2(int64_t2x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long2x3 +// CHECK: call <6 x i64> @llvm.abs.v6i64(<6 x i64> %{{.*}}, i1 false) +int64_t2x3 test_abs_long2x3(int64_t2x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long2x4 +// CHECK: call <8 x i64> @llvm.abs.v8i64(<8 x i64> %{{.*}}, i1 false) +int64_t2x4 test_abs_long2x4(int64_t2x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long3x1 +// CHECK: call <3 x i64> @llvm.abs.v3i64(<3 x i64> %{{.*}}, i1 false) +int64_t3x1 test_abs_long3x1(int64_t3x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long3x2 +// CHECK: call <6 x i64> @llvm.abs.v6i64(<6 x i64> %{{.*}}, i1 false) +int64_t3x2 test_abs_long3x2(int64_t3x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long3x3 +// CHECK: call <9 x i64> @llvm.abs.v9i64(<9 x i64> %{{.*}}, i1 false) +int64_t3x3 test_abs_long3x3(int64_t3x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long3x4 +// CHECK: call <12 x i64> @llvm.abs.v12i64(<12 x i64> %{{.*}}, i1 false) +int64_t3x4 test_abs_long3x4(int64_t3x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long4x1 +// CHECK: call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) +int64_t4x1 test_abs_long4x1(int64_t4x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long4x2 +// CHECK: call <8 x i64> @llvm.abs.v8i64(<8 x i64> %{{.*}}, i1 false) +int64_t4x2 test_abs_long4x2(int64_t4x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long4x3 +// CHECK: call <12 x i64> @llvm.abs.v12i64(<12 x i64> %{{.*}}, i1 false) +int64_t4x3 test_abs_long4x3(int64_t4x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_long4x4 +// CHECK: call <16 x i64> @llvm.abs.v16i64(<16 x i64> %{{.*}}, i1 false) +int64_t4x4 test_abs_long4x4(int64_t4x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong1x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t1x2 test_abs_ulong1x2(uint64_t1x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong1x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t1x3 test_abs_ulong1x3(uint64_t1x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong1x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t1x4 test_abs_ulong1x4(uint64_t1x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong2x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t2x1 test_abs_ulong2x1(uint64_t2x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong2x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t2x2 test_abs_ulong2x2(uint64_t2x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong2x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t2x3 test_abs_ulong2x3(uint64_t2x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong2x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t2x4 test_abs_ulong2x4(uint64_t2x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong3x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t3x1 test_abs_ulong3x1(uint64_t3x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong3x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t3x2 test_abs_ulong3x2(uint64_t3x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong3x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t3x3 test_abs_ulong3x3(uint64_t3x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong3x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t3x4 test_abs_ulong3x4(uint64_t3x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong4x1 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t4x1 test_abs_ulong4x1(uint64_t4x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong4x2 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t4x2 test_abs_ulong4x2(uint64_t4x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong4x3 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t4x3 test_abs_ulong4x3(uint64_t4x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_ulong4x4 +// CHECK: call {{.*}} @{{.*}}hlsl3abs +uint64_t4x4 test_abs_ulong4x4(uint64_t4x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half1x2 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.fabs.v2f16(<2 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.fabs.v2f32(<2 x float> %{{.*}}) +half1x2 test_abs_half1x2(half1x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half1x3 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.fabs.v3f16(<3 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.fabs.v3f32(<3 x float> %{{.*}}) +half1x3 test_abs_half1x3(half1x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half1x4 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.fabs.v4f16(<4 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.fabs.v4f32(<4 x float> %{{.*}}) +half1x4 test_abs_half1x4(half1x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half2x1 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.fabs.v2f16(<2 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.fabs.v2f32(<2 x float> %{{.*}}) +half2x1 test_abs_half2x1(half2x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half2x2 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.fabs.v4f16(<4 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.fabs.v4f32(<4 x float> %{{.*}}) +half2x2 test_abs_half2x2(half2x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half2x3 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.fabs.v6f16(<6 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.fabs.v6f32(<6 x float> %{{.*}}) +half2x3 test_abs_half2x3(half2x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half2x4 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.fabs.v8f16(<8 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.fabs.v8f32(<8 x float> %{{.*}}) +half2x4 test_abs_half2x4(half2x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half3x1 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.fabs.v3f16(<3 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.fabs.v3f32(<3 x float> %{{.*}}) +half3x1 test_abs_half3x1(half3x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half3x2 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.fabs.v6f16(<6 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.fabs.v6f32(<6 x float> %{{.*}}) +half3x2 test_abs_half3x2(half3x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half3x3 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.fabs.v9f16(<9 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.fabs.v9f32(<9 x float> %{{.*}}) +half3x3 test_abs_half3x3(half3x3 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half3x4 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.fabs.v12f16(<12 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.fabs.v12f32(<12 x float> %{{.*}}) +half3x4 test_abs_half3x4(half3x4 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half4x1 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.fabs.v4f16(<4 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.fabs.v4f32(<4 x float> %{{.*}}) +half4x1 test_abs_half4x1(half4x1 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half4x2 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.fabs.v8f16(<8 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.fabs.v8f32(<8 x float> %{{.*}}) +half4x2 test_abs_half4x2(half4x2 p0) { return abs(p0); } + +// CHECK-LABEL: test_abs_half4x3 +// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.fabs.v12f16(<12 x half> %{{.*}}) +// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.fabs.v12f32(<12 x float> ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/227131 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
