[clang] Make CIR assembly formats strict properties compatible (PR #226600)

[Henrich Lauko via cfe-commits]

================
@@ -3871,6 +3882,7 @@ def CIR_SetBitfieldOp : CIR_Op<"set_bitfield"> {
 
   let assemblyFormat = [{
     (`align` `(` $alignment^ `)`)?
+    (`volatile` $is_volatile^)?
----------------
xlauko wrote:

I would expect this space would be implicit but isn't :(

```suggestion
    ` `  (`volatile` $is_volatile^)?
```

https://github.com/llvm/llvm-project/pull/226600
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