erichkeane created this revision.
A first step toward removing the repetition of
features/CPU info in the x86 target info, this
patch pulls all the processor information out into
its own .def file.
https://reviews.llvm.org/D40093
Files:
include/clang/Basic/X86Target.def
lib/Basic/Targets/X86.cpp
lib/Basic/Targets/X86.h
Index: lib/Basic/Targets/X86.h
===================================================================
--- lib/Basic/Targets/X86.h
+++ lib/Basic/Targets/X86.h
@@ -95,178 +95,8 @@
/// loosely correspond to the options passed to '-march' or '-mtune' flags.
enum CPUKind {
CK_Generic,
-
- /// \name i386
- /// i386-generation processors.
- //@{
- CK_i386,
- //@}
-
- /// \name i486
- /// i486-generation processors.
- //@{
- CK_i486,
- CK_WinChipC6,
- CK_WinChip2,
- CK_C3,
- //@}
-
- /// \name i586
- /// i586-generation processors, P5 microarchitecture based.
- //@{
- CK_i586,
- CK_Pentium,
- CK_PentiumMMX,
- //@}
-
- /// \name i686
- /// i686-generation processors, P6 / Pentium M microarchitecture based.
- //@{
- CK_PentiumPro,
- CK_Pentium2,
- CK_Pentium3,
- CK_PentiumM,
- CK_C3_2,
-
- /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
- /// Clang however has some logic to support this.
- // FIXME: Warn, deprecate, and potentially remove this.
- CK_Yonah,
- //@}
-
- /// \name Netburst
- /// Netburst microarchitecture based processors.
- //@{
- CK_Pentium4,
- CK_Prescott,
- CK_Nocona,
- //@}
-
- /// \name Core
- /// Core microarchitecture based processors.
- //@{
- CK_Core2,
-
- /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
- /// codename which GCC no longer accepts as an option to -march, but Clang
- /// has some logic for recognizing it.
- // FIXME: Warn, deprecate, and potentially remove this.
- CK_Penryn,
- //@}
-
- /// \name Atom
- /// Atom processors
- //@{
- CK_Bonnell,
- CK_Silvermont,
- CK_Goldmont,
- //@}
-
- /// \name Nehalem
- /// Nehalem microarchitecture based processors.
- CK_Nehalem,
-
- /// \name Westmere
- /// Westmere microarchitecture based processors.
- CK_Westmere,
-
- /// \name Sandy Bridge
- /// Sandy Bridge microarchitecture based processors.
- CK_SandyBridge,
-
- /// \name Ivy Bridge
- /// Ivy Bridge microarchitecture based processors.
- CK_IvyBridge,
-
- /// \name Haswell
- /// Haswell microarchitecture based processors.
- CK_Haswell,
-
- /// \name Broadwell
- /// Broadwell microarchitecture based processors.
- CK_Broadwell,
-
- /// \name Skylake Client
- /// Skylake client microarchitecture based processors.
- CK_SkylakeClient,
-
- /// \name Skylake Server
- /// Skylake server microarchitecture based processors.
- CK_SkylakeServer,
-
- /// \name Cannonlake Client
- /// Cannonlake client microarchitecture based processors.
- CK_Cannonlake,
-
- /// \name Knights Landing
- /// Knights Landing processor.
- CK_KNL,
-
- /// \name Knights Mill
- /// Knights Mill processor.
- CK_KNM,
-
- /// \name Lakemont
- /// Lakemont microarchitecture based processors.
- CK_Lakemont,
-
- /// \name K6
- /// K6 architecture processors.
- //@{
- CK_K6,
- CK_K6_2,
- CK_K6_3,
- //@}
-
- /// \name K7
- /// K7 architecture processors.
- //@{
- CK_Athlon,
- CK_AthlonXP,
- //@}
-
- /// \name K8
- /// K8 architecture processors.
- //@{
- CK_K8,
- CK_K8SSE3,
- CK_AMDFAM10,
- //@}
-
- /// \name Bobcat
- /// Bobcat architecture processors.
- //@{
- CK_BTVER1,
- CK_BTVER2,
- //@}
-
- /// \name Bulldozer
- /// Bulldozer architecture processors.
- //@{
- CK_BDVER1,
- CK_BDVER2,
- CK_BDVER3,
- CK_BDVER4,
- //@}
-
- /// \name zen
- /// Zen architecture processors.
- //@{
- CK_ZNVER1,
- //@}
-
- /// This specification is deprecated and will be removed in the future.
- /// Users should prefer \see CK_K8.
- // FIXME: Warn on this when the CPU is set to it.
- //@{
- CK_x86_64,
- //@}
-
- /// \name Geode
- /// Geode processors.
- //@{
- CK_Geode
- //@}
+#define PROC(ENUM, STRING, IS64BIT) CK_##ENUM,
+#include "clang/Basic/X86Target.def"
} CPU = CK_Generic;
bool checkCPUKind(CPUKind Kind) const;
Index: lib/Basic/Targets/X86.cpp
===================================================================
--- lib/Basic/Targets/X86.cpp
+++ lib/Basic/Targets/X86.cpp
@@ -1504,121 +1504,19 @@
case CK_Generic:
// No processor selected!
return false;
-
- case CK_i386:
- case CK_i486:
- case CK_WinChipC6:
- case CK_WinChip2:
- case CK_C3:
- case CK_i586:
- case CK_Pentium:
- case CK_PentiumMMX:
- case CK_PentiumPro:
- case CK_Pentium2:
- case CK_Pentium3:
- case CK_PentiumM:
- case CK_Yonah:
- case CK_C3_2:
- case CK_Pentium4:
- case CK_Lakemont:
- case CK_Prescott:
- case CK_K6:
- case CK_K6_2:
- case CK_K6_3:
- case CK_Athlon:
- case CK_AthlonXP:
- case CK_Geode:
- // Only accept certain architectures when compiling in 32-bit mode.
- if (getTriple().getArch() != llvm::Triple::x86)
- return false;
-
- LLVM_FALLTHROUGH;
- case CK_Nocona:
- case CK_Core2:
- case CK_Penryn:
- case CK_Bonnell:
- case CK_Silvermont:
- case CK_Goldmont:
- case CK_Nehalem:
- case CK_Westmere:
- case CK_SandyBridge:
- case CK_IvyBridge:
- case CK_Haswell:
- case CK_Broadwell:
- case CK_SkylakeClient:
- case CK_SkylakeServer:
- case CK_Cannonlake:
- case CK_KNL:
- case CK_KNM:
- case CK_K8:
- case CK_K8SSE3:
- case CK_AMDFAM10:
- case CK_BTVER1:
- case CK_BTVER2:
- case CK_BDVER1:
- case CK_BDVER2:
- case CK_BDVER3:
- case CK_BDVER4:
- case CK_ZNVER1:
- case CK_x86_64:
- return true;
+#define PROC(ENUM, STRING, IS64BIT) \
+ case CK_##ENUM: \
+ return IS64BIT || getTriple().getArch() == llvm::Triple::x86;
+#include "clang/Basic/X86Target.def"
}
llvm_unreachable("Unhandled CPU kind");
}
X86TargetInfo::CPUKind X86TargetInfo::getCPUKind(StringRef CPU) const {
return llvm::StringSwitch<CPUKind>(CPU)
- .Case("i386", CK_i386)
- .Case("i486", CK_i486)
- .Case("winchip-c6", CK_WinChipC6)
- .Case("winchip2", CK_WinChip2)
- .Case("c3", CK_C3)
- .Case("i586", CK_i586)
- .Case("pentium", CK_Pentium)
- .Case("pentium-mmx", CK_PentiumMMX)
- .Cases("i686", "pentiumpro", CK_PentiumPro)
- .Case("pentium2", CK_Pentium2)
- .Cases("pentium3", "pentium3m", CK_Pentium3)
- .Case("pentium-m", CK_PentiumM)
- .Case("c3-2", CK_C3_2)
- .Case("yonah", CK_Yonah)
- .Cases("pentium4", "pentium4m", CK_Pentium4)
- .Case("prescott", CK_Prescott)
- .Case("nocona", CK_Nocona)
- .Case("core2", CK_Core2)
- .Case("penryn", CK_Penryn)
- .Cases("bonnell", "atom", CK_Bonnell)
- .Cases("silvermont", "slm", CK_Silvermont)
- .Case("goldmont", CK_Goldmont)
- .Cases("nehalem", "corei7", CK_Nehalem)
- .Case("westmere", CK_Westmere)
- .Cases("sandybridge", "corei7-avx", CK_SandyBridge)
- .Cases("ivybridge", "core-avx-i", CK_IvyBridge)
- .Cases("haswell", "core-avx2", CK_Haswell)
- .Case("broadwell", CK_Broadwell)
- .Case("skylake", CK_SkylakeClient)
- .Cases("skylake-avx512", "skx", CK_SkylakeServer)
- .Case("cannonlake", CK_Cannonlake)
- .Case("knl", CK_KNL)
- .Case("knm", CK_KNM)
- .Case("lakemont", CK_Lakemont)
- .Case("k6", CK_K6)
- .Case("k6-2", CK_K6_2)
- .Case("k6-3", CK_K6_3)
- .Cases("athlon", "athlon-tbird", CK_Athlon)
- .Cases("athlon-xp", "athlon-mp", "athlon-4", CK_AthlonXP)
- .Cases("k8", "athlon64", "athlon-fx", "opteron", CK_K8)
- .Cases("k8-sse3", "athlon64-sse3", "opteron-sse3", CK_K8SSE3)
- .Cases("amdfam10", "barcelona", CK_AMDFAM10)
- .Case("btver1", CK_BTVER1)
- .Case("btver2", CK_BTVER2)
- .Case("bdver1", CK_BDVER1)
- .Case("bdver2", CK_BDVER2)
- .Case("bdver3", CK_BDVER3)
- .Case("bdver4", CK_BDVER4)
- .Case("znver1", CK_ZNVER1)
- .Case("x86-64", CK_x86_64)
- .Case("geode", CK_Geode)
+#define PROC(ENUM, STRING, IS64BIT) .Case(STRING, CK_##ENUM)
+#define PROC_ALIAS(ENUM, ALIAS) .Case(ALIAS, CK_##ENUM)
+#include "clang/Basic/X86Target.def"
.Default(CK_Generic);
}
Index: include/clang/Basic/X86Target.def
===================================================================
--- /dev/null
+++ include/clang/Basic/X86Target.def
@@ -0,0 +1,229 @@
+//===--- X86Target.def - X86 Feature/Processor Database ---------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the X86-specific Features and Processors, as used by
+// the X86 Targets.
+//
+//===----------------------------------------------------------------------===//
+
+
+#ifndef PROC
+#define PROC(ENUM, STRING, IS64BIT)
+#endif
+
+#ifndef PROC_ALIAS
+#define PROC_ALIAS(ENUM, ALIAS)
+#endif
+
+#define PROC_64_BIT true
+#define PROC_32_BIT false
+
+/// \name i386
+/// i386-generation processors.
+//@{
+PROC(i386, "i386", PROC_32_BIT)
+//@}
+
+/// \name i486
+/// i486-generation processors.
+//@{
+PROC(i486, "i486", PROC_32_BIT)
+PROC(WinChipC6, "winchip-c6", PROC_32_BIT)
+PROC(WinChip2, "winchip2", PROC_32_BIT)
+PROC(C3, "c3", PROC_32_BIT)
+//@}
+
+/// \name i586
+/// i586-generation processors, P5 microarchitecture based.
+//@{
+PROC(i586, "i586", PROC_32_BIT)
+PROC(Pentium, "pentium", PROC_32_BIT)
+PROC(PentiumMMX, "pentium-mmx", PROC_32_BIT)
+//@}
+
+/// \name i686
+/// i686-generation processors, P6 / Pentium M microarchitecture based.
+//@{
+PROC(PentiumPro, "pentiumpro", PROC_32_BIT)
+PROC_ALIAS(PentiumPro, "i686")
+PROC(Pentium2, "pentium2", PROC_32_BIT)
+PROC(Pentium3, "pentium3", PROC_32_BIT)
+PROC_ALIAS(Pentium3, "pentium3m")
+PROC(PentiumM, "pentium-m", PROC_32_BIT)
+PROC(C3_2, "c3-2", PROC_32_BIT)
+
+/// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
+/// Clang however has some logic to support this.
+// FIXME: Warn, deprecate, and potentially remove this.
+PROC(Yonah, "yonah", PROC_32_BIT)
+//@}
+
+/// \name Netburst
+/// Netburst microarchitecture based processors.
+//@{
+PROC(Pentium4, "pentium4", PROC_32_BIT)
+PROC_ALIAS(Pentium4, "pentium4m")
+
+PROC(Prescott, "prescott", PROC_32_BIT)
+PROC(Nocona, "nocona", PROC_64_BIT)
+//@}
+
+/// \name Core
+/// Core microarchitecture based processors.
+//@{
+PROC(Core2, "core2", PROC_64_BIT)
+
+/// This enumerator, like Yonah, is a bit odd. It is another
+/// codename which GCC no longer accepts as an option to -march, but Clang
+/// has some logic for recognizing it.
+// FIXME: Warn, deprecate, and potentially remove this.
+PROC(Penryn, "penryn", PROC_64_BIT)
+//@}
+
+/// \name Atom
+/// Atom processors
+//@{
+PROC(Bonnell, "bonnell", PROC_64_BIT)
+PROC_ALIAS(Bonnell, "atom")
+
+PROC(Silvermont, "silvermont", PROC_64_BIT)
+PROC_ALIAS(Silvermont, "slm")
+
+PROC(Goldmont, "goldmont", PROC_64_BIT)
+//@}
+
+/// \name Nehalem
+/// Nehalem microarchitecture based processors.
+PROC(Nehalem, "nehalem", PROC_64_BIT)
+PROC_ALIAS(Nehalem, "corei7")
+
+/// \name Westmere
+/// Westmere microarchitecture based processors.
+PROC(Westmere, "westmere", PROC_64_BIT)
+
+/// \name Sandy Bridge
+/// Sandy Bridge microarchitecture based processors.
+PROC(SandyBridge, "sandybridge", PROC_64_BIT)
+PROC_ALIAS(SandyBridge, "corei7-avx")
+
+/// \name Ivy Bridge
+/// Ivy Bridge microarchitecture based processors.
+PROC(IvyBridge, "ivybridge", PROC_64_BIT)
+PROC_ALIAS(IvyBridge, "core-avx-i")
+
+/// \name Haswell
+/// Haswell microarchitecture based processors.
+PROC(Haswell, "haswell", PROC_64_BIT)
+PROC_ALIAS(Haswell, "core-avx2")
+
+/// \name Broadwell
+/// Broadwell microarchitecture based processors.
+PROC(Broadwell, "broadwell", PROC_64_BIT)
+
+/// \name Skylake Client
+/// Skylake client microarchitecture based processors.
+PROC(SkylakeClient, "skylake", PROC_64_BIT)
+
+/// \name Skylake Server
+/// Skylake server microarchitecture based processors.
+PROC(SkylakeServer, "skylake-avx512", PROC_64_BIT)
+PROC_ALIAS(SkylakeServer, "skx")
+
+/// \name Cannonlake Client
+/// Cannonlake client microarchitecture based processors.
+PROC(Cannonlake, "cannonlake", PROC_64_BIT)
+
+/// \name Knights Landing
+/// Knights Landing processor.
+PROC(KNL, "knl", PROC_64_BIT)
+
+/// \name Knights Mill
+/// Knights Mill processor.
+PROC(KNM, "knm", PROC_64_BIT)
+
+/// \name Lakemont
+/// Lakemont microarchitecture based processors.
+PROC(Lakemont, "lakemont", PROC_32_BIT)
+
+/// \name K6
+/// K6 architecture processors.
+//@{
+PROC(K6, "k6", PROC_32_BIT)
+PROC(K6_2, "k6-2", PROC_32_BIT)
+PROC(K6_3, "k6-3", PROC_32_BIT)
+//@}
+
+/// \name K7
+/// K7 architecture processors.
+//@{
+PROC(Athlon, "athlon", PROC_32_BIT)
+PROC_ALIAS(Athlon, "athlon-tbird")
+
+PROC(AthlonXP, "athlon-xp", PROC_32_BIT)
+PROC_ALIAS(AthlonXP, "athlon-mp")
+PROC_ALIAS(AthlonXP, "athlon-4")
+//@}
+
+/// \name K8
+/// K8 architecture processors.
+//@{
+PROC(K8, "k8", PROC_64_BIT)
+PROC_ALIAS(K8, "athlon64")
+PROC_ALIAS(K8, "athlon-fx")
+PROC_ALIAS(K8, "opteron")
+
+PROC(K8SSE3, "k8-sse3", PROC_64_BIT)
+PROC_ALIAS(K8SSE3, "athlon64-sse3")
+PROC_ALIAS(K8SSE3, "opteron-sse3")
+
+PROC(AMDFAM10, "amdfam10", PROC_64_BIT)
+PROC_ALIAS(AMDFAM10, "barcelona")
+//@}
+
+/// \name Bobcat
+/// Bobcat architecture processors.
+//@{
+PROC(BTVER1, "btver1", PROC_64_BIT)
+PROC(BTVER2, "btver2", PROC_64_BIT)
+//@}
+
+/// \name Bulldozer
+/// Bulldozer architecture processors.
+//@{
+PROC(BDVER1, "bdver1", PROC_64_BIT)
+PROC(BDVER2, "bdver2", PROC_64_BIT)
+PROC(BDVER3, "bdver3", PROC_64_BIT)
+PROC(BDVER4, "bdver4", PROC_64_BIT)
+//@}
+
+/// \name zen
+/// Zen architecture processors.
+//@{
+PROC(ZNVER1, "znver1", PROC_64_BIT)
+PROC_ALIAS(ZNVER1, "amdfam17")
+//@}
+
+/// This specification is deprecated and will be removed in the future.
+/// Users should prefer K8.
+// FIXME: Warn on this when the CPU is set to it.
+//@{
+PROC(x86_64, "x86-64", PROC_64_BIT)
+//@}
+
+/// \name Geode
+/// Geode processors.
+//@{
+PROC(Geode, "geode", PROC_32_BIT)
+//@}
+
+
+#undef PROC_64_BIT
+#undef PROC_32_BIT
+#undef PROC
+#undef PROC_ALIAS
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