https://github.com/madhur13490 created
https://github.com/llvm/llvm-project/pull/215742
Replace the two-operand boolean form
!{!"llvm.loop.vectorize.scalable.enable", i1 0/1} with a single-operand
enable/disable pair:
!{!"llvm.loop.vectorize.scalable.enable"}
!{!"llvm.loop.vectorize.scalable.disable"}
The Verifier rejects the two-operand form, AutoUpgrade rewrites old bitcode,
and the readers and producers in LLVM, Clang and MLIR are updated.
RFC:
https://discourse.llvm.org/t/rfc-enforce-single-operand-format-for-all-enable-metadata-nodes/90571
>From 035c8e814df704eee97c0a4ada93374de4017945 Mon Sep 17 00:00:00 2001
From: Madhur Amilkanthwar <[email protected]>
Date: Tue, 11 Aug 2026 23:52:57 -0700
Subject: [PATCH] Enforce single-operand form for llvm.loop.vectorize.scalable
metadata
Replace the two-operand boolean form
!{!"llvm.loop.vectorize.scalable.enable", i1 0/1} with a single-operand
enable/disable pair:
!{!"llvm.loop.vectorize.scalable.enable"}
!{!"llvm.loop.vectorize.scalable.disable"}
The Verifier rejects the two-operand form, AutoUpgrade rewrites old
bitcode, and the readers and producers in LLVM, Clang and MLIR are
updated.
RFC:
https://discourse.llvm.org/t/rfc-enforce-single-operand-format-for-all-enable-metadata-nodes/90571
---
clang/lib/CodeGen/CGLoopInfo.cpp | 9 ++--
clang/test/CodeGenCXX/pragma-loop-pr27643.cpp | 2 +-
.../test/CodeGenCXX/pragma-loop-predicate.cpp | 2 +-
clang/test/CodeGenCXX/pragma-loop.cpp | 4 +-
clang/test/CodeGenCXX/pragma-unroll.cpp | 2 +-
llvm/docs/LangRef.md | 11 ++---
llvm/include/llvm/IR/AutoUpgrade.h | 4 +-
.../include/llvm/Transforms/Utils/LoopUtils.h | 6 ++-
.../Vectorize/LoopVectorizationLegality.h | 16 +++----
llvm/lib/Transforms/Utils/LoopUtils.cpp | 8 ++--
.../Vectorize/LoopVectorizationLegality.cpp | 31 ++++++-------
.../upgrade-loop-vectorize-scalable-enable.ll | 37 ++++++++++++++++
...grade-loop-vectorize-scalable-enable.ll.bc | Bin 0 -> 2364 bytes
.../LoopVectorize/AArch64/bounded-load.ll | 2 +-
.../LoopVectorize/AArch64/call-costs.ll | 2 +-
.../AArch64/conditional-branches-cost.ll | 2 +-
.../AArch64/first-order-recurrence.ll | 2 +-
.../LoopVectorize/AArch64/masked-op-cost.ll | 4 +-
.../LoopVectorize/AArch64/masked_ldst_sme.ll | 2 +-
.../AArch64/partial-reduce-chained.ll | 2 +-
.../AArch64/pr60831-sve-inv-store-crash.ll | 2 +-
.../LoopVectorize/AArch64/scalable-alloca.ll | 2 +-
.../LoopVectorize/AArch64/scalable-call.ll | 2 +-
.../AArch64/scalable-predicate-instruction.ll | 2 +-
.../AArch64/scalable-reduction-inloop-cond.ll | 2 +-
.../AArch64/scalable-reductions-tf.ll | 2 +-
.../AArch64/scalable-reductions.ll | 2 +-
.../AArch64/scalable-strict-fadd.ll | 2 +-
.../LoopVectorize/AArch64/scalable-vf-hint.ll | 16 +++----
.../LoopVectorize/AArch64/sme-vectorize.ll | 4 +-
.../LoopVectorize/AArch64/sve-basic-vec.ll | 2 +-
.../AArch64/sve-cond-inv-loads.ll | 2 +-
.../sve-epilog-vect-inloop-reductions.ll | 2 +-
.../AArch64/sve-epilog-vect-reductions.ll | 2 +-
.../sve-epilog-vect-strict-reductions.ll | 2 +-
.../AArch64/sve-extract-last-veclane.ll | 2 +-
.../AArch64/sve-gather-scatter-cost.ll | 2 +-
.../AArch64/sve-gather-scatter.ll | 2 +-
.../LoopVectorize/AArch64/sve-illegal-type.ll | 2 +-
.../LoopVectorize/AArch64/sve-inductions.ll | 2 +-
.../LoopVectorize/AArch64/sve-inv-loads.ll | 2 +-
.../LoopVectorize/AArch64/sve-inv-store.ll | 2 +-
.../AArch64/sve-invalid-costs.ll | 2 +-
.../AArch64/sve-large-strides.ll | 2 +-
.../AArch64/sve-masked-loadstore.ll | 2 +-
.../LoopVectorize/AArch64/sve-select-cmp.ll | 2 +-
.../AArch64/sve-strict-fadd-cost.ll | 2 +-
.../AArch64/sve-tail-folding-option.ll | 2 +-
.../AArch64/sve-tail-folding-reductions.ll | 2 +-
.../AArch64/sve-tail-folding-unroll.ll | 2 +-
.../LoopVectorize/AArch64/sve-tail-folding.ll | 2 +-
.../LoopVectorize/AArch64/sve-type-conv.ll | 2 +-
.../AArch64/sve-vector-reverse-mask4.ll | 2 +-
.../AArch64/sve-vector-reverse.ll | 2 +-
.../AArch64/sve-widen-extractvalue.ll | 2 +-
.../LoopVectorize/AArch64/sve-widen-gep.ll | 2 +-
.../LoopVectorize/AArch64/sve-widen-phi.ll | 2 +-
.../AArch64/tail-folding-styles.ll | 2 +-
.../AArch64/vector-reverse-mask4.ll | 2 +-
.../LoopVectorize/AArch64/vector-reverse.ll | 2 +-
.../LoopVectorize/RISCV/illegal-type.ll | 2 +-
.../RISCV/riscv-vector-reverse.ll | 2 +-
.../LoopVectorize/RISCV/scalable-vf-hint.ll | 2 +-
.../RISCV/tail-folding-gather-scatter.ll | 2 +-
.../RISCV/tail-folding-uniform-store.ll | 2 +-
.../LoopVectorize/VPlan/expand-scev.ll | 2 +-
.../LoopVectorize/X86/cost-model.ll | 2 +-
.../LoopVectorize/X86/iv-live-outs.ll | 2 +-
.../Transforms/LoopVectorize/cast-costs.ll | 2 +-
.../LoopVectorize/metadata-width.ll | 4 +-
.../LoopVectorize/no_array_bounds_scalable.ll | 2 +-
.../optimal-epilog-vectorization-scalable.ll | 2 +-
.../outer_loop_hcfg_construction.ll | 2 +-
.../LoopVectorize/outer_loop_scalable.ll | 2 +-
.../LoopVectorize/scalable-inductions.ll | 2 +-
.../scalable-trunc-min-bitwidth.ll | 2 +-
.../LoopVectorize/scalable-vf-hint.ll | 2 +-
.../Verifier/llvm.loop.vectorize.scalable.ll | 41 ++++++++++++++++++
.../Target/LLVMIR/LoopAnnotationImporter.cpp | 3 +-
.../LLVMIR/LoopAnnotationTranslation.cpp | 5 ++-
.../Target/LLVMIR/Import/metadata-loop.ll | 2 +-
mlir/test/Target/LLVMIR/loop-metadata.mlir | 2 +-
82 files changed, 208 insertions(+), 125 deletions(-)
create mode 100644 llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll
create mode 100644
llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll.bc
create mode 100644 llvm/test/Verifier/llvm.loop.vectorize.scalable.ll
diff --git a/clang/lib/CodeGen/CGLoopInfo.cpp b/clang/lib/CodeGen/CGLoopInfo.cpp
index 23eff005f7004..e4e9c56fbfc77 100644
--- a/clang/lib/CodeGen/CGLoopInfo.cpp
+++ b/clang/lib/CodeGen/CGLoopInfo.cpp
@@ -245,11 +245,10 @@ clang::CodeGen::LoopInfo::createLoopVectorizeMetadata(
if (Attrs.VectorizeScalable != LoopAttributes::Unspecified) {
bool IsScalable = Attrs.VectorizeScalable == LoopAttributes::Enable;
- Metadata *Vals[] = {
- MDString::get(Ctx, "llvm.loop.vectorize.scalable.enable"),
- ConstantAsMetadata::get(
- ConstantInt::get(llvm::Type::getInt1Ty(Ctx), IsScalable))};
- Args.push_back(MDNode::get(Ctx, Vals));
+ Args.push_back(MDNode::get(
+ Ctx, {MDString::get(
+ Ctx, IsScalable ? "llvm.loop.vectorize.scalable.enable"
+ : "llvm.loop.vectorize.scalable.disable")}));
}
// Setting interleave.count
diff --git a/clang/test/CodeGenCXX/pragma-loop-pr27643.cpp
b/clang/test/CodeGenCXX/pragma-loop-pr27643.cpp
index afab64f4c6867..b0ce9c38e2637 100644
--- a/clang/test/CodeGenCXX/pragma-loop-pr27643.cpp
+++ b/clang/test/CodeGenCXX/pragma-loop-pr27643.cpp
@@ -42,7 +42,7 @@ void loop4(int *List, int Length) {
// CHECK: ![[LOOP1]] = distinct !{![[LOOP1]], [[MP:![0-9]+]],
![[VEC_WIDTH_1:.*]], ![[FIXED_WIDTH:.*]], ![[VEC_ENABLE:.*]]}
// CHECK: ![[VEC_WIDTH_1]] = !{!"llvm.loop.vectorize.width", i32 1}
-// CHECK: ![[FIXED_WIDTH]] = !{!"llvm.loop.vectorize.scalable.enable", i1
false}
+// CHECK: ![[FIXED_WIDTH]] = !{!"llvm.loop.vectorize.scalable.disable"}
// CHECK: ![[VEC_ENABLE]] = !{!"llvm.loop.vectorize.enable"}
// CHECK: ![[LOOP2]] = distinct !{![[LOOP2]], [[MP]], ![[VEC_WIDTH_2:.*]],
![[FIXED_WIDTH:.*]], ![[VEC_ENABLE]]}
diff --git a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
index cb7dfdb810215..bfacddc207f26 100644
--- a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
+++ b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
@@ -119,7 +119,7 @@ void test9(int *List, int Length) {
// CHECK-NEXT: ![[LOOP5]] = distinct !{![[LOOP5]], [[MP]], [[GEN6]], [[GEN10]]}
// CHECK-NEXT: ![[LOOP6]] = distinct !{![[LOOP6]], [[MP]], [[GEN8]],
[[GEN10]], [[GEN11:![0-9]+]]}
-// CHECK-NEXT: [[GEN11]] = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+// CHECK-NEXT: [[GEN11]] = !{!"llvm.loop.vectorize.scalable.disable"}
// CHECK-NEXT: ![[LOOP7]] = distinct !{![[LOOP7]], [[MP]], [[GEN8]],
[[GEN12:![0-9]+]], [[GEN11]], [[GEN3]]}
// CHECK-NEXT: [[GEN12]] = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/clang/test/CodeGenCXX/pragma-loop.cpp
b/clang/test/CodeGenCXX/pragma-loop.cpp
index 68ab7b51ea833..75961aa86dcad 100644
--- a/clang/test/CodeGenCXX/pragma-loop.cpp
+++ b/clang/test/CodeGenCXX/pragma-loop.cpp
@@ -257,8 +257,8 @@ void for_test_interleave_vectorize_disable_unroll(int
*List, int Length) {
// CHECK-DAG: ![[INTERLEAVE_16:[0-9]+]] = !{!"llvm.loop.interleave.count", i32
16}
// CHECK-DAG: ![[VECTORIZE_ENABLE:[0-9]+]] = !{!"llvm.loop.vectorize.enable"}
-// CHECK-DAG: ![[FIXED_VEC:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.enable", i1 false}
-// CHECK-DAG: ![[SCALABLE_VEC:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.enable", i1 true}
+// CHECK-DAG: ![[FIXED_VEC:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.disable"}
+// CHECK-DAG: ![[SCALABLE_VEC:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.enable"}
// CHECK-DAG: ![[WIDTH_1:[0-9]+]] = !{!"llvm.loop.vectorize.width", i32 1}
// CHECK-DAG: ![[WIDTH_2:[0-9]+]] = !{!"llvm.loop.vectorize.width", i32 2}
// CHECK-DAG: ![[WIDTH_5:[0-9]+]] = !{!"llvm.loop.vectorize.width", i32 5}
diff --git a/clang/test/CodeGenCXX/pragma-unroll.cpp
b/clang/test/CodeGenCXX/pragma-unroll.cpp
index c89b58907701e..504be03bebb82 100644
--- a/clang/test/CodeGenCXX/pragma-unroll.cpp
+++ b/clang/test/CodeGenCXX/pragma-unroll.cpp
@@ -177,7 +177,7 @@ template void for_vectorize_value_dependent<1>(int *List,
int Length);
// CHECK-DAG: ![[UNROLL_8:[0-9]+]] = !{!"llvm.loop.unroll.count", i32 8}
//
// OTHER-DAG: ![[VEC_1:[0-9]+]] = !{!"llvm.loop.vectorize.width", i32 1}
-// OTHER-DAG: ![[VEC_FIXED:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.enable", i1 false}
+// OTHER-DAG: ![[VEC_FIXED:[0-9]+]] =
!{!"llvm.loop.vectorize.scalable.disable"}
//
// CHECK-DAG: ![[LOOP_1]] = distinct !{![[LOOP_1]], ![[MP]],
![[UNROLL_ENABLE]]}
// CHECK-DAG: ![[LOOP_2]] = distinct !{![[LOOP_2]], ![[MP]],
![[UNROLL_DISABLE]]}
diff --git a/llvm/docs/LangRef.md b/llvm/docs/LangRef.md
index 3a616e8a29fcf..2ecd0f9adfc05 100644
--- a/llvm/docs/LangRef.md
+++ b/llvm/docs/LangRef.md
@@ -8088,18 +8088,15 @@ main loop. Each node has a single operand containing
the name string:
Additionally, enabling predication implicitly enables vectorization.
-#### '`llvm.loop.vectorize.scalable.enable`' Metadata
+#### '`llvm.loop.vectorize.scalable.enable`' and
'`llvm.loop.vectorize.scalable.disable`' Metadata
This metadata selectively enables or disables scalable vectorization for the
loop, and only has any effect if vectorization for the loop is already enabled.
-The first operand is the string `llvm.loop.vectorize.scalable.enable`
-and the second operand is a bit. If the bit operand value is 1 scalable
-vectorization is enabled, whereas a value of 0 reverts to the default fixed
-width vectorization:
+Each node has a single operand containing the name string:
```llvm
-!0 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 1}
+!0 = !{!"llvm.loop.vectorize.scalable.enable"}
+!1 = !{!"llvm.loop.vectorize.scalable.disable"}
```
#### '`llvm.loop.vectorize.width`' Metadata
diff --git a/llvm/include/llvm/IR/AutoUpgrade.h
b/llvm/include/llvm/IR/AutoUpgrade.h
index 1f1b3c4c27815..53da20d63a7f1 100644
--- a/llvm/include/llvm/IR/AutoUpgrade.h
+++ b/llvm/include/llvm/IR/AutoUpgrade.h
@@ -121,7 +121,9 @@ namespace llvm {
{"llvm.loop.distribute.enable", "llvm.loop.distribute.disable"},
{"llvm.loop.vectorize.enable", "llvm.loop.vectorize.disable"},
{"llvm.loop.vectorize.predicate.enable",
- "llvm.loop.vectorize.predicate.disable"}};
+ "llvm.loop.vectorize.predicate.disable"},
+ {"llvm.loop.vectorize.scalable.enable",
+ "llvm.loop.vectorize.scalable.disable"}};
/// Return the replacement tags for the enable tag \p Name, or nullptr.
inline const BooleanLoopTags *findBooleanLoopTags(StringRef Name) {
diff --git a/llvm/include/llvm/Transforms/Utils/LoopUtils.h
b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
index 0bf2d866b72bf..f7c02589e9d1a 100644
--- a/llvm/include/llvm/Transforms/Utils/LoopUtils.h
+++ b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
@@ -239,8 +239,10 @@ LLVM_ABI SmallVector<Instruction *, 8>
findDefsUsedOutsideOfLoop(Loop *L);
/// Find a combination of metadata ("llvm.loop.vectorize.width" and
/// "llvm.loop.vectorize.scalable.enable") for a loop and use it to construct a
-/// ElementCount. If the metadata "llvm.loop.vectorize.width" cannot be found
-/// then std::nullopt is returned.
+/// ElementCount. If scalable.enable is present the count is scalable; if
+/// scalable.disable is present or the tag is absent, it is fixed-width. If the
+/// metadata "llvm.loop.vectorize.width" cannot be found then std::nullopt is
+/// returned.
LLVM_ABI std::optional<ElementCount>
getOptionalElementCountLoopAttribute(const Loop *TheLoop);
diff --git a/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
b/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
index 502fec920ece9..7b8b27c6541e1 100644
--- a/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+++ b/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
@@ -58,7 +58,7 @@ class Type;
/// for example 'force', means a decision has been made. So, we need to be
/// careful NOT to add them if the user hasn't specifically asked so.
class LoopVectorizeHints {
- enum HintKind { HK_WIDTH, HK_INTERLEAVE, HK_ISVECTORIZED, HK_SCALABLE };
+ enum HintKind { HK_WIDTH, HK_INTERLEAVE, HK_ISVECTORIZED };
/// Hint - associates name and validation with the hint value.
struct Hint {
@@ -88,8 +88,9 @@ class LoopVectorizeHints {
/// Vector Predicate; one of ForceKind, carried as a plain value like Force.
unsigned Predicate;
- /// Says whether we should use fixed width or scalable vectorization.
- Hint Scalable;
+ /// Scalable vs fixed-width preference; one of ScalableForceKind. Carried as
+ /// a plain value because the enable/disable pair has no operand to validate.
+ unsigned Scalable;
/// Return the loop metadata prefix.
static StringRef Prefix() { return "llvm.loop."; }
@@ -134,9 +135,8 @@ class LoopVectorizeHints {
ElementCount getWidth() const {
return ElementCount::get(
- Width.Value,
- (ScalableForceKind)Scalable.Value == SK_PreferScalable ||
- (ScalableForceKind)Scalable.Value == SK_AlwaysScalable);
+ Width.Value, (ScalableForceKind)Scalable == SK_PreferScalable ||
+ (ScalableForceKind)Scalable == SK_AlwaysScalable);
}
unsigned getInterleave() const {
@@ -159,13 +159,13 @@ class LoopVectorizeHints {
/// \return true if scalable vectorization has been explicitly disabled.
bool isScalableVectorizationDisabled() const {
- return (ScalableForceKind)Scalable.Value == SK_FixedWidthOnly;
+ return (ScalableForceKind)Scalable == SK_FixedWidthOnly;
}
/// \return true if scalable vectorization is always preferred over
/// fixed-length when feasible, regardless of cost.
bool isScalableVectorizationAlwaysPreferred() const {
- return (ScalableForceKind)Scalable.Value == SK_AlwaysScalable;
+ return (ScalableForceKind)Scalable == SK_AlwaysScalable;
}
/// When enabling loop hints are provided we allow the vectorizer to change
diff --git a/llvm/lib/Transforms/Utils/LoopUtils.cpp
b/llvm/lib/Transforms/Utils/LoopUtils.cpp
index f5dcdb4ace162..7c77acc9d748c 100644
--- a/llvm/lib/Transforms/Utils/LoopUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUtils.cpp
@@ -276,9 +276,11 @@ llvm::getOptionalElementCountLoopAttribute(const Loop
*TheLoop) {
getOptionalIntLoopAttribute(TheLoop, "llvm.loop.vectorize.width");
if (Width) {
- std::optional<int> IsScalable = getOptionalIntLoopAttribute(
- TheLoop, "llvm.loop.vectorize.scalable.enable");
- return ElementCount::get(*Width, IsScalable.value_or(false));
+ // Presence of the scalable.enable unit node means a scalable ElementCount;
+ // disable or absence both mean fixed-width.
+ bool IsScalable =
+ getBooleanLoopAttribute(TheLoop,
"llvm.loop.vectorize.scalable.enable");
+ return ElementCount::get(*Width, IsScalable);
}
return std::nullopt;
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
index 14e9def164b74..23c0337900565 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
@@ -91,7 +91,6 @@ bool LoopVectorizeHints::Hint::validate(unsigned Val) {
case HK_INTERLEAVE:
return isPowerOf2_32(Val) && Val <= MaxInterleaveFactor;
case HK_ISVECTORIZED:
- case HK_SCALABLE:
return (Val == 0 || Val == 1);
}
return false;
@@ -105,9 +104,7 @@ LoopVectorizeHints::LoopVectorizeHints(const Loop *L,
VectorizerParams::VectorizationFactor.getKnownMinValue(),
HK_WIDTH),
Interleave("interleave.count", InterleaveOnlyWhenForced, HK_INTERLEAVE),
Force(FK_Undefined), IsVectorized("isvectorized", 0, HK_ISVECTORIZED),
- Predicate(FK_Undefined),
- Scalable("vectorize.scalable.enable", SK_Unspecified, HK_SCALABLE),
- TheLoop(L), ORE(ORE) {
+ Predicate(FK_Undefined), Scalable(SK_Unspecified), TheLoop(L), ORE(ORE) {
// Populate values with existing loop metadata.
getHintsFromMetadata();
@@ -121,31 +118,31 @@ LoopVectorizeHints::LoopVectorizeHints(const Loop *L,
// - Target default
// - Metadata width
// - Force option (always overrides)
- if ((LoopVectorizeHints::ScalableForceKind)Scalable.Value == SK_Unspecified)
{
+ if ((LoopVectorizeHints::ScalableForceKind)Scalable == SK_Unspecified) {
if (TTI)
- Scalable.Value = TTI->enableScalableVectorization() ? SK_PreferScalable
- : SK_FixedWidthOnly;
+ Scalable = TTI->enableScalableVectorization() ? SK_PreferScalable
+ : SK_FixedWidthOnly;
if (Width.Value)
// If the width is set, but the metadata says nothing about the scalable
// property, then assume it concerns only a fixed-width UserVF.
// If width is not set, the flag takes precedence.
- Scalable.Value = SK_FixedWidthOnly;
+ Scalable = SK_FixedWidthOnly;
}
// If the flag is set to force any use of scalable vectors, override the loop
// hints.
if (ForceScalableVectorization.getValue() !=
LoopVectorizeHints::SK_Unspecified)
- Scalable.Value = ForceScalableVectorization.getValue();
+ Scalable = ForceScalableVectorization.getValue();
// If force-vector-width is scalable, force scalable vectorization.
if (VectorizerParams::VectorizationFactor.isScalable())
- Scalable.Value = SK_AlwaysScalable;
+ Scalable = SK_AlwaysScalable;
// Scalable vectorization is disabled if no preference is specified.
- if ((LoopVectorizeHints::ScalableForceKind)Scalable.Value == SK_Unspecified)
- Scalable.Value = SK_FixedWidthOnly;
+ if ((LoopVectorizeHints::ScalableForceKind)Scalable == SK_Unspecified)
+ Scalable = SK_FixedWidthOnly;
if (IsVectorized.Value != 1)
// If the vectorization width and interleaving count are both 1 then
@@ -293,6 +290,10 @@ void LoopVectorizeHints::getHintsFromMetadata() {
Predicate = FK_Enabled;
else if (Name == "llvm.loop.vectorize.predicate.disable")
Predicate = FK_Disabled;
+ else if (Name == "llvm.loop.vectorize.scalable.enable")
+ Scalable = SK_PreferScalable;
+ else if (Name == "llvm.loop.vectorize.scalable.disable")
+ Scalable = SK_FixedWidthOnly;
continue;
}
if (Args.size() == 1)
@@ -309,9 +310,9 @@ void LoopVectorizeHints::setHint(StringRef Name, Metadata
*Arg) {
return;
unsigned Val = C->getZExtValue();
- // Force and Predicate are omitted: they are only spelled as single-operand
- // enable/disable nodes, which never reach setHint().
- Hint *Hints[] = {&Width, &Interleave, &IsVectorized, &Scalable};
+ // Force, Predicate, and Scalable are omitted: they are only spelled as
+ // single-operand enable/disable nodes, which never reach setHint().
+ Hint *Hints[] = {&Width, &Interleave, &IsVectorized};
for (auto *H : Hints) {
if (Name == H->Name) {
if (H->validate(Val))
diff --git a/llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll
b/llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll
new file mode 100644
index 0000000000000..0087bb414031c
--- /dev/null
+++ b/llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll
@@ -0,0 +1,37 @@
+; Test that older bitcode carrying the two-operand form of
+; "llvm.loop.vectorize.scalable.enable" is auto-upgraded to the
+; single-operand enable/disable pair on load.
+;
+; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+define void @enable_true() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !0
+exit:
+ ret void
+}
+
+define void @enable_false() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !2
+exit:
+ ret void
+}
+
+; i1 true -> single-operand enable.
+; i1 false -> disable.
+; CHECK: !{!"llvm.loop.vectorize.scalable.enable"}
+; CHECK: !{!"llvm.loop.vectorize.scalable.disable"}
+; The old two-operand nodes must be gone from the module.
+; CHECK-NOT: llvm.loop.vectorize.scalable.enable", i1
+; CHECK-NOT: llvm.loop.vectorize.scalable.disable", i1
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = distinct !{!2, !3}
+!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
diff --git a/llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll.bc
b/llvm/test/Bitcode/upgrade-loop-vectorize-scalable-enable.ll.bc
new file mode 100644
index
0000000000000000000000000000000000000000..1922eb1c2aec9bbf4f0a7acdae873a505385224e
GIT binary patch
literal 2364
zcmbtWeQXow8GjuoKGT@@45UpAcZZLpDB40e96o%pJ)M1R=4w=PDbif66S3o%&}HB_
zCSTnuALr#l>s4+Qq5MH5XRS~>?GH0WTTrusb7^W)k1<qDltr1{d<?b}+z>XVp=r-K
zU9~^9{j-zqdGF-A=Y5{v$8+|GR~8P`AXJ4A3YxfvXJ7c$g&+NW;+s2i4NvK8Rfshq
zw6g-C>IxRYg6iQUr2049xyok@W*h&eE@67I%4lIKUkk=fPgi(etxq)6CUVwLW5mpz
zs|kh7Z?s?a44bxWdfgsMct1^T+2uVFH(A(o6``DQO9L;o4VypG*=z}~?Wpgl_3cTa
zEh?ETwqf$zS8bs>%QM&(n(;?dY<*kmNi*FV%Z<FAVxJmLR@(L>bk+*BK~1~DmFAy$
z&RjJgfspE%_IV%Mv|F65^4NA8P1|*iZbQWdv|`j+K-<~F_^<I_|NIxn*4NJeW9x-G
zi-#^f`ic6RHSW@U@bVu@=YHwDaC!N}4=x?pseBUH_x}7>-dBTtpL`Jh?mL|HW22Vh
ze;ilL)&9zV`#oNThW*tVZeJcv$a>M8E{z~0JOSx6>}|}L$+G2eD!FO**Jmrmmo_I6
zx>$!$oerTEW1N~PQsEk%Yecjs)TAd)3=R;zV?Cx7M1E$*>v7y-@-Wj``r0@Z=Bmn%
z$vg6TS59;#^{)ItG8Q3THWGtgB@!WqBKp1oC1O=9`7L-gg^L_{k|P&Oxa7kv<{5f{
zrEaqHbbtwSXB|_r<GRRC=$%utGog3nOErD%#LHd8p)Mr~F|I^XN~E3WYb5#}RzceS
zxN^*>^wcTQF=cQ}YPws(cMJHz6}-yngSl~PX`ITJ<9vXcW2qU5o(mX$mlFA$$d8rd
zq-q}(?IU`}sJa(6eRRh0vEGqUO&^|6B7P+rkz-xNK)VvFQ(|ewa_xEYE+W@_cqxS!
z1+r+xtI&nDk)F>o({APlOU+Bne1Tdj(tpx1;kxJS8L{=e?8y5XzG$Rf=^r2l#-2O8
zo+32_n3tHj0Ck(C7qav#Iz}s)rAq<B(I3k8yz0n^E&$}wv~x*xjKHm${NOR@ROyF$
zjKokQ5gn6WTr}g=D|p$5?{oFp8*XN)SbMWbFF*laiz6euCgdFn)t(gjyy~3H@;McH
zbmqMiJw^hm>Hz@#iskpSc(tAUtY9cv$z_gQwvvDG;ge>($YHp>UohM$;3Xe^$kl(k
z8la{n`ew0qm8Dl$dWNNe!Q1T4u=Op+l<1n&^P@7K_fG-)(CiS@=~en8ishp};(Huf
zEZ{o=c_$6Ks5*V`y9D%dYz(BLAso97R7wdqUr+%$7ci9<X43TBI9+fv3t1}M(81xN
z#xDs;mN}7?PuCH>UgcO?`F<SUy*R3KCROLCYQHYFf}HYzn90jN?g=nZ>a{F=M5+lN
zKF;BLR`OoKaL-4sYpL*Z!LVW_i`Svqw*|Scix@O2mLuCIRR`$s9nqc#4E20UcINd?
z0CQ9|wQZgS>4KuhsaGUsO$R*AUNnFLArElTvh`q{5{VN-?-GNJKv{OeZO`Z(Q>y(@
zg=<P}9fjJu=B@NC9Ruji0)W}g8vB9awQ>?fE?&{ha-WkWxy+Q-Bj~@kkr*2Le8$~6
z35Cg;Zqs5bxDV93q$a<C=Oj8`tX&zWW+moEk)AKsYS2M>ZU$sF2S%&ujo=3<yu>Yz
z%YBVXUj*_iJ%SQ_SQYaU{h;#~XmA9S`crww$1?1~L-Gl+^}6`ANu3k)GbXlXfEwRw
z`-T#zC6+4a=&-*Z00dtMxCpUSecz|q<PNy9RQ=}^zAIofXhrC8m_ctcUaL4_vTO>4
za#yVq4A{1|wr!Fpo%(zxXXHJ@$)Io^=1~Vc+uhywz2@#yry|XLogJ}L(Gx?R&AlCg
z?m)1+v$^x6w!l*ey$3VwTd-EY8Uf4NiGIJ31k>pGrh)%546;vSQ2KIvITrAu4{vz-
zatW`Ms_*(pFjjR^OEsX;SfywqYEpColTG${aCw%7%=v(BKe>!x9zg5lGW0Ewps!*C
zFK5zLB?^vD!@E3SnS@EBcQtig3sAS>48S%YU~X&>6>zuU6=24U*95!{5ndO_>bilH
z64jilnLd(MqE@BqLp~|)fYEYO<eM_H60Hs6>}Hrivk)cVnVQwna}u?o&?l&pK(3kb
z1A)AqiTjlvPKo(TfXt-q8kL>rMP8eN;27DNQO}&!CZ(nw7-<`Yjc;CIciwVS3lfdc
zZ_Nl90AnKW1ofRSx09BgFho--(1ikx2yKJ4-Z)(1VAaF9E#dLArWpeZ?=}xe=1f5-
ze}`&?%4>02aPNOU@fLEwnA5&wx*#fl`@cObY=ztM@t<=B|F4`q){WY1*t{!&{-&=h
zc*}cz2mXUJz|~g$XoJ?zhP;l&qNh8*xC{rndpm9Wo4IE0_=%V`WN+c^9h{v%v@aMu
z80g>*1j8I>?+6F&Asc_N<3Qj*r`>*NpC;nHvCiJuUeAeG$Ei@~-qVre(LktkkEZNB
UUn+agzm&aaW54F^ZmqC?0%v_y_y7O^
literal 0
HcmV?d00001
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
index 7fee6fd8fdda2..f0903c0d9bf69 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
@@ -515,7 +515,7 @@ attributes #0 = { vscale_range(1,16)
"target-features"="+sve" }
!1 = !{!"llvm.loop.vectorize.width", i32 4}
!3 = distinct !{!3, !4, !5}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
-!5 = !{!"llvm.loop.interleave.count", i32 8}!2 =
!{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!5 = !{!"llvm.loop.interleave.count", i32 8}!2 =
!{!"llvm.loop.vectorize.scalable.enable"}
; Loop combining a bounded (i % 4) load with a reverse-stride load.
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
index 2143cf45fc1bd..ad59b558fd850 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
@@ -323,5 +323,5 @@ exit:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!2 = !{!"llvm.loop.vectorize.scalable.disable"}
!3 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
index 5822b91d54226..d51aa872aaf7f 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
@@ -1340,5 +1340,5 @@ attributes #3 = { "target-cpu"="neoverse-v2" }
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 8}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!2 = !{!"llvm.loop.vectorize.scalable.disable"}
!3 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
index b141e11e107e1..10ffc34389b4e 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
@@ -103,4 +103,4 @@ for.end:
attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
index f49b18c80f528..9e4ff7b36e28f 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
@@ -88,7 +88,7 @@ attributes #0 = { "target-features"="+neon,+sve" }
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = distinct !{!5, !6}
-!6 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!6 = !{!"llvm.loop.vectorize.scalable.disable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
index 127057c58db2d..082912c13c409 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
@@ -162,7 +162,7 @@ attributes #0 = { uwtable vscale_range(1,16)
"aarch64_pstate_sm_body" "target-fe
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 16}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
;.
; CHECK: [[META0]] = !{[[META1:![0-9]+]]}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
index 81a7c4455c44d..b9e6dfe569c74 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
@@ -1686,5 +1686,5 @@ exit:
attributes #0 = { vscale_range(1,16) }
!0 = distinct !{!0, !1, !2}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
!2 = !{!"llvm.loop.interleave.count", i32 1}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
index 4fc67222708ee..20cf951268636 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
@@ -660,7 +660,7 @@ attributes #0 = { "target-features"="+neon,+sve"
vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = !{!"llvm.loop.interleave.count", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
index 0ef03c58be97a..73384c7d383ba 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
@@ -28,4 +28,4 @@ for.end:
declare void @foo(ptr)
!0 = !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
index 0459b98f2eb1d..ed6657fc3c14a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
@@ -230,7 +230,7 @@ attributes #3 = {
"vector-function-abi-variant"="_ZGV_LLVM_N2v_llvm.sin.f64(sin_
!1 = distinct !{!1, !2, !3}
!2 = !{!"llvm.loop.vectorize.width", i32 2}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!llvm.dbg.cu = !{!4}
!llvm.module.flags = !{!7}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
index 71e814bd4bdfd..761cc0cd45801 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
@@ -86,6 +86,6 @@ attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.interleave.count", i32 1}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
index 5de28c708ed92..bedd88844b36a 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
@@ -168,4 +168,4 @@ for.end:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
index 25d01a2295899..e59ea8e5a1912 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
@@ -62,6 +62,6 @@ for.end:
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.interleave.count", i32 1}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
index cec1dd6c359af..ccf6431d1baf6 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
@@ -454,6 +454,6 @@ for.end:
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.vectorize.width", i32 8}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.interleave.count", i32 2}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
index 18a555cbc3735..6d6d95bcac821 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
@@ -1642,4 +1642,4 @@ attributes #0 = { vscale_range(1, 16) }
!5 = !{!"llvm.loop.vectorize.width", i32 2}
!6 = !{!"llvm.loop.interleave.count", i32 1}
!7 = !{!"llvm.loop.interleave.count", i32 4}
-!8 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!8 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
index 7cb56bb10809a..376a12b6dd133 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
@@ -69,7 +69,7 @@ exit:
!0 = !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
; test2
;
@@ -114,7 +114,7 @@ exit:
!3 = !{!3, !4, !5}
!4 = !{!"llvm.loop.vectorize.width", i32 8}
-!5 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!5 = !{!"llvm.loop.vectorize.scalable.enable"}
; test3
;
@@ -162,7 +162,7 @@ exit:
!6 = !{!6, !7, !8}
!7 = !{!"llvm.loop.vectorize.width", i32 2}
-!8 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!8 = !{!"llvm.loop.vectorize.scalable.enable"}
; test4
;
@@ -214,7 +214,7 @@ exit:
!9 = !{!9, !10, !11}
!10 = !{!"llvm.loop.vectorize.width", i32 4}
-!11 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!11 = !{!"llvm.loop.vectorize.scalable.enable"}
; test5
;
@@ -262,7 +262,7 @@ exit:
!12 = !{!12, !13, !14}
!13 = !{!"llvm.loop.vectorize.width", i32 4}
-!14 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!14 = !{!"llvm.loop.vectorize.scalable.enable"}
; test6
;
@@ -313,7 +313,7 @@ exit:
!15 = !{!15, !16, !17}
!16 = !{!"llvm.loop.vectorize.width", i32 16}
-!17 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!17 = !{!"llvm.loop.vectorize.scalable.enable"}
; CHECK-NO-SVE-REMARKS-LABEL: LV: Checking a loop in 'test_no_sve'
; CHECK-NO-SVE-REMARKS: LV: User VF=vscale x 4 is ignored because scalable
vectors are not available.
@@ -344,7 +344,7 @@ exit:
!18 = !{!18, !19, !20}
!19 = !{!"llvm.loop.vectorize.width", i32 4}
-!20 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!20 = !{!"llvm.loop.vectorize.scalable.enable"}
; Test the LV falls back to fixed-width vectorization if scalable vectors are
; supported but max vscale is undefined.
@@ -381,4 +381,4 @@ exit:
attributes #0 = { vscale_range(1, 16) }
!21 = !{!21, !22, !23}
!22 = !{!"llvm.loop.vectorize.width", i32 4}
-!23 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!23 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
index aada2da84f79c..15ab46ad2dd87 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
@@ -63,7 +63,7 @@ for.body:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.interleave.count", i32 1}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!3 = !{!"llvm.loop.vectorize.scalable.disable"}
define void @test_scalable_loopvec(ptr noalias %dst, ptr readonly %src, i32
%N) #0 {
; CHECK-LABEL: @test_scalable_loopvec
@@ -96,7 +96,7 @@ for.body:
!4 = distinct !{!4, !5, !6, !7}
!5 = !{!"llvm.loop.mustprogress"}
!6 = !{!"llvm.loop.interleave.count", i32 1}
-!7 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!7 = !{!"llvm.loop.vectorize.scalable.enable"}
define void @test_slp(ptr noalias %dst, ptr readonly %src, i32 %N) #0 {
; CHECK-LABEL: @test_slp
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
index 0d5d4a42f100c..ae25386d2dc12 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
@@ -93,6 +93,6 @@ for.end:
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
index d51ae84401031..a4520a77f6a3f 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
@@ -181,6 +181,6 @@ attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
index 6a423c5f2f5da..73e50632ec753 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
@@ -111,4 +111,4 @@ for.end:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.interleave.count", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
index c889db1241e47..edae577cdee03 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
@@ -86,4 +86,4 @@ for.end:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.interleave.count", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
index 0c0bf245e4752..8a59ff17cb999 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
@@ -81,4 +81,4 @@ for.end:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.interleave.count", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
index 687a16cefd65b..641fded940d24 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
@@ -65,7 +65,7 @@ attributes #0 = { "target-cpu"="generic"
"target-features"="+neon,+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
!6 = distinct !{!6, !1, !2, !3, !4, !5}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
index eeae794f068cf..46f309d3cce37 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
@@ -185,6 +185,6 @@ attributes #0 = { vscale_range(1, 16)
"target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
index b43e2c8359525..6486eb33b2d12 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
@@ -269,6 +269,6 @@ attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
index 61cbdff3e0679..d12424ced6e41 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
@@ -120,4 +120,4 @@ for.end:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
index eb12b7f5c1cd4..1435a284c3937 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
@@ -73,7 +73,7 @@ attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.vectorize.enable"}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
!5 = !{!"llvm.loop.interleave.count", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
index bea58cbdbfb59..d6a0c6eeab1ed 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
@@ -34,4 +34,4 @@ for.end:
!1 = distinct !{!1, !2, !3, !4}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
!3 = !{!"llvm.loop.interleave.count", i32 1}
-!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!4 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
index a01188ca95678..a4b40d47097f5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
@@ -105,6 +105,6 @@ attributes #0 = { "target-features"="+neon,+sve"
vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = !{!"llvm.loop.interleave.count", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
index 6013e2b68ff77..7943d3478d91a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
@@ -25,4 +25,4 @@ for.end:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
index 561cbce0f8738..0443005d6f702 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
@@ -95,7 +95,7 @@ attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
!6 = distinct !{!6, !1, !7, !3, !4, !5}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
index 5ee66f493a9cd..fc3a301d94756 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
@@ -74,6 +74,6 @@ exit:
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
index ab4207c7b84e7..54b0d14eb22d1 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
@@ -212,4 +212,4 @@ for.end.loopexit:
attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
index 5148479e1bd66..6b6d46a8b732c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
@@ -68,4 +68,4 @@ for.end:
attributes #0 = { "target-features"="+sve" vscale_range(1, 16) }
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
index e80df2a09824c..9f5937c440595 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
@@ -399,6 +399,6 @@ attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.interleave.count", i32 1}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
index e0f73ee4cc8a3..3d59d8924cf09 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
@@ -244,7 +244,7 @@ for.end:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = distinct !{!3, !4}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
index 83d9a717d04d2..5998c36d32361 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
@@ -156,6 +156,6 @@ while.end.loopexit:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
attributes #0 = { "target-features"="+sve" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
index 27b5cdc4001bb..42e25e5c13ae1 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
@@ -532,7 +532,7 @@ while.end.loopexit:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = distinct !{!3, !4}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
index 0b7782c95c417..45199cdc687ce 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
@@ -261,6 +261,6 @@ attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 8}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
index 91df2229db6e6..69266fe789775 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
@@ -100,5 +100,5 @@ attributes #0 = {"target-cpu"="generic"
"target-features"="+neon,+sve"}
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
index d1d1aee639e0c..5cbea15df1bc5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
@@ -150,7 +150,7 @@ attributes #0 = { "target-cpu"="generic"
"target-features"="+neon,+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 8}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = !{!"llvm.loop.interleave.count", i32 2}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
index 0039941d2d47f..8ab78377a19d3 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
@@ -56,6 +56,6 @@ attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 2}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 1}
!5 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
index 2b1385f0a11ab..82253bb8ac1df 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
@@ -162,7 +162,7 @@ attributes #0 = {"target-features"="+sve"}
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.interleave.count", i32 1}
!2 = !{!"llvm.loop.vectorize.width", i32 2}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{ !5 }
!5 = distinct !{ !5, !6 }
!6 = distinct !{ !7 }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
index f1085e21d30f1..12a802ac0ea8b 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
@@ -346,7 +346,7 @@ attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = !{!"llvm.loop.interleave.count", i32 2}
!6 = distinct !{!6, !1, !7, !3, !4, !8}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
index d323dce104e66..2547331eff6a1 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
@@ -151,6 +151,6 @@ while.end.loopexit:
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.vectorize.predicate.enable"}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.interleave.count", i32 1}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
index 49e68f71c3091..de77918ab38d6 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
@@ -118,6 +118,6 @@ attributes #0 = {"target-cpu"="generic"
"target-features"="+neon,+sve" vscale_ra
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!3 = !{!"llvm.loop.vectorize.scalable.disable"}
!4 = !{!"llvm.loop.vectorize.enable"}
!5 = !{!"llvm.loop.interleave.count", i32 2}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
index e756076f27fd2..7cf4b384daa6b 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
@@ -265,5 +265,5 @@ attributes #1 = { "target-cpu"="neoverse-v2" }
!0 = distinct !{!0, !1, !2, !3, !4}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 8}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!3 = !{!"llvm.loop.vectorize.scalable.disable"}
!4 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
b/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
index 72a1f538e0364..03f404e98d573 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
@@ -195,4 +195,4 @@ for.end:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
b/llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
index 8982804f476de..a6b6afc34d440 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
@@ -901,6 +901,6 @@ exit:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.vectorize.enable"}
!4 = distinct !{!4, !1, !3}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
b/llvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
index 3586f78d54983..8fbfed9b9c636 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
@@ -34,4 +34,4 @@ exit:
!6 = !{!6, !7, !8}
!7 = !{!"llvm.loop.vectorize.width", i32 2}
-!8 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!8 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
index a1a50684cd751..c40953928ed51 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
@@ -99,4 +99,4 @@ for.end:
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
index c6bffa6df3533..47935d4c0bdaa 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
@@ -58,5 +58,5 @@ exit:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
!3 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
b/llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
index 94ccb5b33273e..8ec8f707d2870 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
@@ -658,5 +658,5 @@ exit:
}
!0 = distinct !{!0, !1, !2}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
index 5ae9e55d58bac..b75d41907ee90 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
@@ -1115,5 +1115,5 @@ attributes #4 = { "target-cpu"="haswell" }
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!2 = !{!"llvm.loop.vectorize.scalable.disable"}
!3 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
b/llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
index 94a48f086c16b..644a331a832bf 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
@@ -175,5 +175,5 @@ attributes #0 = { "target-cpu"="skylake-avx512" }
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.vectorize.width", i32 2}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!2 = !{!"llvm.loop.vectorize.scalable.disable"}
!3 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/cast-costs.ll
b/llvm/test/Transforms/LoopVectorize/cast-costs.ll
index 6196b6a54251c..6cd37e4274965 100644
--- a/llvm/test/Transforms/LoopVectorize/cast-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/cast-costs.ll
@@ -100,4 +100,4 @@ exit:
}
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/metadata-width.ll
b/llvm/test/Transforms/LoopVectorize/metadata-width.ll
index da247826cbc96..ae7a607d4a48c 100644
--- a/llvm/test/Transforms/LoopVectorize/metadata-width.ll
+++ b/llvm/test/Transforms/LoopVectorize/metadata-width.ll
@@ -94,8 +94,8 @@ attributes #0 = { "less-precise-fpmad"="false"
"frame-pointer"="none" "no-infs-f
!0 = !{!0, !1, !5}
!1 = !{!"llvm.loop.vectorize.width", i32 8}
!2 = !{!2, !1, !3}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i32 1}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!4, !1, !5}
-!5 = !{!"llvm.loop.vectorize.scalable.enable", i32 0}
+!5 = !{!"llvm.loop.vectorize.scalable.disable"}
!6 = !{!6, !7}
!7 = !{!"llvm.loop.vectorize.width", i32 8}
diff --git a/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
b/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
index c00086ea9496e..229419b27c84f 100644
--- a/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
@@ -66,4 +66,4 @@ for.end:
!1 = !{!"llvm.loop.vectorize.enable"}
!2 = !{!"llvm.loop.vectorize.width", i32 1}
!3 = distinct !{!3, !1, !2, !4}
-!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!4 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-scalable.ll
b/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-scalable.ll
index 05bc0f4addec5..06d3b6bf56337 100644
---
a/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-scalable.ll
+++
b/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-scalable.ll
@@ -25,4 +25,4 @@ exit:
}
!0 = !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
b/llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
index bd02f4e1ab6a5..12a6cbb5e4771 100644
--- a/llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
+++ b/llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
@@ -317,5 +317,5 @@ innermost.loop.j1:
!3 = distinct !{!3, !4, !5, !6}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
-!5 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+!5 = !{!"llvm.loop.vectorize.scalable.disable"}
!6 = !{!"llvm.loop.vectorize.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
b/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
index 511fec315dd10..9c423eb2102ed 100644
--- a/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
@@ -137,5 +137,5 @@ exit:
!1 = distinct !{!1, !2, !3, !4}
!2 = !{!"llvm.loop.vectorize.enable"}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
index d8b7d21c5d086..c3a3b45a3842e 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
@@ -306,7 +306,7 @@ exit:
!0 = distinct !{!0, !1, !2, !3, !4, !5}
!1 = !{!"llvm.loop.mustprogress"}
!2 = !{!"llvm.loop.vectorize.width", i32 2}
-!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.scalable.enable"}
!4 = !{!"llvm.loop.interleave.count", i32 2}
!5 = !{!"llvm.loop.vectorize.enable"}
!6 = distinct !{!6, !1, !7, !3, !8, !5}
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
b/llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
index 50a8e2be8545c..7cce3ede66941 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
@@ -123,4 +123,4 @@ for.exit:
}
!0 = !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
b/llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
index d956a24e0e64a..f6b1d216038a9 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
@@ -30,4 +30,4 @@ exit:
!0 = !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.width", i32 4}
-!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.scalable.enable"}
diff --git a/llvm/test/Verifier/llvm.loop.vectorize.scalable.ll
b/llvm/test/Verifier/llvm.loop.vectorize.scalable.ll
new file mode 100644
index 0000000000000..d73a5dfae3ce7
--- /dev/null
+++ b/llvm/test/Verifier/llvm.loop.vectorize.scalable.ll
@@ -0,0 +1,41 @@
+; Test "llvm.loop.vectorize.scalable.enable" /
+; "llvm.loop.vectorize.scalable.disable" single-operand validation.
+
+; DEFINE: %{VERIFY} = llvm-as -disable-output %t 2>&1
+
+define void @test() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !0
+exit:
+ ret void
+}
+!0 = distinct !{!0, !1}
+
+; BAD: Expecting only the metadata name
+
+; Single-operand enable.
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.scalable.enable"}' >> %t
+; RUN: %{VERIFY}
+
+; Single-operand disable.
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.scalable.disable"}' >> %t
+; RUN: %{VERIFY}
+
+; Two-operand enable with boolean false (legacy form, now rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
+
+; Two-operand enable with boolean true (legacy form, now rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 1}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
+
+; Two-operand disable (rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.scalable.disable", i1 0}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
diff --git a/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
b/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
index 1bf3400614cf5..6658b4a920e37 100644
--- a/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
+++ b/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
@@ -292,7 +292,8 @@ FailureOr<LoopVectorizeAttr>
LoopMetadataConversion::convertVectorizeAttr() {
lookupBooleanUnitNode("llvm.loop.vectorize.predicate.enable",
"llvm.loop.vectorize.predicate.disable");
FailureOr<BoolAttr> scalableEnable =
- lookupBoolNode("llvm.loop.vectorize.scalable.enable");
+ lookupBooleanUnitNode("llvm.loop.vectorize.scalable.enable",
+ "llvm.loop.vectorize.scalable.disable");
FailureOr<IntegerAttr> width = lookupIntNode("llvm.loop.vectorize.width");
FailureOr<LoopAnnotationAttr> followupVec =
lookupFollowupNode("llvm.loop.vectorize.followup_vectorized");
diff --git a/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
b/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
index cf0e56df2c2b3..475799e7fdbfd 100644
--- a/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
@@ -124,8 +124,9 @@ void
LoopAnnotationConversion::convertLoopOptions(LoopVectorizeAttr options) {
convertBooleanUnitNode("llvm.loop.vectorize.predicate.enable",
"llvm.loop.vectorize.predicate.disable",
options.getPredicateEnable());
- convertBoolNode("llvm.loop.vectorize.scalable.enable",
- options.getScalableEnable());
+ convertBooleanUnitNode("llvm.loop.vectorize.scalable.enable",
+ "llvm.loop.vectorize.scalable.disable",
+ options.getScalableEnable());
convertI32Node("llvm.loop.vectorize.width", options.getWidth());
convertFollowupNode("llvm.loop.vectorize.followup_vectorized",
options.getFollowupVectorized());
diff --git a/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
b/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
index 7b4a6d7fa5263..fcdff0573e31f 100644
--- a/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
+++ b/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
@@ -88,7 +88,7 @@ end:
!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
!2 = !{!"llvm.loop.vectorize.enable"}
!3 = !{!"llvm.loop.vectorize.predicate.enable"}
-!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
+!4 = !{!"llvm.loop.vectorize.scalable.disable"}
!5 = !{!"llvm.loop.vectorize.width", i32 16}
!6 = !{!"llvm.loop.vectorize.followup_vectorized", !9}
!7 = !{!"llvm.loop.vectorize.followup_epilogue", !9}
diff --git a/mlir/test/Target/LLVMIR/loop-metadata.mlir
b/mlir/test/Target/LLVMIR/loop-metadata.mlir
index 50293246d34d5..5fcb8f3918656 100644
--- a/mlir/test/Target/LLVMIR/loop-metadata.mlir
+++ b/mlir/test/Target/LLVMIR/loop-metadata.mlir
@@ -57,7 +57,7 @@ llvm.func @vectorizeOptions() {
// CHECK-DAG: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.enable"}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.predicate.enable"}
-// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.scalable.disable"}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.width", i32 16}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.followup_vectorized",
![[FOLLOWUP]]}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.followup_epilogue",
![[FOLLOWUP]]}
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
