jayfoad wrote:

That;s just demonstrating that the InstCombine optimization "C - ctpop(X) => 
ctpop(~X) if C is bitwidth" has a oneuse restriction but your isel pattern does 
not. It's not clear to me which is better in this case. Generally oneuse 
restrictions lead to codegen with longer overall latency but lower register 
pressure, so it's a tradeoff.

https://github.com/llvm/llvm-project/pull/164847
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