================
@@ -38,6 +39,17 @@ bool cir::isSized(mlir::Type ty) {
return false;
}
+mlir::Type cir::getFloatingPointType(const llvm::fltSemantics &sem,
+ mlir::MLIRContext *ctx) {
+ if (&sem == &llvm::APFloat::IEEEsingle())
+ return cir::SingleType::get(ctx);
+ if (&sem == &llvm::APFloat::IEEEdouble())
+ return cir::DoubleType::get(ctx);
+ llvm_unreachable("getFloatingPointType: floating-point semantics not yet "
----------------
adams381 wrote:
I have a plan to slice the work into smaller pieces. This is the first piece.
The pieces are
1) pass infra + core scalars (int/ptr/bool/f32/f64) // this PR
2) aggregates (struct/union layout + array/nested record fields,
sret/byval/direct/flatten)
3) aggregate corners (_BitInt, union widen, empty-record Ignore)
4) standalone leaf types (complex, vector+AVX, wide floats FP80/FP16/BF16/FP128)
https://github.com/llvm/llvm-project/pull/209636
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