https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/178449
>From 7c295587bda42450c6cd35eba7cb7014f861731a Mon Sep 17 00:00:00 2001 From: Jay Foad <[email protected]> Date: Wed, 28 Jan 2026 15:41:08 +0000 Subject: [PATCH 1/4] [Clang] Fix typo "LABLE" in test checks --- clang/test/AST/HLSL/WaveSize.hlsl | 6 +++--- clang/test/CodeGen/aix-builtin-cpu-supports.c | 2 +- clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp | 2 +- clang/test/CodeGenCXX/vtable-assume-load.cpp | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/clang/test/AST/HLSL/WaveSize.hlsl b/clang/test/AST/HLSL/WaveSize.hlsl index 44a7bfab1788b..231633bca1ae7 100644 --- a/clang/test/AST/HLSL/WaveSize.hlsl +++ b/clang/test/AST/HLSL/WaveSize.hlsl @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.8-library -x hlsl -ast-dump -o - %s | FileCheck %s -// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w0 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w0 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 128 0 0 [numthreads(8,8,1)] [WaveSize(128)] @@ -9,7 +9,7 @@ -// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w1 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w1 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 64 0 [numthreads(8,8,1)] [WaveSize(8, 64)] @@ -17,7 +17,7 @@ } -// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w2 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w2 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64 // Duplicate WaveSize attribute will be ignored. // CHECK-NOT:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64 diff --git a/clang/test/CodeGen/aix-builtin-cpu-supports.c b/clang/test/CodeGen/aix-builtin-cpu-supports.c index 52073ddfe0fd9..a15128786244c 100644 --- a/clang/test/CodeGen/aix-builtin-cpu-supports.c +++ b/clang/test/CodeGen/aix-builtin-cpu-supports.c @@ -154,7 +154,7 @@ // CHECKOP-NEXT: store i32 0, ptr %retval, align 4 // SYSCONF-NEXT: %0 = load i32, ptr getelementptr inbounds ({ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i32, i8, i8, i8, i8, i32, i32, i16, i16, [3 x i32], i32 }, ptr @_system_configuration, i32 0, i32 [[POS]]), align 4 -// SYSCALL-NEXT: %0 = call i64 @getsystemcfg(i32 [[LABLE]]) +// SYSCALL-NEXT: %0 = call i64 @getsystemcfg(i32 [[LABEL]]) // OPRT-NEXT: %1 = icmp [[OP]] [[BIT]] %0, [[VALUE]] // OPRT-NEXT: %conv = zext i1 %1 to i32 diff --git a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp index e8d3a8407cda7..d27c56d449a58 100644 --- a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp +++ b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp @@ -112,7 +112,7 @@ void g(B *a) { a->foo(); } // CHECK3: call{{.*}} void @_ZN5test31CC1Ev(ptr // CHECK3: %[[CMP:.*]] = icmp eq ptr addrspace(1) %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr addrspace(1)] }, ptr addrspace(1) @_ZTVN5test31CE, i32 0, i32 0, i32 3) // CHECK3: call{{.*}} void @llvm.assume(i1 %[[CMP]]) -// CHECK3-LABLEL: } +// CHECK3-LABEL: } void test() { C c; g(&c); diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp index 6ce07d0db1b15..21ed9233a74fa 100644 --- a/clang/test/CodeGenCXX/vtable-assume-load.cpp +++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp @@ -111,7 +111,7 @@ void g(B *a) { a->foo(); } // CHECK3: call void @_ZN5test31CC1Ev(ptr // CHECK3: %[[CMP:.*]] = icmp eq ptr %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr] }, ptr @_ZTVN5test31CE, i32 0, i32 0, i32 3) // CHECK3: call void @llvm.assume(i1 %[[CMP]]) -// CHECK3-LABLEL: } +// CHECK3-LABEL: } void test() { C c; g(&c); >From f684f641de13132e51634b0ae44e5c42fc03705f Mon Sep 17 00:00:00 2001 From: Jay Foad <[email protected]> Date: Thu, 26 Feb 2026 10:25:43 +0000 Subject: [PATCH 2/4] Relax regex --- clang/test/AST/HLSL/WaveSize.hlsl | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/clang/test/AST/HLSL/WaveSize.hlsl b/clang/test/AST/HLSL/WaveSize.hlsl index 231633bca1ae7..605666d7d92f3 100644 --- a/clang/test/AST/HLSL/WaveSize.hlsl +++ b/clang/test/AST/HLSL/WaveSize.hlsl @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.8-library -x hlsl -ast-dump -o - %s | FileCheck %s -// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w0 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w0 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 128 0 0 [numthreads(8,8,1)] [WaveSize(128)] @@ -9,7 +9,7 @@ -// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w1 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w1 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 64 0 [numthreads(8,8,1)] [WaveSize(8, 64)] @@ -17,7 +17,7 @@ } -// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w2 'void ()' +// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w2 'void ()' // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64 // Duplicate WaveSize attribute will be ignored. // CHECK-NOT:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64 >From a9d43be114cf8519440546d54f9997dd64677ef4 Mon Sep 17 00:00:00 2001 From: Jay Foad <[email protected]> Date: Thu, 26 Feb 2026 10:26:47 +0000 Subject: [PATCH 3/4] Fix -D in RUN lines --- clang/test/CodeGen/aix-builtin-cpu-supports.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/clang/test/CodeGen/aix-builtin-cpu-supports.c b/clang/test/CodeGen/aix-builtin-cpu-supports.c index a15128786244c..6581f74530714 100644 --- a/clang/test/CodeGen/aix-builtin-cpu-supports.c +++ b/clang/test/CodeGen/aix-builtin-cpu-supports.c @@ -39,7 +39,7 @@ // RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck -DBOOL=1 %s // RUN: echo "int main() { return __builtin_cpu_supports(\"htm\");}" > %t.c -// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABLE=59 -DBIT=i64 -DVALUE=0 \ +// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABEL=59 -DBIT=i64 -DVALUE=0 \ // RUN: --check-prefixes=CHECKOP,OPRT,SYSCALL // RUN: echo "int main() { return __builtin_cpu_supports(\"htm-nosc\");}" > %t.c @@ -55,7 +55,7 @@ // RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck -DBOOL=1 %s // RUN: echo "int main() { return __builtin_cpu_supports(\"mma\");}" > %t.c -// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABLE=62 -DBIT=i64 -DVALUE=0 \ +// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABEL=62 -DBIT=i64 -DVALUE=0 \ // RUN: --check-prefixes=CHECKOP,OPRT,SYSCALL // RUN: echo "int main() { return __builtin_cpu_supports(\"mmu\");}" > %t.c >From 0a21766a1ce1a4aee04d9cdfb22fd5eacd8380e8 Mon Sep 17 00:00:00 2001 From: Jay Foad <[email protected]> Date: Thu, 26 Feb 2026 11:04:08 +0000 Subject: [PATCH 4/4] Fix closing brace checks --- clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp | 2 +- clang/test/CodeGenCXX/vtable-assume-load.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp index d27c56d449a58..2c800ba7f3a1c 100644 --- a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp +++ b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp @@ -112,7 +112,7 @@ void g(B *a) { a->foo(); } // CHECK3: call{{.*}} void @_ZN5test31CC1Ev(ptr // CHECK3: %[[CMP:.*]] = icmp eq ptr addrspace(1) %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr addrspace(1)] }, ptr addrspace(1) @_ZTVN5test31CE, i32 0, i32 0, i32 3) // CHECK3: call{{.*}} void @llvm.assume(i1 %[[CMP]]) -// CHECK3-LABEL: } +// CHECK3-LABEL: {{^}}} void test() { C c; g(&c); diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp index 21ed9233a74fa..858c23846b14e 100644 --- a/clang/test/CodeGenCXX/vtable-assume-load.cpp +++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp @@ -111,7 +111,7 @@ void g(B *a) { a->foo(); } // CHECK3: call void @_ZN5test31CC1Ev(ptr // CHECK3: %[[CMP:.*]] = icmp eq ptr %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr] }, ptr @_ZTVN5test31CE, i32 0, i32 0, i32 3) // CHECK3: call void @llvm.assume(i1 %[[CMP]]) -// CHECK3-LABEL: } +// CHECK3-LABEL: {{^}}} void test() { C c; g(&c); _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
