https://github.com/chaitanyav updated https://github.com/llvm/llvm-project/pull/171966
>From 622247f95c9b68fcc48c4902b4e111f3e554d238 Mon Sep 17 00:00:00 2001 From: NagaChaitanya Vellanki <[email protected]> Date: Tue, 9 Dec 2025 11:53:54 -0800 Subject: [PATCH 1/3] [X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow SSE/AVX FP MAX/MIN intrinsics to be used in constexpr * Implemented a generic function interp__builtin_elementwise_fp_binop * NaN, Infinity, Denormal cases can be integrated into the lambda in future. For, now these cases are hardcoded in the generic function Resolves:#169991 --- clang/include/clang/Basic/BuiltinsX86.td | 46 +++++++---- clang/lib/AST/ByteCode/InterpBuiltin.cpp | 96 ++++++++++++++++++++++ clang/lib/AST/ExprConstant.cpp | 67 +++++++++++++++ clang/lib/Headers/avx512fintrin.h | 92 +++++++++------------ clang/lib/Headers/avx512fp16intrin.h | 41 ++++----- clang/lib/Headers/avx512vlfp16intrin.h | 46 +++++------ clang/lib/Headers/avx512vlintrin.h | 32 ++++---- clang/lib/Headers/avxintrin.h | 20 ++--- clang/lib/Headers/emmintrin.h | 16 ++-- clang/lib/Headers/xmmintrin.h | 20 ++--- clang/test/CodeGen/X86/avx-builtins.c | 10 +++ clang/test/CodeGen/X86/avx512f-builtins.c | 17 ++++ clang/test/CodeGen/X86/avx512vl-builtins.c | 48 +++++++---- clang/test/CodeGen/X86/sse-builtins.c | 6 ++ clang/test/CodeGen/X86/sse2-builtins.c | 6 ++ 15 files changed, 382 insertions(+), 181 deletions(-) diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index 24db7a6fa334c..2746f4c52ca69 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -71,7 +71,7 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in { } foreach Cmp = ["cmpeq", "cmplt", "cmple", "cmpunord", "cmpneq", "cmpnlt", - "cmpnle", "cmpord", "min", "max"] in { + "cmpnle", "cmpord"] in { let Features = "sse" in { def Cmp#ps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">; def Cmp#ss : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">; @@ -82,6 +82,17 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in { } } + foreach Cmp = ["min", "max"] in { + let Features = "sse", Attributes = [Constexpr] in { + def Cmp#ps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">; + def Cmp#ss : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">; + } + let Features = "sse2", Attributes = [Constexpr] in { + def Cmp#pd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>)">; + def Cmp#sd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>)">; + } + } + let Features = "sse" in { def cmpps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant char)">; def cmpss : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant char)">; @@ -468,6 +479,9 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in def vperm2f128_pd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Constant int)">; def vperm2f128_ps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant int)">; def vperm2f128_si256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Vector<8, int>, _Constant int)">; +} + +let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in { foreach Op = ["max", "min"] in { def Op#pd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>)">; def Op#ps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>)">; @@ -1009,10 +1023,6 @@ let Features = "avx512f", Attributes = [NoThrow, Const, RequiredVectorWidth<512> def cvtpd2dq512_mask : X86Builtin<"_Vector<8, int>(_Vector<8, double>, _Vector<8, int>, unsigned char, _Constant int)">; def cvtps2udq512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, float>, _Vector<16, int>, unsigned short, _Constant int)">; def cvtpd2udq512_mask : X86Builtin<"_Vector<8, int>(_Vector<8, double>, _Vector<8, int>, unsigned char, _Constant int)">; - def minps512 : X86Builtin<"_Vector<16, float>(_Vector<16, float>, _Vector<16, float>, _Constant int)">; - def minpd512 : X86Builtin<"_Vector<8, double>(_Vector<8, double>, _Vector<8, double>, _Constant int)">; - def maxps512 : X86Builtin<"_Vector<16, float>(_Vector<16, float>, _Vector<16, float>, _Constant int)">; - def maxpd512 : X86Builtin<"_Vector<8, double>(_Vector<8, double>, _Vector<8, double>, _Constant int)">; def cvtdq2ps512_mask : X86Builtin<"_Vector<16, float>(_Vector<16, int>, _Vector<16, float>, unsigned short, _Constant int)">; def cvtudq2ps512_mask : X86Builtin<"_Vector<16, float>(_Vector<16, int>, _Vector<16, float>, unsigned short, _Constant int)">; def vcvtps2ph512_mask : X86Builtin<"_Vector<16, short>(_Vector<16, float>, _Constant int, _Vector<16, short>, unsigned short)">; @@ -1023,6 +1033,10 @@ let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVecto def pmuldq512 : X86Builtin<"_Vector<8, long long int>(_Vector<16, int>, _Vector<16, int>)">; def pmuludq512 : X86Builtin<"_Vector<8, long long int>(_Vector<16, int>, _Vector<16, int>)">; def pshufd512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Constant int)">; + def minps512 : X86Builtin<"_Vector<16, float>(_Vector<16, float>, _Vector<16, float>, _Constant int)">; + def minpd512 : X86Builtin<"_Vector<8, double>(_Vector<8, double>, _Vector<8, double>, _Constant int)">; + def maxps512 : X86Builtin<"_Vector<16, float>(_Vector<16, float>, _Vector<16, float>, _Constant int)">; + def maxpd512 : X86Builtin<"_Vector<8, double>(_Vector<8, double>, _Vector<8, double>, _Constant int)">; } let Features = "avx512f", Attributes = [NoThrow, RequiredVectorWidth<512>] in { @@ -1343,12 +1357,12 @@ let Features = "avx512f", Attributes = [NoThrow, Const, RequiredVectorWidth<128> def divss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; def mulss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; def subss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; - def maxss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; - def minss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; def addsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; def divsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; def mulsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; def subsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; + def maxss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; + def minss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>, unsigned char, _Constant int)">; def maxsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; def minsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>, unsigned char, _Constant int)">; } @@ -3374,23 +3388,20 @@ let Features = "avx512fp16", Attributes = [NoThrow, Const, RequiredVectorWidth<5 def subph512 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Constant int)">; def mulph512 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Constant int)">; def divph512 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Constant int)">; +} + +let Features = "avx512fp16", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in { def maxph512 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Constant int)">; def minph512 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Constant int)">; } -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { +let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in { def minph256 : X86Builtin<"_Vector<16, _Float16>(_Vector<16, _Float16>, _Vector<16, _Float16>)">; -} - -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def minph128 : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>)">; -} - -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { def maxph256 : X86Builtin<"_Vector<16, _Float16>(_Vector<16, _Float16>, _Vector<16, _Float16>)">; } -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { +let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in { + def minph128 : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>)">; def maxph128 : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>)">; } @@ -3399,6 +3410,9 @@ let Features = "avx512fp16", Attributes = [NoThrow, Const, RequiredVectorWidth<1 def divsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>, unsigned char, _Constant int)">; def mulsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>, unsigned char, _Constant int)">; def subsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>, unsigned char, _Constant int)">; +} + +let Features = "avx512fp16", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in { def maxsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>, unsigned char, _Constant int)">; def minsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>, unsigned char, _Constant int)">; } diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index 6170da63fbcaf..cb22356bd33aa 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -2433,6 +2433,46 @@ static bool interp__builtin_elementwise_int_unaryop( return true; } +static bool interp__builtin_elementwise_fp_binop( + InterpState &S, CodePtr OpPC, const CallExpr *Call, + llvm::function_ref<APFloat(const APFloat &, const APFloat &, + std::optional<APSInt> RoundingMode)> + Fn) { + assert((Call->getNumArgs() == 2) || (Call->getNumArgs() == 3)); + const auto *VT = Call->getArg(0)->getType()->castAs<VectorType>(); + assert(VT->getElementType()->isFloatingType()); + unsigned NumElems = VT->getNumElements(); + + // Vector case. + assert(Call->getArg(0)->getType()->isVectorType() && + Call->getArg(1)->getType()->isVectorType()); + assert(VT->getElementType() == + Call->getArg(1)->getType()->castAs<VectorType>()->getElementType()); + assert(VT->getNumElements() == + Call->getArg(1)->getType()->castAs<VectorType>()->getNumElements()); + + std::optional<APSInt> RoundingMode = std::nullopt; + if (Call->getNumArgs() == 3) { + RoundingMode = popToAPSInt(S, Call->getArg(2)); + } + const Pointer &BPtr = S.Stk.pop<Pointer>(); + const Pointer &APtr = S.Stk.pop<Pointer>(); + const Pointer &Dst = S.Stk.peek<Pointer>(); + for (unsigned ElemIdx = 0; ElemIdx != NumElems; ++ElemIdx) { + using T = PrimConv<PT_Float>::T; + APFloat ElemA = APtr.elem<T>(ElemIdx).getAPFloat(); + APFloat ElemB = BPtr.elem<T>(ElemIdx).getAPFloat(); + if (ElemA.isNaN() || ElemA.isInfinity() || ElemA.isDenormal() || + ElemB.isNaN() || ElemB.isInfinity() || ElemB.isDenormal()) + return false; + Dst.elem<T>(ElemIdx) = static_cast<T>(Fn(ElemA, ElemB, RoundingMode)); + } + + Dst.initializeAllElements(); + + return true; +} + static bool interp__builtin_elementwise_int_binop( InterpState &S, CodePtr OpPC, const CallExpr *Call, llvm::function_ref<APInt(const APSInt &, const APSInt &)> Fn) { @@ -5639,6 +5679,62 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, }); } + case clang::X86::BI__builtin_ia32_minps: + case clang::X86::BI__builtin_ia32_minpd: + case clang::X86::BI__builtin_ia32_minps256: + case clang::X86::BI__builtin_ia32_minpd256: + case clang::X86::BI__builtin_ia32_minph128: + case clang::X86::BI__builtin_ia32_minph256: + return interp__builtin_elementwise_fp_binop( + S, OpPC, Call, + [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { + if (A.isZero() && B.isZero()) + return B; + else + return llvm::minimum(A, B); + }); + + case clang::X86::BI__builtin_ia32_maxps: + case clang::X86::BI__builtin_ia32_maxpd: + case clang::X86::BI__builtin_ia32_maxps256: + case clang::X86::BI__builtin_ia32_maxpd256: + case clang::X86::BI__builtin_ia32_maxph128: + case clang::X86::BI__builtin_ia32_maxph256: + return interp__builtin_elementwise_fp_binop( + S, OpPC, Call, + [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { + if (A.isZero() && B.isZero()) + return B; + else + return llvm::maximum(A, B); + }); + + case clang::X86::BI__builtin_ia32_minps512: + case clang::X86::BI__builtin_ia32_minpd512: + case clang::X86::BI__builtin_ia32_minph512: { + return interp__builtin_elementwise_fp_binop( + S, OpPC, Call, + [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { + if (A.isZero() && B.isZero()) + return B; + else + return llvm::minimum(A, B); + }); + } + + case clang::X86::BI__builtin_ia32_maxps512: + case clang::X86::BI__builtin_ia32_maxpd512: + case clang::X86::BI__builtin_ia32_maxph512: { + return interp__builtin_elementwise_fp_binop( + S, OpPC, Call, + [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { + if (A.isZero() && B.isZero()) + return B; + else + return llvm::maximum(A, B); + }); + } + default: S.FFDiag(S.Current->getLocation(OpPC), diag::note_invalid_subexpr_in_const_expr) diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index 4a04743f7c03e..03361d4f91cd2 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -14311,6 +14311,73 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) { return Success(R, E); } + case clang::X86::BI__builtin_ia32_minps: + case clang::X86::BI__builtin_ia32_minpd: + case clang::X86::BI__builtin_ia32_maxpd: + case clang::X86::BI__builtin_ia32_maxps: + case clang::X86::BI__builtin_ia32_minps256: + case clang::X86::BI__builtin_ia32_maxps256: + case clang::X86::BI__builtin_ia32_minpd256: + case clang::X86::BI__builtin_ia32_maxpd256: + case clang::X86::BI__builtin_ia32_minps512: + case clang::X86::BI__builtin_ia32_maxps512: + case clang::X86::BI__builtin_ia32_minpd512: + case clang::X86::BI__builtin_ia32_maxpd512: + case clang::X86::BI__builtin_ia32_minph128: + case clang::X86::BI__builtin_ia32_maxph128: + case clang::X86::BI__builtin_ia32_minph256: + case clang::X86::BI__builtin_ia32_maxph256: + case clang::X86::BI__builtin_ia32_minph512: + case clang::X86::BI__builtin_ia32_maxph512: { + + APValue AVec, BVec; + if (!EvaluateAsRValue(Info, E->getArg(0), AVec) || + !EvaluateAsRValue(Info, E->getArg(1), BVec)) + return false; + + assert(AVec.isVector() && BVec.isVector()); + assert(AVec.getVectorLength() == BVec.getVectorLength()); + + bool IsMin; + switch (E->getBuiltinCallee()) { + case clang::X86::BI__builtin_ia32_minps: + case clang::X86::BI__builtin_ia32_minpd: + case clang::X86::BI__builtin_ia32_minps256: + case clang::X86::BI__builtin_ia32_minpd256: + case clang::X86::BI__builtin_ia32_minps512: + case clang::X86::BI__builtin_ia32_minpd512: + case clang::X86::BI__builtin_ia32_minph128: + case clang::X86::BI__builtin_ia32_minph256: + case clang::X86::BI__builtin_ia32_minph512: + IsMin = true; + break; + default: + IsMin = false; + } + const auto *DstVTy = E->getType()->castAs<VectorType>(); + unsigned NumDstElems = DstVTy->getNumElements(); + SmallVector<APValue, 16> ResultElems; + ResultElems.reserve(NumDstElems); + + for (unsigned EltIdx = 0; EltIdx != NumDstElems; ++EltIdx) { + const APFloat &EltA = AVec.getVectorElt(EltIdx).getFloat(); + const APFloat &EltB = BVec.getVectorElt(EltIdx).getFloat(); + if (EltA.isZero() && EltB.isZero()) { + ResultElems.push_back(BVec.getVectorElt(EltIdx)); + } else { + if (EltA.isNaN() || EltA.isInfinity() || EltA.isDenormal() || + EltB.isNaN() || EltB.isInfinity() || EltB.isDenormal()) + return false; + if (IsMin) + ResultElems.push_back(APValue(llvm::minimum(EltA, EltB))); + else + ResultElems.push_back(APValue(llvm::maximum(EltA, EltB))); + } + } + + return Success(APValue(ResultElems.data(), ResultElems.size()), E); + } + case clang::X86::BI__builtin_ia32_vcvtps2ph: case clang::X86::BI__builtin_ia32_vcvtps2ph256: { APValue SrcVec; diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h index 02282cbccf05d..649ac6faaa3fe 100644 --- a/clang/lib/Headers/avx512fintrin.h +++ b/clang/lib/Headers/avx512fintrin.h @@ -932,24 +932,21 @@ _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) { (__v8df)_mm512_max_round_pd((A), (B), (R)), \ (__v8df)_mm512_setzero_pd())) -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_max_pd(__m512d __A, __m512d __B) -{ +static __inline__ __m512d + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_pd(__m512d __A, __m512d __B) { return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_mask_max_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_max_pd(__A, __B), (__v8df)__W); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_maskz_max_pd(__mmask8 __U, __m512d __A, __m512d __B) { return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_max_pd(__A, __B), (__v8df)_mm512_setzero_pd()); @@ -969,31 +966,28 @@ _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) (__v16sf)_mm512_max_round_ps((A), (B), (R)), \ (__v16sf)_mm512_setzero_ps())) -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_max_ps(__m512 __A, __m512 __B) -{ +static __inline__ __m512 + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ps(__m512 __A, __m512 __B) { return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_mask_max_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_max_ps(__A, __B), (__v16sf)__W); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_maskz_max_ps(__mmask16 __U, __m512 __A, __m512 __B) { return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_max_ps(__A, __B), (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 -_mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_max_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, (__v4sf) __B, (__v4sf) __W, @@ -1001,8 +995,8 @@ _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 -_mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) { +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_max_ss(__mmask8 __U, __m128 __A, __m128 __B) { return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, (__v4sf) __B, (__v4sf) _mm_setzero_ps (), @@ -1028,8 +1022,8 @@ _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) { (__v4sf)_mm_setzero_ps(), \ (__mmask8)(U), (int)(R))) -static __inline__ __m128d __DEFAULT_FN_ATTRS128 -_mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_max_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, (__v2df) __B, (__v2df) __W, @@ -1037,8 +1031,8 @@ _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 -_mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) { +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_max_sd(__mmask8 __U, __m128d __A, __m128d __B) { return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, (__v2df) __B, (__v2df) _mm_setzero_pd (), @@ -1154,24 +1148,21 @@ _mm512_maskz_max_epu64(__mmask8 __M, __m512i __A, __m512i __B) { (__v8df)_mm512_min_round_pd((A), (B), (R)), \ (__v8df)_mm512_setzero_pd())) -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_min_pd(__m512d __A, __m512d __B) -{ +static __inline__ __m512d + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_pd(__m512d __A, __m512d __B) { return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_mask_min_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_min_pd(__A, __B), (__v8df)__W); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_maskz_min_pd(__mmask8 __U, __m512d __A, __m512d __B) { return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_min_pd(__A, __B), (__v8df)_mm512_setzero_pd()); @@ -1191,31 +1182,28 @@ _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) (__v16sf)_mm512_min_round_ps((A), (B), (R)), \ (__v16sf)_mm512_setzero_ps())) -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_min_ps(__m512 __A, __m512 __B) -{ +static __inline__ __m512 + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ps(__m512 __A, __m512 __B) { return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_mask_min_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_min_ps(__A, __B), (__v16sf)__W); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_maskz_min_ps(__mmask16 __U, __m512 __A, __m512 __B) { return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_min_ps(__A, __B), (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 -_mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_min_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, (__v4sf) __B, (__v4sf) __W, @@ -1223,8 +1211,8 @@ _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 -_mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) { +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_min_ss(__mmask8 __U, __m128 __A, __m128 __B) { return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, (__v4sf) __B, (__v4sf) _mm_setzero_ps (), @@ -1250,8 +1238,8 @@ _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) { (__v4sf)_mm_setzero_ps(), \ (__mmask8)(U), (int)(R))) -static __inline__ __m128d __DEFAULT_FN_ATTRS128 -_mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_min_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, (__v2df) __B, (__v2df) __W, @@ -1259,8 +1247,8 @@ _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 -_mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) { +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_min_sd(__mmask8 __U, __m128d __A, __m128d __B) { return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, (__v2df) __B, (__v2df) _mm_setzero_pd (), diff --git a/clang/lib/Headers/avx512fp16intrin.h b/clang/lib/Headers/avx512fp16intrin.h index 4c6bf3a3fa968..ddcaa10acf722 100644 --- a/clang/lib/Headers/avx512fp16intrin.h +++ b/clang/lib/Headers/avx512fp16intrin.h @@ -499,19 +499,19 @@ _mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) { (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \ (__v32hf)_mm512_setzero_ph())) -static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_min_ph(__m512h __A, - __m512h __B) { +static __inline__ __m512h + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ph(__m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_minph512((__v32hf)__A, (__v32hf)__B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512h __DEFAULT_FN_ATTRS512 +static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_selectph_512( (__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), (__v32hf)__W); } -static __inline__ __m512h __DEFAULT_FN_ATTRS512 +static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), @@ -532,19 +532,19 @@ _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) { (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \ (__v32hf)_mm512_setzero_ph())) -static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_max_ph(__m512h __A, - __m512h __B) { +static __inline__ __m512h + __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ph(__m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_maxph512((__v32hf)__A, (__v32hf)__B, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m512h __DEFAULT_FN_ATTRS512 +static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_selectph_512( (__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), (__v32hf)__W); } -static __inline__ __m512h __DEFAULT_FN_ATTRS512 +static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) { return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), @@ -720,17 +720,15 @@ _mm_maskz_div_sh(__mmask8 __U, __m128h __A, __m128h __B) { (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \ (__mmask8)(U), (int)(R))) -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_min_sh(__m128h __A, - __m128h __B) { +static __inline__ __m128h + __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_min_sh(__m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_minsh_round_mask( (__v8hf)__A, (__v8hf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)-1, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_min_sh(__m128h __W, - __mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_min_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_minsh_round_mask((__v8hf)__A, (__v8hf)__B, (__v8hf)__W, (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); @@ -759,25 +757,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_min_sh(__mmask8 __U, (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \ (__mmask8)(U), (int)(R))) -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_max_sh(__m128h __A, - __m128h __B) { +static __inline__ __m128h + __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_max_sh(__m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_maxsh_round_mask( (__v8hf)__A, (__v8hf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)-1, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_max_sh(__m128h __W, - __mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_max_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_maxsh_round_mask((__v8hf)__A, (__v8hf)__B, (__v8hf)__W, (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_max_sh(__mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_max_sh(__mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_maxsh_round_mask( (__v8hf)__A, (__v8hf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); diff --git a/clang/lib/Headers/avx512vlfp16intrin.h b/clang/lib/Headers/avx512vlfp16intrin.h index 7a762e105e9af..4f9c7cb79e000 100644 --- a/clang/lib/Headers/avx512vlfp16intrin.h +++ b/clang/lib/Headers/avx512vlfp16intrin.h @@ -249,12 +249,12 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_ph(__mmask8 __U, (__v8hf)_mm_setzero_ph()); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_min_ph(__m256h __A, - __m256h __B) { +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_min_ph(__m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, @@ -262,7 +262,7 @@ _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { (__v16hf)__W); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, @@ -270,34 +270,31 @@ _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) { (__v16hf)_mm256_setzero_ph()); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_min_ph(__m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_min_ph(__m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_min_ph(__m128h __W, - __mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_min_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), (__v8hf)__W); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_min_ph(__mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_min_ph(__mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), (__v8hf)_mm_setzero_ph()); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_max_ph(__m256h __A, - __m256h __B) { +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_max_ph(__m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, @@ -305,7 +302,7 @@ _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { (__v16hf)__W); } -static __inline__ __m256h __DEFAULT_FN_ATTRS256 +static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, @@ -313,23 +310,20 @@ _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) { (__v16hf)_mm256_setzero_ph()); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_max_ph(__m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_max_ph(__m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_max_ph(__m128h __W, - __mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_mask_max_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), (__v8hf)__W); } -static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_max_ph(__mmask8 __U, - __m128h __A, - __m128h __B) { +static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_maskz_max_ph(__mmask8 __U, __m128h __A, __m128h __B) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), (__v8hf)_mm_setzero_ph()); diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h index 6e2b19c8a2f7b..ea43046240cc0 100644 --- a/clang/lib/Headers/avx512vlintrin.h +++ b/clang/lib/Headers/avx512vlintrin.h @@ -2597,112 +2597,112 @@ _mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) { (__mmask8) __U); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)_mm_max_pd(__A, __B), (__v2df)__W); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) { return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)_mm_max_pd(__A, __B), (__v2df)_mm_setzero_pd()); } -static __inline__ __m256d __DEFAULT_FN_ATTRS256 +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)_mm256_max_pd(__A, __B), (__v4df)__W); } -static __inline__ __m256d __DEFAULT_FN_ATTRS256 +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) { return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)_mm256_max_pd(__A, __B), (__v4df)_mm256_setzero_pd()); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)_mm_max_ps(__A, __B), (__v4sf)__W); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) { return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)_mm_max_ps(__A, __B), (__v4sf)_mm_setzero_ps()); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)_mm256_max_ps(__A, __B), (__v8sf)__W); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) { return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)_mm256_max_ps(__A, __B), (__v8sf)_mm256_setzero_ps()); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)_mm_min_pd(__A, __B), (__v2df)__W); } -static __inline__ __m128d __DEFAULT_FN_ATTRS128 +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) { return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)_mm_min_pd(__A, __B), (__v2df)_mm_setzero_pd()); } -static __inline__ __m256d __DEFAULT_FN_ATTRS256 +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)_mm256_min_pd(__A, __B), (__v4df)__W); } -static __inline__ __m256d __DEFAULT_FN_ATTRS256 +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) { return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)_mm256_min_pd(__A, __B), (__v4df)_mm256_setzero_pd()); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)_mm_min_ps(__A, __B), (__v4sf)__W); } -static __inline__ __m128 __DEFAULT_FN_ATTRS128 +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) { return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)_mm_min_ps(__A, __B), (__v4sf)_mm_setzero_ps()); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)_mm256_min_ps(__A, __B), (__v8sf)__W); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) { return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)_mm256_min_ps(__A, __B), diff --git a/clang/lib/Headers/avxintrin.h b/clang/lib/Headers/avxintrin.h index 9b45bc3e56bdb..fbd20e58329a3 100644 --- a/clang/lib/Headers/avxintrin.h +++ b/clang/lib/Headers/avxintrin.h @@ -219,9 +219,8 @@ static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_div_ps(__m256 __a, /// A 256-bit vector of [4 x double] containing one of the operands. /// \returns A 256-bit vector of [4 x double] containing the maximum values /// between both operands. -static __inline __m256d __DEFAULT_FN_ATTRS -_mm256_max_pd(__m256d __a, __m256d __b) -{ +static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR +_mm256_max_pd(__m256d __a, __m256d __b) { return (__m256d)__builtin_ia32_maxpd256((__v4df)__a, (__v4df)__b); } @@ -240,9 +239,8 @@ _mm256_max_pd(__m256d __a, __m256d __b) /// A 256-bit vector of [8 x float] containing one of the operands. /// \returns A 256-bit vector of [8 x float] containing the maximum values /// between both operands. -static __inline __m256 __DEFAULT_FN_ATTRS -_mm256_max_ps(__m256 __a, __m256 __b) -{ +static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_max_ps(__m256 __a, + __m256 __b) { return (__m256)__builtin_ia32_maxps256((__v8sf)__a, (__v8sf)__b); } @@ -261,9 +259,8 @@ _mm256_max_ps(__m256 __a, __m256 __b) /// A 256-bit vector of [4 x double] containing one of the operands. /// \returns A 256-bit vector of [4 x double] containing the minimum values /// between both operands. -static __inline __m256d __DEFAULT_FN_ATTRS -_mm256_min_pd(__m256d __a, __m256d __b) -{ +static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR +_mm256_min_pd(__m256d __a, __m256d __b) { return (__m256d)__builtin_ia32_minpd256((__v4df)__a, (__v4df)__b); } @@ -282,9 +279,8 @@ _mm256_min_pd(__m256d __a, __m256d __b) /// A 256-bit vector of [8 x float] containing one of the operands. /// \returns A 256-bit vector of [8 x float] containing the minimum values /// between both operands. -static __inline __m256 __DEFAULT_FN_ATTRS -_mm256_min_ps(__m256 __a, __m256 __b) -{ +static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_min_ps(__m256 __a, + __m256 __b) { return (__m256)__builtin_ia32_minps256((__v8sf)__a, (__v8sf)__b); } diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h index 1ca7097cd170a..bbf366133c68a 100644 --- a/clang/lib/Headers/emmintrin.h +++ b/clang/lib/Headers/emmintrin.h @@ -279,8 +279,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) { /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the /// minimum value between both operands. The upper 64 bits are copied from /// the upper 64 bits of the first source operand. -static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a, - __m128d __b) { +static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_sd(__m128d __a, + __m128d __b) { return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b); } @@ -300,8 +300,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a, /// A 128-bit vector of [2 x double] containing one of the operands. /// \returns A 128-bit vector of [2 x double] containing the minimum values /// between both operands. -static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a, - __m128d __b) { +static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_pd(__m128d __a, + __m128d __b) { return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b); } @@ -325,8 +325,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a, /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the /// maximum value between both operands. The upper 64 bits are copied from /// the upper 64 bits of the first source operand. -static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a, - __m128d __b) { +static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_sd(__m128d __a, + __m128d __b) { return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b); } @@ -346,8 +346,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a, /// A 128-bit vector of [2 x double] containing one of the operands. /// \returns A 128-bit vector of [2 x double] containing the maximum values /// between both operands. -static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a, - __m128d __b) { +static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_pd(__m128d __a, + __m128d __b) { return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b); } diff --git a/clang/lib/Headers/xmmintrin.h b/clang/lib/Headers/xmmintrin.h index 72a643948bed6..efc0e6ce47e7d 100644 --- a/clang/lib/Headers/xmmintrin.h +++ b/clang/lib/Headers/xmmintrin.h @@ -341,9 +341,8 @@ _mm_rsqrt_ps(__m128 __a) /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the /// minimum value between both operands. The upper 96 bits are copied from /// the upper 96 bits of the first source operand. -static __inline__ __m128 __DEFAULT_FN_ATTRS -_mm_min_ss(__m128 __a, __m128 __b) -{ +static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_ss(__m128 __a, + __m128 __b) { return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b); } @@ -362,9 +361,8 @@ _mm_min_ss(__m128 __a, __m128 __b) /// A 128-bit vector of [4 x float] containing one of the operands. /// \returns A 128-bit vector of [4 x float] containing the minimum values /// between both operands. -static __inline__ __m128 __DEFAULT_FN_ATTRS -_mm_min_ps(__m128 __a, __m128 __b) -{ +static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_ps(__m128 __a, + __m128 __b) { return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b); } @@ -387,9 +385,8 @@ _mm_min_ps(__m128 __a, __m128 __b) /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the /// maximum value between both operands. The upper 96 bits are copied from /// the upper 96 bits of the first source operand. -static __inline__ __m128 __DEFAULT_FN_ATTRS -_mm_max_ss(__m128 __a, __m128 __b) -{ +static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_ss(__m128 __a, + __m128 __b) { return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b); } @@ -408,9 +405,8 @@ _mm_max_ss(__m128 __a, __m128 __b) /// A 128-bit vector of [4 x float] containing one of the operands. /// \returns A 128-bit vector of [4 x float] containing the maximum values /// between both operands. -static __inline__ __m128 __DEFAULT_FN_ATTRS -_mm_max_ps(__m128 __a, __m128 __b) -{ +static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_ps(__m128 __a, + __m128 __b) { return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b); } diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c index 13da4292c5b92..cd32e444ea054 100644 --- a/clang/test/CodeGen/X86/avx-builtins.c +++ b/clang/test/CodeGen/X86/avx-builtins.c @@ -1313,24 +1313,34 @@ __m256d test_mm256_max_pd(__m256d A, __m256d B) { // CHECK: call {{.*}}<4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_max_pd(A, B); } +TEST_CONSTEXPR(match_m256d(_mm256_max_pd((__m256d){+1.0, +2.0, +3.0, +4.0}, (__m256d){+4.0, +3.0, +2.0, +1.0}), +4.0, +3.0, +3.0, +4.0)); +TEST_CONSTEXPR(match_m256d(_mm256_max_pd((__m256d){+0.0, -0.0, +0.0, -0.0}, (__m256d){-0.0, +0.0, -0.0, +0.0}), -0.0, +0.0, -0.0, +0.0)); +TEST_CONSTEXPR(match_m256d(_mm256_max_pd((__m256d){-1.0, -2.0, +3.0, -4.0}, (__m256d){+1.0, -3.0, +2.0, -5.0}), +1.0, -2.0, +3.0, -4.0)); __m256 test_mm256_max_ps(__m256 A, __m256 B) { // CHECK-LABEL: test_mm256_max_ps // CHECK: call {{.*}}<8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_max_ps(A, B); } +TEST_CONSTEXPR(match_m256(_mm256_max_ps((__m256){+1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}, (__m256){+8.0f, +7.0f, +6.0f, +5.0f, +4.0f, +3.0f, +2.0f, +1.0f}), +8.0f, +7.0f, +6.0f, +5.0f, +5.0f, +6.0f, +7.0f, +8.0f)); +TEST_CONSTEXPR(match_m256(_mm256_max_ps((__m256){+0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f}, (__m256){-0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f)); __m256d test_mm256_min_pd(__m256d A, __m256d B) { // CHECK-LABEL: test_mm256_min_pd // CHECK: call {{.*}}<4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_min_pd(A, B); } +TEST_CONSTEXPR(match_m256d(_mm256_min_pd((__m256d){+1.0, +2.0, +3.0, +4.0}, (__m256d){+4.0, +3.0, +2.0, +1.0}), +1.0, +2.0, +2.0, +1.0)); +TEST_CONSTEXPR(match_m256d(_mm256_min_pd((__m256d){+0.0, -0.0, +0.0, -0.0}, (__m256d){-0.0, +0.0, -0.0, +0.0}), -0.0, +0.0, -0.0, +0.0)); +TEST_CONSTEXPR(match_m256d(_mm256_min_pd((__m256d){-1.0, -2.0, +3.0, -4.0}, (__m256d){+1.0, -3.0, +2.0, -5.0}), -1.0, -3.0, +2.0, -5.0)); __m256 test_mm256_min_ps(__m256 A, __m256 B) { // CHECK-LABEL: test_mm256_min_ps // CHECK: call {{.*}}<8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_min_ps(A, B); } +TEST_CONSTEXPR(match_m256(_mm256_min_ps((__m256){+1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}, (__m256){+8.0f, +7.0f, +6.0f, +5.0f, +4.0f, +3.0f, +2.0f, +1.0f}), +1.0f, +2.0f, +3.0f, +4.0f, +4.0f, +3.0f, +2.0f, +1.0f)); +TEST_CONSTEXPR(match_m256(_mm256_min_ps((__m256){+0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f}, (__m256){-0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f)); __m256d test_mm256_movedup_pd(__m256d A) { // CHECK-LABEL: test_mm256_movedup_pd diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index ab047a8ecd55e..c111b849c9699 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -10840,6 +10840,7 @@ __m512d test_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} return _mm512_mask_max_pd (__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m512d(_mm512_mask_max_pd((__m512d){100.0, 100.0, 100.0, 100.0, 100.0, 100.0, 100.0, 100.0}, 0xF0, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 100.0, 100.0, 100.0, 100.0, 5.0, 6.0, 7.0, 8.0)); __m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) { @@ -10848,6 +10849,7 @@ __m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} return _mm512_maskz_max_pd (__U,__A,__B); } +TEST_CONSTEXPR(match_m512d(_mm512_maskz_max_pd(0xF0, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 0.0, 0.0, 0.0, 0.0, 5.0, 6.0, 7.0, 8.0)); __m512 test_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { @@ -10856,6 +10858,7 @@ __m512 test_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} return _mm512_mask_max_ps (__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m512(_mm512_mask_max_ps((__m512){100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f}, 0xFF00, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f)); __m512d test_mm512_mask_max_round_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B) { @@ -10887,6 +10890,7 @@ __m512 test_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} return _mm512_maskz_max_ps (__U,__A,__B); } +TEST_CONSTEXPR(match_m512(_mm512_maskz_max_ps(0xFF00, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f)); __m512 test_mm512_mask_max_round_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B) { @@ -10918,6 +10922,7 @@ __m512d test_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} return _mm512_mask_min_pd (__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m512d(_mm512_mask_min_pd((__m512d){100.0, 100.0, 100.0, 100.0, 100.0, 100.0, 100.0, 100.0}, 0xF0, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 100.0, 100.0, 100.0, 100.0, 4.0, 3.0, 2.0, 1.0)); __m512d test_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) { @@ -10925,6 +10930,7 @@ __m512d test_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) // CHECK: @llvm.x86.avx512.min.pd.512 return _mm512_maskz_min_pd (__U,__A,__B); } +TEST_CONSTEXPR(match_m512d(_mm512_maskz_min_pd(0xF0, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 0.0, 0.0, 0.0, 0.0, 4.0, 3.0, 2.0, 1.0)); __m512d test_mm512_mask_min_round_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B) { @@ -10956,6 +10962,7 @@ __m512 test_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} return _mm512_mask_min_ps (__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m512(_mm512_mask_min_ps((__m512){100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f}, 0xFF00, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 100.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f)); __m512 test_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) { @@ -10964,6 +10971,7 @@ __m512 test_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} return _mm512_maskz_min_ps (__U,__A,__B); } +TEST_CONSTEXPR(match_m512(_mm512_maskz_min_ps(0xFF00, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f)); __m512 test_mm512_mask_min_round_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B) { @@ -10988,6 +10996,15 @@ __m512 test_mm512_min_round_ps(__m512 __A,__m512 __B) return _mm512_min_round_ps(__A,__B,_MM_FROUND_NO_EXC); } +TEST_CONSTEXPR(match_m512(_mm512_min_ps((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f)); +TEST_CONSTEXPR(match_m512d(_mm512_min_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 1.0, 2.0, 3.0, 4.0, 4.0, 3.0, 2.0, 1.0)); +TEST_CONSTEXPR(match_m512(_mm512_max_ps((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}), 16.0f, 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f)); +TEST_CONSTEXPR(match_m512d(_mm512_max_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0}), 8.0, 7.0, 6.0, 5.0, 5.0, 6.0, 7.0, 8.0)); +TEST_CONSTEXPR(match_m512(_mm512_min_ps((__m512){+0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f}, (__m512){-0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f)); +TEST_CONSTEXPR(match_m512d(_mm512_min_pd((__m512d){+0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0}, (__m512d){-0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0}), -0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0)); +TEST_CONSTEXPR(match_m512(_mm512_max_ps((__m512){+0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f}, (__m512){-0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f, -0.0f, +0.0f)); +TEST_CONSTEXPR(match_m512d(_mm512_max_pd((__m512d){+0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0}, (__m512d){-0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0}), -0.0, +0.0, -0.0, +0.0, -0.0, +0.0, -0.0, +0.0)); + __m512 test_mm512_mask_floor_ps (__m512 __W, __mmask16 __U, __m512 __A) { // CHECK-LABEL: test_mm512_mask_floor_ps diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c index 013c19ba7a929..cccd67927a286 100644 --- a/clang/test/CodeGen/X86/avx512vl-builtins.c +++ b/clang/test/CodeGen/X86/avx512vl-builtins.c @@ -4633,98 +4633,114 @@ __m128d test_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) // CHECK-LABEL: test_mm_mask_max_pd // CHECK: @llvm.x86.sse2.max.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} - return _mm_mask_max_pd(__W,__U,__A,__B); + return _mm_mask_max_pd(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m128d(_mm_mask_max_pd((__m128d){9.0, 9.0}, (__mmask8)0b01, (__m128d){1.0, 4.0}, (__m128d){2.0, 3.0}), 2.0, 9.0)); __m128d test_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) { // CHECK-LABEL: test_mm_maskz_max_pd // CHECK: @llvm.x86.sse2.max.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} - return _mm_maskz_max_pd(__U,__A,__B); + return _mm_maskz_max_pd(__U,__A,__B); } +TEST_CONSTEXPR(match_m128d(_mm_maskz_max_pd((__mmask8)0b01, (__m128d){1.0, 4.0}, (__m128d){2.0, 3.0}), 2.0, 0.0)); __m256d test_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { // CHECK-LABEL: test_mm256_mask_max_pd // CHECK: @llvm.x86.avx.max.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} - return _mm256_mask_max_pd(__W,__U,__A,__B); + return _mm256_mask_max_pd(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m256d(_mm256_mask_max_pd((__m256d){9.0, 9.0, 9.0, 9.0}, (__mmask8)0b0101, (__m256d){1.0, 4.0, 2.0, 5.0}, (__m256d){2.0, 3.0, 3.0, 4.0}), 2.0, 9.0, 3.0, 9.0)); __m256d test_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) { // CHECK-LABEL: test_mm256_maskz_max_pd // CHECK: @llvm.x86.avx.max.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} - return _mm256_maskz_max_pd(__U,__A,__B); + return _mm256_maskz_max_pd(__U,__A,__B); } +TEST_CONSTEXPR(match_m256d(_mm256_maskz_max_pd((__mmask8)0b0101, (__m256d){1.0, 4.0, 2.0, 5.0}, (__m256d){2.0, 3.0, 3.0, 4.0}), 2.0, 0.0, 3.0, 0.0)); __m128 test_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { // CHECK-LABEL: test_mm_mask_max_ps // CHECK: @llvm.x86.sse.max.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} - return _mm_mask_max_ps(__W,__U,__A,__B); + return _mm_mask_max_ps(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m128(_mm_mask_max_ps((__m128){9.0f, 9.0f, 9.0f, 9.0f}, (__mmask8)0b0101, (__m128){1.0f, 4.0f, 2.0f, 5.0f}, (__m128){2.0f, 3.0f, 3.0f, 4.0f}), 2.0f, 9.0f, 3.0f, 9.0f)); __m128 test_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) { // CHECK-LABEL: test_mm_maskz_max_ps // CHECK: @llvm.x86.sse.max.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} - return _mm_maskz_max_ps(__U,__A,__B); + return _mm_maskz_max_ps(__U,__A,__B); } +TEST_CONSTEXPR(match_m128(_mm_maskz_max_ps((__mmask8)0b0101, (__m128){1.0f, 4.0f, 2.0f, 5.0f}, (__m128){2.0f, 3.0f, 3.0f, 4.0f}), 2.0f, 0.0f, 3.0f, 0.0f)); __m256 test_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { // CHECK-LABEL: test_mm256_mask_max_ps // CHECK: @llvm.x86.avx.max.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} - return _mm256_mask_max_ps(__W,__U,__A,__B); + return _mm256_mask_max_ps(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m256(_mm256_mask_max_ps((__m256){9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f}, (__mmask8)0b01010101, (__m256){1.0f, 4.0f, 2.0f, 5.0f, 1.0f, 4.0f, 2.0f, 5.0f}, (__m256){2.0f, 3.0f, 3.0f, 4.0f, 2.0f, 3.0f, 3.0f, 4.0f}), 2.0f, 9.0f, 3.0f, 9.0f, 2.0f, 9.0f, 3.0f, 9.0f)); __m256 test_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) { // CHECK-LABEL: test_mm256_maskz_max_ps // CHECK: @llvm.x86.avx.max.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} - return _mm256_maskz_max_ps(__U,__A,__B); + return _mm256_maskz_max_ps(__U,__A,__B); } +TEST_CONSTEXPR(match_m256(_mm256_maskz_max_ps((__mmask8)0b01010101, (__m256){1.0f, 4.0f, 2.0f, 5.0f, 1.0f, 4.0f, 2.0f, 5.0f}, (__m256){2.0f, 3.0f, 3.0f, 4.0f, 2.0f, 3.0f, 3.0f, 4.0f}), 2.0f, 0.0f, 3.0f, 0.0f, 2.0f, 0.0f, 3.0f, 0.0f)); __m128d test_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { // CHECK-LABEL: test_mm_mask_min_pd // CHECK: @llvm.x86.sse2.min.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} - return _mm_mask_min_pd(__W,__U,__A,__B); + return _mm_mask_min_pd(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m128d(_mm_mask_min_pd((__m128d){9.0, 9.0}, (__mmask8)0b01, (__m128d){1.0, 4.0}, (__m128d){2.0, 3.0}), 1.0, 9.0)); __m128d test_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) { // CHECK-LABEL: test_mm_maskz_min_pd // CHECK: @llvm.x86.sse2.min.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} - return _mm_maskz_min_pd(__U,__A,__B); + return _mm_maskz_min_pd(__U,__A,__B); } +TEST_CONSTEXPR(match_m128d(_mm_maskz_min_pd((__mmask8)0b01, (__m128d){1.0, 4.0}, (__m128d){2.0, 3.0}), 1.0, 0.0)); __m256d test_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { // CHECK-LABEL: test_mm256_mask_min_pd // CHECK: @llvm.x86.avx.min.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} - return _mm256_mask_min_pd(__W,__U,__A,__B); + return _mm256_mask_min_pd(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m256d(_mm256_mask_min_pd((__m256d){9.0, 9.0, 9.0, 9.0}, (__mmask8)0b0101, (__m256d){1.0, 4.0, 2.0, 5.0}, (__m256d){2.0, 3.0, 3.0, 4.0}), 1.0, 9.0, 2.0, 9.0)); __m256d test_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) { // CHECK-LABEL: test_mm256_maskz_min_pd // CHECK: @llvm.x86.avx.min.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} - return _mm256_maskz_min_pd(__U,__A,__B); + return _mm256_maskz_min_pd(__U,__A,__B); } +TEST_CONSTEXPR(match_m256d(_mm256_maskz_min_pd((__mmask8)0b0101, (__m256d){1.0, 4.0, 2.0, 5.0}, (__m256d){2.0, 3.0, 3.0, 4.0}), 1.0, 0.0, 2.0, 0.0)); __m128 test_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { // CHECK-LABEL: test_mm_mask_min_ps // CHECK: @llvm.x86.sse.min.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} - return _mm_mask_min_ps(__W,__U,__A,__B); + return _mm_mask_min_ps(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m128(_mm_mask_min_ps((__m128){9.0f, 9.0f, 9.0f, 9.0f}, (__mmask8)0b0101, (__m128){1.0f, 4.0f, 2.0f, 5.0f}, (__m128){2.0f, 3.0f, 3.0f, 4.0f}), 1.0f, 9.0f, 2.0f, 9.0f)); __m128 test_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) { // CHECK-LABEL: test_mm_maskz_min_ps // CHECK: @llvm.x86.sse.min.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} - return _mm_maskz_min_ps(__U,__A,__B); + return _mm_maskz_min_ps(__U,__A,__B); } +TEST_CONSTEXPR(match_m128(_mm_maskz_min_ps((__mmask8)0b0101, (__m128){1.0f, 4.0f, 2.0f, 5.0f}, (__m128){2.0f, 3.0f, 3.0f, 4.0f}), 1.0f, 0.0f, 2.0f, 0.0f)); __m256 test_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { // CHECK-LABEL: test_mm256_mask_min_ps // CHECK: @llvm.x86.avx.min.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} - return _mm256_mask_min_ps(__W,__U,__A,__B); + return _mm256_mask_min_ps(__W,__U,__A,__B); } +TEST_CONSTEXPR(match_m256(_mm256_mask_min_ps((__m256){9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f, 9.0f}, (__mmask8)0b01010101, (__m256){1.0f, 4.0f, 2.0f, 5.0f, 1.0f, 4.0f, 2.0f, 5.0f}, (__m256){2.0f, 3.0f, 3.0f, 4.0f, 2.0f, 3.0f, 3.0f, 4.0f}), 1.0f, 9.0f, 2.0f, 9.0f, 1.0f, 9.0f, 2.0f, 9.0f)); __m256 test_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) { // CHECK-LABEL: test_mm256_maskz_min_ps // CHECK: @llvm.x86.avx.min.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} - return _mm256_maskz_min_ps(__U,__A,__B); + return _mm256_maskz_min_ps(__U,__A,__B); } +TEST_CONSTEXPR(match_m256(_mm256_maskz_min_ps((__mmask8)0b01010101, (__m256){1.0f, 4.0f, 2.0f, 5.0f, 1.0f, 4.0f, 2.0f, 5.0f}, (__m256){2.0f, 3.0f, 3.0f, 4.0f, 2.0f, 3.0f, 3.0f, 4.0f}), 1.0f, 0.0f, 2.0f, 0.0f, 1.0f, 0.0f, 2.0f, 0.0f)); __m128d test_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { // CHECK-LABEL: test_mm_mask_mul_pd // CHECK: fmul <2 x double> %{{.*}}, %{{.*}} diff --git a/clang/test/CodeGen/X86/sse-builtins.c b/clang/test/CodeGen/X86/sse-builtins.c index fd4775739fad8..edd9f00bae2b2 100644 --- a/clang/test/CodeGen/X86/sse-builtins.c +++ b/clang/test/CodeGen/X86/sse-builtins.c @@ -515,6 +515,9 @@ __m128 test_mm_max_ps(__m128 A, __m128 B) { // CHECK: @llvm.x86.sse.max.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_max_ps(A, B); } +TEST_CONSTEXPR(match_m128(_mm_max_ps((__m128){+1.0f, +2.0f, +3.0f, +4.0f}, (__m128){+4.0f, +3.0f, +2.0f, +1.0f}), +4.0f, +3.0f, +3.0f, +4.0f)); +TEST_CONSTEXPR(match_m128(_mm_max_ps((__m128){+0.0f, -0.0f, +0.0f, -0.0f}, (__m128){-0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f)); +TEST_CONSTEXPR(match_m128(_mm_max_ps((__m128){-1.0f, -2.0f, +3.0f, -4.0f}, (__m128){+1.0f, -3.0f, +2.0f, -5.0f}), +1.0f, -2.0f, +3.0f, -4.0f)); __m128 test_mm_max_ss(__m128 A, __m128 B) { // CHECK-LABEL: test_mm_max_ss @@ -527,6 +530,9 @@ __m128 test_mm_min_ps(__m128 A, __m128 B) { // CHECK: @llvm.x86.sse.min.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_min_ps(A, B); } +TEST_CONSTEXPR(match_m128(_mm_min_ps((__m128){+1.0f, +2.0f, +3.0f, +4.0f}, (__m128){+4.0f, +3.0f, +2.0f, +1.0f}), +1.0f, +2.0f, +2.0f, +1.0f)); +TEST_CONSTEXPR(match_m128(_mm_min_ps((__m128){+0.0f, -0.0f, +0.0f, -0.0f}, (__m128){-0.0f, +0.0f, -0.0f, +0.0f}), -0.0f, +0.0f, -0.0f, +0.0f)); +TEST_CONSTEXPR(match_m128(_mm_min_ps((__m128){-1.0f, -2.0f, +3.0f, -4.0f}, (__m128){+1.0f, -3.0f, +2.0f, -5.0f}), -1.0f, -3.0f, +2.0f, -5.0f)); __m128 test_mm_min_ss(__m128 A, __m128 B) { // CHECK-LABEL: test_mm_min_ss diff --git a/clang/test/CodeGen/X86/sse2-builtins.c b/clang/test/CodeGen/X86/sse2-builtins.c index c4975b456ba22..ab0a857b926f3 100644 --- a/clang/test/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CodeGen/X86/sse2-builtins.c @@ -885,6 +885,9 @@ __m128d test_mm_max_pd(__m128d A, __m128d B) { // CHECK: call {{.*}}<2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_max_pd(A, B); } +TEST_CONSTEXPR(match_m128d(_mm_max_pd((__m128d){+1.0, +2.0}, (__m128d){+4.0, +1.0}), +4.0, +2.0)); +TEST_CONSTEXPR(match_m128d(_mm_max_pd((__m128d){+0.0, -0.0}, (__m128d){-0.0, +0.0}), -0.0, +0.0)); +TEST_CONSTEXPR(match_m128d(_mm_max_pd((__m128d){-1.0, +3.0}, (__m128d){+1.0, +2.0}), +1.0, +3.0)); __m128d test_mm_max_sd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_max_sd @@ -919,6 +922,9 @@ __m128d test_mm_min_pd(__m128d A, __m128d B) { // CHECK: call {{.*}}<2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_min_pd(A, B); } +TEST_CONSTEXPR(match_m128d(_mm_min_pd((__m128d){+1.0, +2.0}, (__m128d){+4.0, +1.0}), +1.0, +1.0)); +TEST_CONSTEXPR(match_m128d(_mm_min_pd((__m128d){+0.0, -0.0}, (__m128d){-0.0, +0.0}), -0.0, +0.0)); +TEST_CONSTEXPR(match_m128d(_mm_min_pd((__m128d){-1.0, +3.0}, (__m128d){+1.0, +2.0}), -1.0, +2.0)); __m128d test_mm_min_sd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_min_sd >From a4e6203e878e99f07b5d188200038baaa01f10fe Mon Sep 17 00:00:00 2001 From: NagaChaitanya Vellanki <[email protected]> Date: Mon, 15 Dec 2025 08:21:58 -0800 Subject: [PATCH 2/3] Remove braces around if --- clang/lib/AST/ByteCode/InterpBuiltin.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index cb22356bd33aa..8ac214641c560 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -2452,9 +2452,9 @@ static bool interp__builtin_elementwise_fp_binop( Call->getArg(1)->getType()->castAs<VectorType>()->getNumElements()); std::optional<APSInt> RoundingMode = std::nullopt; - if (Call->getNumArgs() == 3) { + if (Call->getNumArgs() == 3) RoundingMode = popToAPSInt(S, Call->getArg(2)); - } + const Pointer &BPtr = S.Stk.pop<Pointer>(); const Pointer &APtr = S.Stk.pop<Pointer>(); const Pointer &Dst = S.Stk.peek<Pointer>(); >From 018a9f7ea0d6b407c05d7882f3c92d4a2971a6ee Mon Sep 17 00:00:00 2001 From: NagaChaitanya Vellanki <[email protected]> Date: Mon, 15 Dec 2025 08:49:48 -0800 Subject: [PATCH 3/3] undo specialization of 512 bitwidth cases --- clang/lib/AST/ByteCode/InterpBuiltin.cpp | 36 ++++++------------------ 1 file changed, 8 insertions(+), 28 deletions(-) diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index 8ac214641c560..c5d6e52ac02aa 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -5681,10 +5681,13 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, case clang::X86::BI__builtin_ia32_minps: case clang::X86::BI__builtin_ia32_minpd: - case clang::X86::BI__builtin_ia32_minps256: - case clang::X86::BI__builtin_ia32_minpd256: case clang::X86::BI__builtin_ia32_minph128: case clang::X86::BI__builtin_ia32_minph256: + case clang::X86::BI__builtin_ia32_minps256: + case clang::X86::BI__builtin_ia32_minpd256: + case clang::X86::BI__builtin_ia32_minps512: + case clang::X86::BI__builtin_ia32_minpd512: + case clang::X86::BI__builtin_ia32_minph512: return interp__builtin_elementwise_fp_binop( S, OpPC, Call, [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { @@ -5696,35 +5699,13 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, case clang::X86::BI__builtin_ia32_maxps: case clang::X86::BI__builtin_ia32_maxpd: - case clang::X86::BI__builtin_ia32_maxps256: - case clang::X86::BI__builtin_ia32_maxpd256: case clang::X86::BI__builtin_ia32_maxph128: case clang::X86::BI__builtin_ia32_maxph256: - return interp__builtin_elementwise_fp_binop( - S, OpPC, Call, - [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { - if (A.isZero() && B.isZero()) - return B; - else - return llvm::maximum(A, B); - }); - - case clang::X86::BI__builtin_ia32_minps512: - case clang::X86::BI__builtin_ia32_minpd512: - case clang::X86::BI__builtin_ia32_minph512: { - return interp__builtin_elementwise_fp_binop( - S, OpPC, Call, - [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { - if (A.isZero() && B.isZero()) - return B; - else - return llvm::minimum(A, B); - }); - } - + case clang::X86::BI__builtin_ia32_maxps256: + case clang::X86::BI__builtin_ia32_maxpd256: case clang::X86::BI__builtin_ia32_maxps512: case clang::X86::BI__builtin_ia32_maxpd512: - case clang::X86::BI__builtin_ia32_maxph512: { + case clang::X86::BI__builtin_ia32_maxph512: return interp__builtin_elementwise_fp_binop( S, OpPC, Call, [](const APFloat &A, const APFloat &B, std::optional<APSInt>) { @@ -5733,7 +5714,6 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, else return llvm::maximum(A, B); }); - } default: S.FFDiag(S.Current->getLocation(OpPC), _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
