https://github.com/AmrDeveloper updated https://github.com/llvm/llvm-project/pull/171710
>From f400cd5aca3c47d48e161249a28045678d971150 Mon Sep 17 00:00:00 2001 From: Amr Hesham <[email protected]> Date: Wed, 10 Dec 2025 22:29:44 +0100 Subject: [PATCH] [CIR] Add support for the ArrayTypeTraitExpr --- clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 6 +++--- clang/test/CIR/CodeGen/cxx-traits.cpp | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp index 9b9cacc9eaa53..95d8a10a6cd08 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp @@ -855,9 +855,9 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { return builder.getBool(e->isSatisfied(), cgf.getLoc(e->getExprLoc())); } mlir::Value VisitArrayTypeTraitExpr(const ArrayTypeTraitExpr *e) { - cgf.cgm.errorNYI(e->getSourceRange(), - "ScalarExprEmitter: array type trait"); - return {}; + mlir::Type type = cgf.convertType(e->getType()); + mlir::Location loc = cgf.getLoc(e->getExprLoc()); + return builder.getConstInt(loc, type, e->getValue()); } mlir::Value VisitExpressionTraitExpr(const ExpressionTraitExpr *e) { return builder.getBool(e->getValue(), cgf.getLoc(e->getExprLoc())); diff --git a/clang/test/CIR/CodeGen/cxx-traits.cpp b/clang/test/CIR/CodeGen/cxx-traits.cpp index ddbdfaeccae2c..953e79b07ab3e 100644 --- a/clang/test/CIR/CodeGen/cxx-traits.cpp +++ b/clang/test/CIR/CodeGen/cxx-traits.cpp @@ -57,3 +57,25 @@ void type_trait_expr() { // OGCG: store i8 0, ptr %[[B_ADDR]], align 1 // OGCG: store i8 0, ptr %[[C_ADDR]], align 1 // OGCG: store i8 0, ptr %[[D_ADDR]], align 1 + +void array_type_trait_expr() { + unsigned long a = __array_rank(int[10][20]); + unsigned long b = __array_extent(int[10][20], 1); +} + +// CIR: %[[A_ADDR:.*]] = cir.alloca !u64i, !cir.ptr<!u64i>, ["a", init] +// CIR: %[[B_ADDR:.*]] = cir.alloca !u64i, !cir.ptr<!u64i>, ["b", init] +// CIR: %[[CONST_2:.*]] = cir.const #cir.int<2> : !u64i +// CIR: cir.store {{.*}} %[[CONST_2]], %[[A_ADDR]] : !u64i, !cir.ptr<!u64i> +// CIR: %[[CONST_20:.*]] = cir.const #cir.int<20> : !u64i +// CIR: cir.store {{.*}} %[[CONST_20]], %[[B_ADDR]] : !u64i, !cir.ptr<!u64i> + +// LLVM: %[[A_ADDR:.*]] = alloca i64, i64 1, align 8 +// LLVM: %[[B_ADDR:.*]] = alloca i64, i64 1, align 8 +// LLVM: store i64 2, ptr %[[A_ADDR]], align 8 +// LLVM: store i64 20, ptr %[[B_ADDR]], align 8 + +// OGCG: %[[A_ADDR:.*]] = alloca i64, align 8 +// OGCG: %[[B_ADDR:.*]] = alloca i64, align 8 +// OGCG: store i64 2, ptr %[[A_ADDR]], align 8 +// OGCG: store i64 20, ptr %[[B_ADDR]], align 8 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
