https://github.com/Priyanshu3820 updated https://github.com/llvm/llvm-project/pull/171615
>From 286dba2d5a5ca74c84c4e221192bf51cc6a731a3 Mon Sep 17 00:00:00 2001 From: Priyanshu Kumar <[email protected]> Date: Fri, 12 Dec 2025 10:57:40 +0000 Subject: [PATCH] Resolve conflict --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 57 ++++++++++- .../X86/avx512vlbf16-builtins.c | 98 +++++++++++++++++++ 2 files changed, 154 insertions(+), 1 deletion(-) create mode 100644 clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 75bf25b20f1af..bd5a188fe9453 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -20,6 +20,7 @@ #include "clang/Basic/TargetBuiltins.h" #include "clang/CIR/Dialect/IR/CIRTypes.h" #include "clang/CIR/MissingFeatures.h" +#include "llvm/Support/Casting.h" #include "llvm/Support/ErrorHandling.h" using namespace clang; @@ -362,6 +363,24 @@ static mlir::Value emitX86Muldq(CIRGenBuilderTy &builder, mlir::Location loc, return builder.createMul(loc, lhs, rhs); } +static mlir::Value +emitCIRX86CvtF16ToFloatExpr(CIRGenBuilderTy &builder, mlir::Location loc, + mlir::Type dstTy, + SmallVectorImpl<mlir::Value> &ops) { + auto src = ops[0]; + auto passthru = ops[1]; + auto mask = ops[2]; + + auto vecType = llvm::cast<mlir::VectorType>(src.getType()); + auto numElts = vecType.getNumElements(); + auto halfTy = mlir::VectorType::get({numElts}, builder.getF16Type()); + auto srcF16 = builder.createBitcast(loc, src, halfTy); + + auto res = builder.createFloatingCast(srcF16, dstTy); + + return emitX86Select(builder, loc, mask, res, passthru); +} + static mlir::Value emitX86vpcom(CIRGenBuilderTy &builder, mlir::Location loc, llvm::SmallVector<mlir::Value> ops, bool isSigned) { @@ -1667,7 +1686,43 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, case X86::BI__builtin_ia32_vcvtph2ps512_mask: case X86::BI__builtin_ia32_cvtneps2bf16_128_mask: case X86::BI__builtin_ia32_cvtneps2bf16_256_mask: - case X86::BI__builtin_ia32_cvtneps2bf16_512_mask: + case X86::BI__builtin_ia32_cvtneps2bf16_512_mask: { + mlir::Location loc = getLoc(expr->getExprLoc()); + llvm::StringRef intrinsicName; + switch (builtinID) { + case X86::BI__builtin_ia32_vcvtph2ps_mask: { + return emitCIRX86CvtF16ToFloatExpr(builder, loc, + convertType(expr->getType()), ops); + } + case X86::BI__builtin_ia32_vcvtph2ps256_mask: { + return emitCIRX86CvtF16ToFloatExpr(builder, loc, + convertType(expr->getType()), ops); + } + case X86::BI__builtin_ia32_vcvtph2ps512_mask: { + return emitCIRX86CvtF16ToFloatExpr(builder, loc, + convertType(expr->getType()), ops); + } + case X86::BI__builtin_ia32_cvtneps2bf16_128_mask: + intrinsicName = "x86.avx512bf16.mask.cvtneps2bf16.128"; + break; + case X86::BI__builtin_ia32_cvtneps2bf16_256_mask: { + intrinsicName = "x86.avx512bf16.cvtneps2bf16.256"; + auto intrinsicResult = emitIntrinsicCallOp( + builder, loc, intrinsicName, convertType(expr->getType()), ops); + return emitX86Select(builder, loc, ops[2], intrinsicResult, ops[1]); + } + case X86::BI__builtin_ia32_cvtneps2bf16_512_mask: { + intrinsicName = "x86.avx512bf16.cvtneps2bf16.512"; + auto intrinsicResult = emitIntrinsicCallOp( + builder, loc, intrinsicName, convertType(expr->getType()), ops); + return emitX86Select(builder, loc, ops[2], intrinsicResult, ops[1]); + } + default: + llvm_unreachable("Unexpected builtinID"); + } + return emitIntrinsicCallOp(builder, loc, intrinsicName, + convertType(expr->getType()), ops); + } case X86::BI__cpuid: case X86::BI__cpuidex: case X86::BI__emul: diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c b/clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c new file mode 100644 index 0000000000000..fee7d6ac8c9f5 --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c @@ -0,0 +1,98 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -fclangir -emit-cir %s -o - | FileCheck %s --check-prefix=CIR +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -emit-llvm %s -o - | FileCheck %s --check-prefix=LLVM +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -emit-llvm %s -o - | FileCheck %s --check-prefix=OGCG + +// REQUIRES: avx512fp16 +// REQUIRES: avx512bf16 + +#include <immintrin.h> + +// CIR-LABEL: test_mm512_mask_cvtneps_pbh +// CIR: cir.call @_mm512_mask_cvtneps_pbh({{.*}}, {{.*}}, {{.*}}) +// LLVM-LABEL: test_mm512_mask_cvtneps_pbh +// LLVM: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +// OGCG-LABEL: test_mm512_mask_cvtneps_pbh +// OGCG: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +__m256bh test_mm512_mask_cvtneps_pbh(__m256bh src, __mmask16 k, __m512 a) { + return _mm512_mask_cvtneps_pbh(src, k, a); +} + +// CIR-LABEL: test_mm512_maskz_cvtneps_pbh +// CIR: cir.call @_mm512_maskz_cvtneps_pbh({{.*}}, {{.*}}) +// LLVM-LABEL: test_mm512_maskz_cvtneps_pbh +// LLVM: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +// OGCG-LABEL: test_mm512_maskz_cvtneps_pbh +// OGCG: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +__m256bh test_mm512_maskz_cvtneps_pbh(__mmask16 k, __m512 a) { + return _mm512_maskz_cvtneps_pbh(k, a); +} + +// CIR-LABEL: test_mm256_mask_cvtneps_pbh +// CIR: cir.call @_mm256_mask_cvtneps_pbh({{.*}}, {{.*}}, {{.*}}) +// LLVM-LABEL: test_mm256_mask_cvtneps_pbh +// LLVM: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +// OGCG-LABEL: test_mm256_mask_cvtneps_pbh +// OGCG: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +__m128bh test_mm256_mask_cvtneps_pbh(__m128bh src, __mmask8 k, __m256 a) { + return _mm256_mask_cvtneps_pbh(src, k, a); +} + +// CIR-LABEL: test_mm256_maskz_cvtneps_pbh +// CIR: cir.call @_mm256_maskz_cvtneps_pbh({{.*}}, {{.*}}) +// LLVM-LABEL: test_mm256_maskz_cvtneps_pbh +// LLVM: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +// OGCG-LABEL: test_mm256_maskz_cvtneps_pbh +// OGCG: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +__m128bh test_mm256_maskz_cvtneps_pbh(__mmask8 k, __m256 a) { + return _mm256_maskz_cvtneps_pbh(k, a); +} + +// CIR-LABEL: test_mm_mask_cvtneps_pbh +// CIR: cir.call @_mm_mask_cvtneps_pbh({{.*}}, {{.*}}, {{.*}}) +// LLVM-LABEL: test_mm_mask_cvtneps_pbh +// LLVM: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +// OGCG-LABEL: test_mm_mask_cvtneps_pbh +// OGCG: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +__m64bh test_mm_mask_cvtneps_pbh(__m64bh src, __mmask8 k, __m128 a) { + return _mm_mask_cvtneps_pbh(src, k, a); +} + +// CIR-LABEL: test_mm_maskz_cvtneps_pbh +// CIR: cir.call @_mm_maskz_cvtneps_pbh({{.*}}, {{.*}}) +// LLVM-LABEL: test_mm_maskz_cvtneps_pbh +// LLVM: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +// OGCG-LABEL: test_mm_maskz_cvtneps_pbh +// OGCG: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +__m64bh test_mm_maskz_cvtneps_pbh(__mmask8 k, __m128 a) { + return _mm_maskz_cvtneps_pbh(k, a); +} + +// CIR-LABEL: test_mm512_cvtneps_pbh +// CIR: cir.call @_mm512_cvtneps_pbh({{.*}}) +// LLVM-LABEL: test_mm512_cvtneps_pbh +// LLVM: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +// OGCG-LABEL: test_mm512_cvtneps_pbh +// OGCG: call <16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512 +__m256bh test_mm512_cvtneps_pbh(__m512 a) { + return _mm512_cvtneps_pbh(a); +} + +// CIR-LABEL: test_mm256_cvtneps_pbh +// CIR: cir.call @_mm256_cvtneps_pbh({{.*}}) +// LLVM-LABEL: test_mm256_cvtneps_pbh +// LLVM: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +// OGCG-LABEL: test_mm256_cvtneps_pbh +// OGCG: call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256 +__m128bh test_mm256_cvtneps_pbh(__m256 a) { + return _mm256_cvtneps_pbh(a); +} + +// CIR-LABEL: test_mm_cvtneps_pbh +// CIR: cir.call @_mm_cvtneps_pbh({{.*}}) +// LLVM-LABEL: test_mm_cvtneps_pbh +// LLVM: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +// OGCG-LABEL: test_mm_cvtneps_pbh +// OGCG: call <4 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.128 +__m64bh test_mm_cvtneps_pbh(__m128 a) { + return _mm_cvtneps_pbh(a); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
