https://github.com/Thibault-Monnier updated https://github.com/llvm/llvm-project/pull/167945
>From e2cc7e2adc9ef9c433c5f69fe51d6cb03ed024a7 Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Thu, 13 Nov 2025 21:15:11 +0100 Subject: [PATCH 1/6] Upstream CIR codegen for undef x86 builtins --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 12 ++++++- clang/test/CIR/CodeGen/X86/sse2-builtins.c | 39 ++++++++++++++++++++++ 2 files changed, 50 insertions(+), 1 deletion(-) create mode 100644 clang/test/CIR/CodeGen/X86/sse2-builtins.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 0198a9d4eb192..91417c2d192e7 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -16,7 +16,6 @@ #include "clang/Basic/Builtins.h" #include "clang/Basic/TargetBuiltins.h" #include "clang/CIR/MissingFeatures.h" -#include "llvm/IR/IntrinsicsX86.h" using namespace clang; using namespace clang::CIRGen; @@ -60,9 +59,20 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, case X86::BI__builtin_ia32_tzcnt_u16: case X86::BI__builtin_ia32_tzcnt_u32: case X86::BI__builtin_ia32_tzcnt_u64: + cgm.errorNYI(e->getSourceRange(), + std::string("unimplemented X86 builtin call: ") + + getContext().BuiltinInfo.getName(builtinID)); + return {}; case X86::BI__builtin_ia32_undef128: case X86::BI__builtin_ia32_undef256: case X86::BI__builtin_ia32_undef512: + // The x86 definition of "undef" is not the same as the LLVM definition + // (PR32176). We leave optimizing away an unnecessary zero constant to the + // IR optimizer and backend. + // TODO: If we had a "freeze" IR instruction to generate a fixed undef + // value, we should use that here instead of a zero. + return builder.getNullValue(convertType(e->getType()), + getLoc(e->getExprLoc())); case X86::BI__builtin_ia32_vec_ext_v4hi: case X86::BI__builtin_ia32_vec_ext_v16qi: case X86::BI__builtin_ia32_vec_ext_v8hi: diff --git a/clang/test/CIR/CodeGen/X86/sse2-builtins.c b/clang/test/CIR/CodeGen/X86/sse2-builtins.c new file mode 100644 index 0000000000000..eea1a5f6149b5 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/sse2-builtins.c @@ -0,0 +1,39 @@ +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR-CHECK,CIR-X64 --input-file=%t.cir %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR-CHECK,CIR-X64 --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM-CHECK,LLVM-X64 --input-file=%t.ll %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM-CHECK,LLVM-X64 --input-file=%t.ll %s + +// This test mimics clang/test/CodeGen/X86/sse2-builtins.c, which eventually +// CIR shall be able to support fully. + +#include <immintrin.h> + +__m128d test_mm_undefined_pd(void) { + // CIR-X64-LABEL: _mm_undefined_pd + // CIR-X64: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR-X64: cir.return %{{.*}} : !cir.vector<2 x !cir.double> + + // LLVM-X64-LABEL: test_mm_undefined_pd + // LLVM-X64: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM-X64: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 + // LLVM-X64: ret <2 x double> %{{.*}} + return _mm_undefined_pd(); +} + +__m128i test_mm_undefined_si128(void) { + // CIR-LABEL: _mm_undefined_si128 + // CIR-CHECK: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR-CHECK: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<2 x !s64i> + // CIR-CHECK: cir.return %{{.*}} : !cir.vector<2 x !s64i> + + // LLVM-CHECK-LABEL: test_mm_undefined_si128 + // LLVM-CHECK: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM-CHECK: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 + // LLVM-CHECK: ret <2 x i64> %{{.*}} + return _mm_undefined_si128(); +} >From 63e71942b2b1aa4c5177150a2a4cce12292a18ec Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Fri, 14 Nov 2025 23:57:25 +0100 Subject: [PATCH 2/6] Add OGCG checks + fix labels + re-add header include --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 1 + clang/test/CIR/CodeGen/X86/sse2-builtins.c | 41 ++++++++++++++-------- 2 files changed, 27 insertions(+), 15 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index ae012f64eff4f..8dea2de3f94c0 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -16,6 +16,7 @@ #include "clang/Basic/Builtins.h" #include "clang/Basic/TargetBuiltins.h" #include "clang/CIR/MissingFeatures.h" +#include "llvm/IR/IntrinsicsX86.h" using namespace clang; using namespace clang::CIRGen; diff --git a/clang/test/CIR/CodeGen/X86/sse2-builtins.c b/clang/test/CIR/CodeGen/X86/sse2-builtins.c index 8b594116e3e1a..61c08fab8b039 100644 --- a/clang/test/CIR/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse2-builtins.c @@ -17,26 +17,37 @@ #include <immintrin.h> __m128d test_mm_undefined_pd(void) { - // CIR-X64-LABEL: _mm_undefined_pd - // CIR-X64: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double> - // CIR-X64: cir.return %{{.*}} : !cir.vector<2 x !cir.double> - // LLVM-X64-LABEL: test_mm_undefined_pd - // LLVM-X64: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 - // LLVM-X64: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 - // LLVM-X64: ret <2 x double> %{{.*}} + // CIR-LABEL: test_mm_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<2 x !cir.double> + + // LLVM-LABEL: test_mm_undefined_pd + // LLVM: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 + // LLVM: ret <2 x double> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_pd + // OGCG: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 + // OGCG: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 + // OGCG: ret <2 x double> %{{.*}} return _mm_undefined_pd(); } __m128i test_mm_undefined_si128(void) { - // CIR-LABEL: _mm_undefined_si128 - // CIR-CHECK: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> - // CIR-CHECK: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<2 x !s64i> - // CIR-CHECK: cir.return %{{.*}} : !cir.vector<2 x !s64i> + // CIR-LABEL: test_mm_undefined_si128 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> + // CIR: cir.return %{{.*}} : + + // LLVM-LABEL: test_mm_undefined_si128 + // LLVM: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 + // LLVM: ret <2 x i64> %{{.*}} - // LLVM-CHECK-LABEL: test_mm_undefined_si128 - // LLVM-CHECK: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 - // LLVM-CHECK: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 - // LLVM-CHECK: ret <2 x i64> %{{.*}} + // OGCG-LABEL: test_mm_undefined_si128 + // OGCG: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 + // OGCG: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 + // OGCG: ret <2 x i64> %{{.*}} return _mm_undefined_si128(); } >From 1b7ffc0456e56d33b8c0046ad953165233366f89 Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Sat, 15 Nov 2025 12:47:17 +0100 Subject: [PATCH 3/6] Fix failing tests --- clang/test/CIR/CodeGen/X86/sse2-builtins.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/clang/test/CIR/CodeGen/X86/sse2-builtins.c b/clang/test/CIR/CodeGen/X86/sse2-builtins.c index 61c08fab8b039..8157f55e16f4c 100644 --- a/clang/test/CIR/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse2-builtins.c @@ -17,37 +17,39 @@ #include <immintrin.h> __m128d test_mm_undefined_pd(void) { - // CIR-LABEL: test_mm_undefined_pd + // CIR-LABEL: _mm_undefined_pd // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double> // CIR: cir.return %{{.*}} : !cir.vector<2 x !cir.double> + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_pd + // CIR: call @_mm_undefined_pd + // LLVM-LABEL: test_mm_undefined_pd // LLVM: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 // LLVM: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 // LLVM: ret <2 x double> %{{.*}} // OGCG-LABEL: test_mm_undefined_pd - // OGCG: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 - // OGCG: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 - // OGCG: ret <2 x double> %{{.*}} + // OGCG: ret <2 x double> zeroinitializer return _mm_undefined_pd(); } __m128i test_mm_undefined_si128(void) { - // CIR-LABEL: test_mm_undefined_si128 + // CIR-LABEL: _mm_undefined_si128 // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> // CIR: cir.return %{{.*}} : + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_si128 + // CIR: call @_mm_undefined_si128 + // LLVM-LABEL: test_mm_undefined_si128 // LLVM: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 // LLVM: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 // LLVM: ret <2 x i64> %{{.*}} // OGCG-LABEL: test_mm_undefined_si128 - // OGCG: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 - // OGCG: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 - // OGCG: ret <2 x i64> %{{.*}} + // OGCG: ret <2 x i64> zeroinitializer return _mm_undefined_si128(); } >From 045884317e92feebdf835833d81178aaf57d92ac Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Wed, 19 Nov 2025 21:10:38 +0100 Subject: [PATCH 4/6] Upstream additional undef tests --- clang/test/CIR/CodeGen/X86/avx-builtins.c | 76 ++++++++++++++++++ .../CodeGen/X86/avx10_2_512bf16-builtins.c | 26 ++++++ .../CIR/CodeGen/X86/avx10_2bf16-builtins.c | 41 ++++++++++ clang/test/CIR/CodeGen/X86/avx512f-builtins.c | 79 +++++++++++++++++++ .../CIR/CodeGen/X86/avx512fp16-builtins.c | 57 +++++++++++++ clang/test/CIR/CodeGen/X86/sse-builtins.c | 16 ++++ 6 files changed, 295 insertions(+) create mode 100644 clang/test/CIR/CodeGen/X86/avx-builtins.c create mode 100644 clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c create mode 100644 clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c create mode 100644 clang/test/CIR/CodeGen/X86/avx512f-builtins.c create mode 100644 clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c diff --git a/clang/test/CIR/CodeGen/X86/avx-builtins.c b/clang/test/CIR/CodeGen/X86/avx-builtins.c new file mode 100644 index 0000000000000..82fa4358dc400 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx-builtins.c @@ -0,0 +1,76 @@ +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG + +// This test mimics clang/test/CodeGen/X86/avx-builtins.c, which eventually +// CIR shall be able to support fully. + +#include <immintrin.h> + +__m256 test_mm256_undefined_ps(void) { + // CIR-LABEL: _mm256_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<8 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.float> + + // LLVM-LABEL: test_mm256_undefined_ps + // LLVM: store <8 x float> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <8 x float>, ptr %[[A]], align 32 + // LLVM: ret <8 x float> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_ps + // OGCG: ret <8 x float> zeroinitializer + return _mm256_undefined_ps(); +} + +__m256d test_mm256_undefined_pd(void) { + // CIR-LABEL: _mm256_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.double> + + // LLVM-LABEL: test_mm256_undefined_pd + // LLVM: store <4 x double> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <4 x double>, ptr %[[A]], align 32 + // LLVM: ret <4 x double> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_pd + // OGCG: ret <4 x double> zeroinitializer + return _mm256_undefined_pd(); +} + +__m256i test_mm256_undefined_si256(void) { + // CIR-LABEL: _mm256_undefined_si256 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<4 x !s64i> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !s64i> + + // LLVM-LABEL: test_mm256_undefined_si256 + // LLVM: store <4 x i64> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <4 x i64>, ptr %[[A]], align 32 + // LLVM: ret <4 x i64> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_si256 + // OGCG: ret <4 x i64> zeroinitializer + return _mm256_undefined_si256(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c new file mode 100644 index 0000000000000..29b382878e079 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c @@ -0,0 +1,26 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-512 -fclangir -emit-cir -o %t.cir -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-512 -fclangir -emit-llvm -o %t.ll -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include <immintrin.h> + +__m512bh test_mm512_undefined_pbh(void) { + + // CIR-LABEL: _mm512_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.bf16> + + // LLVM-LABEL: test_mm512_undefined_pbh + // LLVM: store <32 x bfloat> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <32 x bfloat>, ptr %[[A]], align 64 + // LLVM: ret <32 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_pbh + // OGCG: ret <32 x bfloat> zeroinitializer + return _mm512_undefined_pbh(); +} diff --git a/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c new file mode 100644 index 0000000000000..6b6cfbb0979d2 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c @@ -0,0 +1,41 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-256 -fclangir -emit-cir -o %t.cir -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-256 -fclangir -emit-llvm -o %t.ll -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include <immintrin.h> + +__m128bh test_mm_undefined_pbh(void) { + // CIR-LABEL: _mm_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.bf16> + + // LLVM-LABEL: @test_mm_undefined_pbh + // LLVM: store <8 x bfloat> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <8 x bfloat>, ptr %[[A]], align 16 + // LLVM: ret <8 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_pbh + // OGCG: ret <8 x bfloat> zeroinitializer + return _mm_undefined_pbh(); +} + +__m256bh test_mm256_undefined_pbh(void) { + // CIR-LABEL: _mm256_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.bf16> + + // LLVM-LABEL: @test_mm256_undefined_pbh + // LLVM: store <16 x bfloat> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <16 x bfloat>, ptr %[[A]], align 32 + // LLVM: ret <16 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_pbh + // OGCG: ret <16 x bfloat> zeroinitializer + return _mm256_undefined_pbh(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/avx512f-builtins.c b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c new file mode 100644 index 0000000000000..dc54a87856a7c --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c @@ -0,0 +1,79 @@ +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG + +#include <immintrin.h> + +__m512 test_mm512_undefined(void) { + // CIR-LABEL: _mm512_undefined + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<16 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.float> + + // LLVM-LABEL: test_mm512_undefined + // LLVM: store <16 x float> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <16 x float>, ptr %[[A]], align 64 + // LLVM: ret <16 x float> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined + // OGCG: ret <16 x float> zeroinitializer + return _mm512_undefined(); +} + +__m512 test_mm512_undefined_ps(void) { + // CIR-LABEL: _mm512_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<16 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.float> + + // LLVM-LABEL: test_mm512_undefined_ps + // LLVM: store <16 x float> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <16 x float>, ptr %[[A]], align 64 + // LLVM: ret <16 x float> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_ps + // OGCG: ret <16 x float> zeroinitializer + return _mm512_undefined_ps(); +} + +__m512d test_mm512_undefined_pd(void) { + // CIR-LABEL: _mm512_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.double> + + // LLVM-LABEL: test_mm512_undefined_pd + // LLVM: store <8 x double> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <8 x double>, ptr %[[A]], align 64 + // LLVM: ret <8 x double> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_pd + // OGCG: ret <8 x double> zeroinitializer + return _mm512_undefined_pd(); +} + +__m512i test_mm512_undefined_epi32(void) { + // CIR-LABEL: _mm512_undefined_epi32 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<8 x !s64i> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !s64i> + + // LLVM-LABEL: test_mm512_undefined_epi32 + // LLVM: store <8 x i64> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <8 x i64>, ptr %[[A]], align 64 + // LLVM: ret <8 x i64> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_epi32 + // OGCG: ret <8 x i64> zeroinitializer + return _mm512_undefined_epi32(); +} diff --git a/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c new file mode 100644 index 0000000000000..8dccd44b795b7 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c @@ -0,0 +1,57 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include <immintrin.h> + +__m128h test_mm_undefined_ph(void) { + // CIR-LABEL: _mm_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.f16> + + // LLVM-LABEL: @test_mm_undefined_ph + // LLVM: store <8 x half> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <8 x half>, ptr %[[A]], align 16 + // LLVM: ret <8 x half> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_ph + // OGCG: ret <8 x half> zeroinitializer + return _mm_undefined_ph(); +} + +__m256h test_mm256_undefined_ph(void) { + // CIR-LABEL: _mm256_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.f16> + + // LLVM-LABEL: @test_mm256_undefined_ph + // LLVM: store <16 x half> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <16 x half>, ptr %[[A]], align 32 + // LLVM: ret <16 x half> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_ph + // OGCG: ret <16 x half> zeroinitializer + return _mm256_undefined_ph(); +} + +__m512h test_mm512_undefined_ph(void) { + // CIR-LABEL: _mm512_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.f16> + + // LLVM-LABEL: @test_mm512_undefined_ph + // LLVM: store <32 x half> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <32 x half>, ptr %[[A]], align 64 + // LLVM: ret <32 x half> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_ph + // OGCG: ret <32 x half> zeroinitializer + return _mm512_undefined_ph(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/sse-builtins.c b/clang/test/CIR/CodeGen/X86/sse-builtins.c index 3a61018741958..13deea4d946ab 100644 --- a/clang/test/CIR/CodeGen/X86/sse-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse-builtins.c @@ -26,3 +26,19 @@ void test_mm_sfence(void) { // LLVM: call void @llvm.x86.sse.sfence() // OGCG: call void @llvm.x86.sse.sfence() } + +__m128 test_mm_undefined_ps(void) { + // CIR-LABEL: _mm_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<4 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.float> + + // LLVM-LABEL: test_mm_undefined_ps + // LLVM: store <4 x float> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <4 x float>, ptr %[[A]], align 16 + // LLVM: ret <4 x float> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_ps + // OGCG: ret <4 x float> zeroinitializer + return _mm_undefined_ps(); +} >From 69e51eb3172469ba8313561234bbb60398a25d52 Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Wed, 19 Nov 2025 21:10:38 +0100 Subject: [PATCH 5/6] Upstream additional undef tests --- clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c | 4 +++- clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c | 6 ++++++ clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c | 9 +++++++++ clang/test/CIR/CodeGen/X86/sse-builtins.c | 1 - 4 files changed, 18 insertions(+), 2 deletions(-) diff --git a/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c index 29b382878e079..e4501889c2d60 100644 --- a/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c +++ b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c @@ -9,12 +9,14 @@ #include <immintrin.h> __m512bh test_mm512_undefined_pbh(void) { - // CIR-LABEL: _mm512_undefined_pbh // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.bf16> // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.bf16> + // CIR-LABEL: cir.func {{.*}}test_mm512_undefined_pbh + // CIR: call @_mm512_undefined_pbh + // LLVM-LABEL: test_mm512_undefined_pbh // LLVM: store <32 x bfloat> zeroinitializer, ptr %[[A:.*]], align 64 // LLVM: %{{.*}} = load <32 x bfloat>, ptr %[[A]], align 64 diff --git a/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c index 6b6cfbb0979d2..4dac4fa2fe811 100644 --- a/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c +++ b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c @@ -14,6 +14,9 @@ __m128bh test_mm_undefined_pbh(void) { // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.bf16> // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.bf16> + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_pbh + // CIR: call @_mm_undefined_pbh + // LLVM-LABEL: @test_mm_undefined_pbh // LLVM: store <8 x bfloat> zeroinitializer, ptr %[[A:.*]], align 16 // LLVM: %{{.*}} = load <8 x bfloat>, ptr %[[A]], align 16 @@ -30,6 +33,9 @@ __m256bh test_mm256_undefined_pbh(void) { // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.bf16> // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.bf16> + // CIR-LABEL: cir.func {{.*}}test_mm256_undefined_pbh + // CIR: call @_mm256_undefined_pbh + // LLVM-LABEL: @test_mm256_undefined_pbh // LLVM: store <16 x bfloat> zeroinitializer, ptr %[[A:.*]], align 32 // LLVM: %{{.*}} = load <16 x bfloat>, ptr %[[A]], align 32 diff --git a/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c index 8dccd44b795b7..161fc45b2a32d 100644 --- a/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c +++ b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c @@ -14,6 +14,9 @@ __m128h test_mm_undefined_ph(void) { // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.f16> // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.f16> + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_ph + // CIR: call @_mm_undefined_ph + // LLVM-LABEL: @test_mm_undefined_ph // LLVM: store <8 x half> zeroinitializer, ptr %[[A:.*]], align 16 // LLVM: %{{.*}} = load <8 x half>, ptr %[[A]], align 16 @@ -30,6 +33,9 @@ __m256h test_mm256_undefined_ph(void) { // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.f16> // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.f16> + // CIR-LABEL: cir.func {{.*}}test_mm256_undefined_ph + // CIR: call @_mm256_undefined_ph + // LLVM-LABEL: @test_mm256_undefined_ph // LLVM: store <16 x half> zeroinitializer, ptr %[[A:.*]], align 32 // LLVM: %{{.*}} = load <16 x half>, ptr %[[A]], align 32 @@ -46,6 +52,9 @@ __m512h test_mm512_undefined_ph(void) { // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.f16> // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.f16> + // CIR-LABEL: cir.func {{.*}}test_mm512_undefined_ph + // CIR: call @_mm512_undefined_ph + // LLVM-LABEL: @test_mm512_undefined_ph // LLVM: store <32 x half> zeroinitializer, ptr %[[A:.*]], align 64 // LLVM: %{{.*}} = load <32 x half>, ptr %[[A]], align 64 diff --git a/clang/test/CIR/CodeGen/X86/sse-builtins.c b/clang/test/CIR/CodeGen/X86/sse-builtins.c index 13deea4d946ab..1c9bdf198f9f6 100644 --- a/clang/test/CIR/CodeGen/X86/sse-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse-builtins.c @@ -16,7 +16,6 @@ #include <immintrin.h> - void test_mm_sfence(void) { // CIR-LABEL: test_mm_sfence // LLVM-LABEL: test_mm_sfence >From 600fb1ddc5f04c4008149c197d7e6a67cdbc1a54 Mon Sep 17 00:00:00 2001 From: Thibault-Monnier <[email protected]> Date: Wed, 19 Nov 2025 21:28:17 +0100 Subject: [PATCH 6/6] Fix compilation --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 84df7fe19f9c0..875d967c579aa 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -128,7 +128,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, case X86::BI__builtin_ia32_tzcnt_u16: case X86::BI__builtin_ia32_tzcnt_u32: case X86::BI__builtin_ia32_tzcnt_u64: - cgm.errorNYI(e->getSourceRange(), + cgm.errorNYI(expr->getSourceRange(), std::string("unimplemented X86 builtin call: ") + getContext().BuiltinInfo.getName(builtinID)); return {}; @@ -140,8 +140,8 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, // IR optimizer and backend. // TODO: If we had a "freeze" IR instruction to generate a fixed undef // value, we should use that here instead of a zero. - return builder.getNullValue(convertType(e->getType()), - getLoc(e->getExprLoc())); + return builder.getNullValue(convertType(expr->getType()), + getLoc(expr->getExprLoc())); case X86::BI__builtin_ia32_vec_ext_v4hi: case X86::BI__builtin_ia32_vec_ext_v16qi: case X86::BI__builtin_ia32_vec_ext_v8hi: _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
