[clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)

[Pengcheng Wang via cfe-commits]

================
@@ -20594,6 +20645,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode 
*N,
     if (SDValue V = combineVqdotAccum(N, DAG, Subtarget))
       return V;
     return combineToVWMACC(N, DAG, Subtarget);
+  case RISCVISD::VWADDU_VL:
----------------
wangpc-pp wrote:

I don't know if we need this, because we haven't found such patterns in x264.

https://github.com/llvm/llvm-project/pull/124239
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