llvmbot wrote:

<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-testing-tools

Author: Antonio Frighetto (antoniofrighetto)

<details>
<summary>Changes</summary>

Tests exercizing TBAA metadata (both purposefully and not), and previously 
generated via UTC, have been regenerated and updated to version 6.

Rebased over: https://github.com/llvm/llvm-project/pull/147670.

---

Patch is 3.81 MiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/154347.diff


68 Files Affected:

- (modified) clang/test/C/C11/n1285_1.c (+21-21) 
- (modified) clang/test/C/C2y/n3254.c (+1-1) 
- (modified) clang/test/CodeGen/AArch64/fp8-init-list.c (+5-5) 
- (modified) clang/test/CodeGen/AArch64/ls64-inline-asm.c (+32-20) 
- (modified) clang/test/CodeGen/LoongArch/lasx/builtin-alias.c (+4201-3457) 
- (modified) clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c 
(+26-17) 
- (modified) clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c (+26-17) 
- (modified) clang/test/CodeGen/LoongArch/lasx/builtin.c (+4198-3457) 
- (modified) clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c (+54-33) 
- (modified) clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c (+56-37) 
- (modified) clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c (+507-412) 
- (modified) clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast-less-8.c 
(+28-19) 
- (modified) clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast.c (+113-82) 
- (modified) clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c (+64-45) 
- (modified) clang/test/CodeGen/RISCV/attr-rvv-vector-bits-globals.c (+73-50) 
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-i128.c (+62-62) 
- (modified) clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-16Al.c 
(+106-80) 
- (modified) clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-8Al.c 
(+106-80) 
- (modified) clang/test/CodeGen/SystemZ/sync-builtins-i128-16Al.c (+96-72) 
- (modified) clang/test/CodeGen/SystemZ/zvector2.c (+58-58) 
- (modified) clang/test/CodeGen/allow-ubsan-check.c (+13-13) 
- (modified) clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c (+146-109) 
- (modified) clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c (+52-36) 
- (modified) clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c (+78-57) 
- (modified) clang/test/CodeGen/attr-counted-by-for-pointers.c (+146-94) 
- (modified) clang/test/CodeGen/attr-counted-by-pr110385.c (+15-15) 
- (modified) clang/test/CodeGen/attr-counted-by.c (+582-483) 
- (modified) clang/test/CodeGen/builtin-maxnum-minnum.c (+46-46) 
- (modified) clang/test/CodeGen/cleanup-destslot-simple.c (+89-85) 
- (modified) clang/test/CodeGen/isfpclass.c (+53-48) 
- (modified) clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c (+42-42) 
- (modified) clang/test/CodeGen/math-libcalls-tbaa.c (+159-82) 
- (modified) clang/test/CodeGen/sanitize-metadata-nosanitize.c (+26-26) 
- (modified) clang/test/CodeGen/sanitize-type-globals.cpp (+1-1) 
- (modified) clang/test/CodeGen/unsigned-promotion-debuginfo.c (+11-11) 
- (modified) clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp 
(+234-205) 
- (modified) clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp 
(+155-126) 
- (modified) clang/test/CodeGenCXX/attr-likelihood-switch-branch-weights.cpp 
(+226-191) 
- (modified) clang/test/CodeGenCXX/cfi-mfcall-nomerge.cpp (+21-13) 
- (modified) clang/test/CodeGenCXX/inline-then-fold-variadics.cpp (+58-53) 
- (modified) clang/test/CodeGenCXX/load-reference-metadata.cpp (+26-26) 
- (modified) clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl (+37-28) 
- (modified) clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (+89-89) 
- (modified) clang/test/CodeGenOpenCL/amdgpu-printf.cl (+21-21) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl 
(+61-45) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl 
(+61-45) 
- (modified) 
clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl 
(+48-32) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl (+61-45) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl (+61-45) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl (+46-33) 
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl (+46-33) 
- (modified) 
clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl (+4-4) 
- (modified) clang/test/CodeGenOpenCL/preserve_vec3.cl (+23-23) 
- (modified) clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp (+6-6) 
- (modified) clang/test/Headers/__clang_hip_math.hip (+5388-4203) 
- (modified) clang/test/Headers/wasm.c (+1339-1056) 
- (modified) clang/test/OpenMP/bug54082.c (+25-17) 
- (modified) clang/test/OpenMP/bug56913.c (+22-12) 
- (modified) clang/test/OpenMP/bug57757.cpp (+22-22) 
- (modified) 
clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp 
(+516-481) 
- (modified) clang/test/OpenMP/parallel_if_codegen_PR51349.cpp (+46-29) 
- (modified) clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp (+242-33) 
- (added) 
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll
 (+84) 
- (added) 
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll.expected
 (+156) 
- (added) 
llvm/test/tools/UpdateTestChecks/update_test_checks/tbaa-semantics-checks.test 
(+7) 
- (modified) llvm/utils/UpdateTestChecks/common.py (+103-3) 
- (modified) llvm/utils/update_cc_test_checks.py (+10) 
- (modified) llvm/utils/update_test_checks.py (+10) 


``````````diff
diff --git a/clang/test/C/C11/n1285_1.c b/clang/test/C/C11/n1285_1.c
index 25b68e3145b04..345ec94a1eeef 100644
--- a/clang/test/C/C11/n1285_1.c
+++ b/clang/test/C/C11/n1285_1.c
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 6
 // RUN: %clang_cc1 -triple=x86_64 -std=c99 -Wno-dangling -emit-llvm -o - %s | 
FileCheck %s --check-prefix=CHECK
 // RUN: %clang_cc1 -triple=x86_64 -std=c11 -Wno-dangling -emit-llvm -o - %s | 
FileCheck %s --check-prefix=CHECK
 // RUN: %clang_cc1 -triple=x86_64 -std=c11 -O2 -disable-llvm-passes 
-Wno-dangling -emit-llvm -o - %s | FileCheck %s --check-prefix=C11-O2
@@ -32,9 +32,9 @@ struct X f(void);
 // C11-O2-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[REF_TMP]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A]], i64 0, i64 0
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr [[P]], align 8, !tbaa 
[[TBAA2:![0-9]+]]
-// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[P]], align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[TBAA7:![0-9]+]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr [[P]], align 8, !tbaa 
[[INTPTR_TBAA2:![0-9]+]]
+// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[P]], align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[INT_TBAA7:![0-9]+]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[P]]) #[[ATTR5]]
 // C11-O2-NEXT:    ret i32 [[TMP1]]
 //
@@ -91,18 +91,18 @@ int func_return(void) {
 // C11-O2:       [[COND_END]]:
 // C11-O2-NEXT:    [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[REF_TMP]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A1]], i64 0, i64 0
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[TBAA2]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
 // C11-O2-NEXT:    call void @llvm.lifetime.start.p0(ptr [[Q]]) #[[ATTR5]]
 // C11-O2-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 
[[DOTCOMPOUNDLITERAL]], i8 0, i64 20, i1 false)
 // C11-O2-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[DOTCOMPOUNDLITERAL]], i32 0, i32 0
 // C11-O2-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[DOTCOMPOUNDLITERAL]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY4:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A3]], i64 0, i64 0
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY4]], ptr [[Q]], align 8, !tbaa 
[[TBAA2]]
-// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[TBAA7]]
-// C11-O2-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[Q]], align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4, !tbaa 
[[TBAA7]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY4]], ptr [[Q]], align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[INT_TBAA7]]
+// C11-O2-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[Q]], align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4, !tbaa 
[[INT_TBAA7]]
 // C11-O2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP3]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[Q]]) #[[ATTR5]]
 // C11-O2-NEXT:    ret i32 [[ADD]]
@@ -138,10 +138,10 @@ int ternary(void) {
 // C11-O2-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], 
ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9:![0-9]+]]
 // C11-O2-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[REF_TMP]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A]], i64 0, i64 0
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[TBAA2]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[TBAA7]]
+// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[INT_TBAA7]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
 // C11-O2-NEXT:    ret i32 [[TMP1]]
 //
@@ -175,10 +175,10 @@ int comma(void) {
 // C11-O2-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], 
ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9]]
 // C11-O2-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[REF_TMP]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A]], i64 0, i64 0
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[TBAA2]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[TBAA7]]
+// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[INT_TBAA7]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
 // C11-O2-NEXT:    ret i32 [[TMP1]]
 //
@@ -217,10 +217,10 @@ int cast(void) {
 // C11-O2-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], 
ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9]]
 // C11-O2-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr 
[[REF_TMP]], i32 0, i32 0
 // C11-O2-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr 
[[A]], i64 0, i64 0
-// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[TBAA2]]
+// C11-O2-NEXT:    store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[TBAA2]]
-// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[TBAA7]]
+// C11-O2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa 
[[INTPTR_TBAA2]]
+// C11-O2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa 
[[INT_TBAA7]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[S]]) #[[ATTR5]]
 // C11-O2-NEXT:    call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
 // C11-O2-NEXT:    ret i32 [[TMP1]]
@@ -232,12 +232,12 @@ int assign(void) {
   return *p;
 }
 //.
-// C11-O2: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
+// C11-O2: [[INTPTR_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
 // C11-O2: [[META3]] = !{!"p1 int", [[META4:![0-9]+]], i64 0}
 // C11-O2: [[META4]] = !{!"any pointer", [[META5:![0-9]+]], i64 0}
 // C11-O2: [[META5]] = !{!"omnipotent char", [[META6:![0-9]+]], i64 0}
 // C11-O2: [[META6]] = !{!"Simple C/C++ TBAA"}
-// C11-O2: [[TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
+// C11-O2: [[INT_TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
 // C11-O2: [[META8]] = !{!"int", [[META5]], i64 0}
 // C11-O2: [[TBAA_STRUCT9]] = !{i64 0, i64 20, [[META10:![0-9]+]]}
 // C11-O2: [[META10]] = !{[[META5]], [[META5]], i64 0}
diff --git a/clang/test/C/C2y/n3254.c b/clang/test/C/C2y/n3254.c
index e114735a9cb79..9f8c47756df32 100644
--- a/clang/test/C/C2y/n3254.c
+++ b/clang/test/C/C2y/n3254.c
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 6
 // RUN: %clang_cc1 -triple=x86_64 -std=c2y %s -emit-llvm -o - | FileCheck %s
 
 /* WG14 N3254: Yes
diff --git a/clang/test/CodeGen/AArch64/fp8-init-list.c 
b/clang/test/CodeGen/AArch64/fp8-init-list.c
index 8b4b31a71c46a..7c0f6278b2090 100644
--- a/clang/test/CodeGen/AArch64/fp8-init-list.c
+++ b/clang/test/CodeGen/AArch64/fp8-init-list.c
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 6
 
 // RUN: %clang_cc1        -triple aarch64-none-linux-gnu -target-feature +neon 
-O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -x c++ -triple aarch64-none-linux-gnu -target-feature +neon 
-O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-CXX
@@ -34,25 +34,25 @@ struct S s;
 // CHECK-LABEL: define dso_local void @f(
 // CHECK-SAME: <1 x i8> [[X:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
 // CHECK-NEXT:  [[ENTRY:.*:]]
-// CHECK-NEXT:    store <1 x i8> [[X]], ptr @s, align 1, !tbaa 
[[TBAA2:![0-9]+]]
+// CHECK-NEXT:    store <1 x i8> [[X]], ptr @s, align 1, !tbaa 
[[__MFP8_TBAA2:![0-9]+]]
 // CHECK-NEXT:    ret void
 //
 // CHECK-CXX-LABEL: define dso_local void @_Z1fu6__mfp8(
 // CHECK-CXX-SAME: <1 x i8> [[X:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
 // CHECK-CXX-NEXT:  [[ENTRY:.*:]]
-// CHECK-CXX-NEXT:    store <1 x i8> [[X]], ptr @s, align 1, !tbaa 
[[TBAA2:![0-9]+]]
+// CHECK-CXX-NEXT:    store <1 x i8> [[X]], ptr @s, align 1, !tbaa 
[[__MFP8_TBAA2:![0-9]+]]
 // CHECK-CXX-NEXT:    ret void
 //
 void f(__mfp8 x) {
     s = (struct S){x};
 }
 //.
-// CHECK: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
+// CHECK: [[__MFP8_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
 // CHECK: [[META3]] = !{!"__mfp8", [[META4:![0-9]+]], i64 0}
 // CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
 // CHECK: [[META5]] = !{!"Simple C/C++ TBAA"}
 //.
-// CHECK-CXX: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
+// CHECK-CXX: [[__MFP8_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
 // CHECK-CXX: [[META3]] = !{!"__mfp8", [[META4:![0-9]+]], i64 0}
 // CHECK-CXX: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
 // CHECK-CXX: [[META5]] = !{!"Simple C++ TBAA"}
diff --git a/clang/test/CodeGen/AArch64/ls64-inline-asm.c 
b/clang/test/CodeGen/AArch64/ls64-inline-asm.c
index 8aa0684dba14d..1d217eb8801e5 100644
--- a/clang/test/CodeGen/AArch64/ls64-inline-asm.c
+++ b/clang/test/CodeGen/AArch64/ls64-inline-asm.c
@@ -1,12 +1,13 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 6
 // RUN: %clang_cc1 -triple aarch64 -target-feature +ls64 -O1 -emit-llvm -x c 
%s -o - | FileCheck %s
 
 struct foo { unsigned long long x[8]; };
 
-// CHECK-LABEL: @load(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call i512 asm sideeffect "ld64b 
$0,[$1]", "=r,r,~{memory}"(ptr [[ADDR:%.*]]) #[[ATTR1:[0-9]+]], !srcloc 
[[META2:![0-9]+]]
-// CHECK-NEXT:    store i512 [[TMP0]], ptr [[OUTPUT:%.*]], align 8
+// CHECK-LABEL: define dso_local void @load(
+// CHECK-SAME: ptr noundef writeonly captures(none) initializes((0, 64)) 
[[OUTPUT:%.*]], ptr noundef [[ADDR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call i512 asm sideeffect "ld64b 
$0,[$1]", "=r,r,~{memory}"(ptr [[ADDR]]) #[[ATTR1:[0-9]+]], !srcloc 
[[META2:![0-9]+]]
+// CHECK-NEXT:    store i512 [[TMP0]], ptr [[OUTPUT]], align 8
 // CHECK-NEXT:    ret void
 //
 void load(struct foo *output, void *addr)
@@ -14,10 +15,11 @@ void load(struct foo *output, void *addr)
     __asm__ volatile ("ld64b %0,[%1]" : "=r" (*output) : "r" (addr) : 
"memory");
 }
 
-// CHECK-LABEL: @store(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = load i512, ptr [[INPUT:%.*]], align 8
-// CHECK-NEXT:    tail call void asm sideeffect "st64b $0,[$1]", 
"r,r,~{memory}"(i512 [[TMP0]], ptr [[ADDR:%.*]]) #[[ATTR1]], !srcloc 
[[META3:![0-9]+]]
+// CHECK-LABEL: define dso_local void @store(
+// CHECK-SAME: ptr noundef readonly captures(none) [[INPUT:%.*]], ptr noundef 
[[ADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = load i512, ptr [[INPUT]], align 8
+// CHECK-NEXT:    tail call void asm sideeffect "st64b $0,[$1]", 
"r,r,~{memory}"(i512 [[TMP0]], ptr [[ADDR]]) #[[ATTR1]], !srcloc 
[[META3:![0-9]+]]
 // CHECK-NEXT:    ret void
 //
 void store(const struct foo *input, void *addr)
@@ -25,30 +27,31 @@ void store(const struct foo *input, void *addr)
     __asm__ volatile ("st64b %0,[%1]" : : "r" (*input), "r" (addr) : "memory" 
);
 }
 
-// CHECK-LABEL: @store2(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[IN:%.*]], align 4, !tbaa 
[[TBAA4:![0-9]+]]
+// CHECK-LABEL: define dso_local void @store2(
+// CHECK-SAME: ptr noundef readonly captures(none) [[IN:%.*]], ptr noundef 
[[ADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[IN]], align 4, !tbaa 
[[INT_TBAA4:![0-9]+]]
 // CHECK-NEXT:    [[CONV:%.*]] = sext i32 [[TMP0]] to i64
 // CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 4
-// CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV2:%.*]] = sext i32 [[TMP1]] to i64
 // CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 16
-// CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV5:%.*]] = sext i32 [[TMP2]] to i64
 // CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 64
-// CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV8:%.*]] = sext i32 [[TMP3]] to i64
 // CHECK-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 100
-// CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX10]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX10]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV11:%.*]] = sext i32 [[TMP4]] to i64
 // CHECK-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 144
-// CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV14:%.*]] = sext i32 [[TMP5]] to i64
 // CHECK-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 196
-// CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV17:%.*]] = sext i32 [[TMP6]] to i64
 // CHECK-NEXT:    [[ARRAYIDX19:%.*]] = getelementptr inbounds nuw i8, ptr 
[[IN]], i64 256
-// CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX19]], align 4, !tbaa 
[[TBAA4]]
+// CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX19]], align 4, !tbaa 
[[INT_TBAA4]]
 // CHECK-NEXT:    [[CONV20:%.*]] = sext i32 [[TMP7]] to i64
 // CHECK-NEXT:    [[S_SROA_10_0_INSERT_EXT:%.*]] = zext i64 [[CONV20]] to i512
 // CHECK-NEXT:    [[S_SROA_10_0_INSERT_SHIFT:%.*]] = shl nuw i512 
[[S_SROA_10_0_INSERT_EXT]], 448
@@ -72,7 +75,7 @@ void store(const struct foo *input, void *addr)
 // CHECK-NEXT:    [[S_SROA_0_0_INSERT_EXT:%.*]] = zext i64 [[CONV]] to i512
 // CHECK-NEXT:    [[S_SROA_0_0_INSERT_MASK:%.*]] = or disjoint i512 
[[S_SROA_4_0_INSERT_MASK]], [[S_SROA_4_0_INSERT_SHIFT]]
 // CHECK-NEXT:    [[S_SROA_0_0_INSERT_INSERT:%.*]] = or i512 
[[S_SROA_0_0_INSERT_MASK]], [[S_SROA_0_0_INSERT_EXT]]
-// CHECK-NEXT:    tail call void asm sideeffect "st64b $0,[$1]", 
"r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], ptr [[ADDR:%.*]]) 
#[[ATTR1]], !srcloc [[META8:![0-9]+]]
+// CHECK-NEXT:    tail call void asm sideeffect "st64b $0,[$1]", 
"r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], ptr [[ADDR]]) #[[ATTR1]], 
!srcloc [[META8:![0-9]+]]
 // CHECK-NEXT:    ret void
 //
 void store2(int *in, void *addr)
@@ -80,3 +83,12 @@ void store2(int *in, void *addr)
     struct foo s = { in[0], in[1], in[4], in[16], in[25], in[36], in[49], 
in[64] };
     __asm__ volatile ("st64b %0,[%1]" : : "r" (s), "r" (addr) : "memory" );
 }
+//.
+// CHECK: [[META2]] = !{i64 789}
+// CHECK: [[META3]] = !{i64 1368}
+// CHECK: [[INT_TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}
+// CHECK: [[META5]] = !{!"int", [[META6:![0-9]+]], i64 0}
+// CHECK: [[META6]] = !{!"omnipotent char", [[META7:![0-9]+]], i64 0}
+// CHECK: [[META7]] = !{!"Simple C/C++ TBAA"}
+// CHECK: [[META8]] = !{i64 5992}
+//.
diff --git a/clang/test/CodeGen/LoongArch/lasx/builtin-alias.c 
b/clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
index 9a8ce224bcfd0..dd094e5493a60 100644
--- a/clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+++ b/clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
@@ -1,6386 +1,7130 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 6
 // RUN: %clang_cc1 -triple loongarch64 -target-feature +lasx -O2 -emit-llvm %s 
-o - | FileCheck %s
 
 #include <lasxintrin.h>
 
-// CHECK-LABEL: @xvsll_b(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[_124:%.*]] = load <32 x i8>, ptr [[TMP0:%.*]], align 32, 
!tbaa [[TBAA2:![0-9]+]]
-// CHECK-NEXT:    [[_235:%.*]] = load <32 x i8>, ptr [[TMP1:%.*]], align 32, 
!tbaa [[TBAA2]]
+// CHECK-LABEL: define dso_local void @xvsll_b(
+// CHECK-SAME: ptr dead_on_unwind noalias writable writeonly sret(<32 x i8>) 
align 32 captures(none) initializes((0, 32)) [[AGG_RESULT:%.*]], ptr 
dead_on_return noundef readonly captures(none) [[TMP0:%.*]], ptr dead_on_return 
noundef readonly captures(none) [[TMP1:%.*]]) local_unnamed_addr 
#[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[_124:%.*]] = load <32 x i8>, ptr [[TMP0]], align 32, !tbaa 
[[CHAR_TBAA2:![0-9]+]]
+// CHECK-NEXT:    [[_235:%.*]] = load <32 x i8>, ptr [[TMP1]], align 32, !tbaa 
[[CHAR_TBAA2]]
 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <32 x i8> 
@llvm.loongarch.lasx.xvsll.b(<32 x i8> [[_124]], <32 x i8> [[_235]])
-// CHECK-NEXT:    store <32 x i8> [[TMP2]], ptr [[AGG_RESULT:%.*]], align 32, 
!tbaa [[TBAA2]]
+// CHECK-NEXT:    store <32 x i8> [[TMP2]], ptr [[AGG_RESULT]], align 32, 
!tbaa [[CHAR_TBAA2]]
 // CHECK-NEXT:    ret void
 //
 v32i8 xvsll_b(v32i8 _1, v32i8 _2) { return __lasx_xvsll_b(_1, _2); }
-// CHECK-LABEL: @xvsll_h(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[_124:%.*]] = load <16 x i16>, ptr [[TMP0:%.*]], align 32, 
!tbaa [[TBAA2]]
-// CHECK-NEXT:    [[_235:%.*]] = load <16 x i16>, ptr [[TMP1:%.*]], align 32, 
!tbaa [[TBAA2]]
+// CHECK-LABEL: define dso_local void @xvsll_h(
+// CHECK-SAME: ptr dead_on_unwind noalias writable writeonly sret(<16 x i16>) 
align 32 captures(none) initializes((0, 32)) [[AGG_RESULT:%.*]], ptr 
dead_on_return noundef readonly captures(none) [[TMP0:%.*]], ptr dead_on_return 
noundef readonly captures(none) [[TMP1:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[_124:%.*]] = load <16 x i16>, ptr [[TMP0]], align 32, 
!tbaa [[CHAR_TBAA2]]
+// CHECK-NEXT:    [[_235:%.*]] = load <16 x i16>, ptr [[TMP1]], align 32, 
!tbaa [[CHAR_TBAA2]]
 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i16> 
@llvm.loongarch.lasx.xvsll.h(<16 x i16> [[_124]], <16 x i16> [[_235]])
-// CHECK-NEXT:    store <16 x i16> [[TMP2]], ptr [[AGG_RESULT:%.*]], align 32, 
!tbaa [[TBAA2]]
+// CHECK-NEXT:    store <16 x i16> [[TMP2]], ptr [[AGG_RESULT]], align 32, 
!tbaa [[CHAR_TBAA2]]
 // CHECK-NEXT:    ret void
 //
 v16i16 xvsll_h(v16i16 _1, v...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/154347
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