Author: Pedro Lobo Date: 2025-08-07T13:50:52+01:00 New Revision: f3bf8e01668bfbb32cd17be45507983557b979df
URL: https://github.com/llvm/llvm-project/commit/f3bf8e01668bfbb32cd17be45507983557b979df DIFF: https://github.com/llvm/llvm-project/commit/f3bf8e01668bfbb32cd17be45507983557b979df.diff LOG: [clang][x86] Add C/C++ and 32/64-bit test coverage to constexpr tests (#152478) Adds missing C++ run lines to test files containing `constexpr` tests. Also adds missing 32/64-bit test coverage to the following tests: - `clang/test/CodeGen/X86/avx512-reduceIntrin.c` - `clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c` - `clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c` - `clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c` Additionally, fixes a `_mm512_popcnt_epi64` `constexpr` test that incorrectly assumed 32-bit integers, leading to incorrect bit counts. This change updates the test result to assume 64-bit integers. Added: Modified: clang/test/CodeGen/X86/avx512-reduceIntrin.c clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c Removed: ################################################################################ diff --git a/clang/test/CodeGen/X86/avx512-reduceIntrin.c b/clang/test/CodeGen/X86/avx512-reduceIntrin.c index 0f781fc9aacca..4069b463e3f11 100644 --- a/clang/test/CodeGen/X86/avx512-reduceIntrin.c +++ b/clang/test/CodeGen/X86/avx512-reduceIntrin.c @@ -1,171 +1,174 @@ -// RUN: %clang_cc1 -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> #include "builtin_test_helpers.h" long long test_mm512_reduce_add_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_add_epi64( -// CHECK: call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_add_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_add_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_add_epi64((__m512i)(__v8di){-4, -3, -2, -1, 0, 1, 2, 3}) == -4); long long test_mm512_reduce_mul_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_mul_epi64( -// CHECK: call i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_mul_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_mul_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_mul_epi64((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8}) == 40320); long long test_mm512_reduce_or_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_or_epi64( -// CHECK: call i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_or_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_or_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_or_epi64((__m512i)(__v8di){0x100, 0x200, 0x400, 0x800, 0, 0, 0, 0}) == 0xF00); long long test_mm512_reduce_and_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_and_epi64( -// CHECK: call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_and_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_and_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_and_epi64((__m512i)(__v8di){0xFFFF, 0xFF00, 0x00FF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF00, 0x00FF}) == 0x0000); long long test_mm512_mask_reduce_add_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_add_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_add_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_add_epi64(__M, __W); } long long test_mm512_mask_reduce_mul_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_mul_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_mul_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_mul_epi64(__M, __W); } long long test_mm512_mask_reduce_and_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_and_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_and_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_and_epi64(__M, __W); } long long test_mm512_mask_reduce_or_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_or_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_or_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_or_epi64(__M, __W); } int test_mm512_reduce_add_epi32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_add_epi32( -// CHECK: call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_add_epi32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_add_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_add_epi32((__m512i)(__v16si){-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}) == -8); int test_mm512_reduce_mul_epi32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_mul_epi32( -// CHECK: call i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_mul_epi32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_mul_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_mul_epi32((__m512i)(__v16si){1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 3, 1, 1, -3, 1, 1}) == -36); int test_mm512_reduce_or_epi32(__m512i __W){ -// CHECK: call i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_or_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_or_epi32((__m512i)(__v16si){0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0, 0, 0, 0, 0, 0, 0, 0}) == 0xFF); int test_mm512_reduce_and_epi32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_and_epi32( -// CHECK: call i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_and_epi32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_and_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_and_epi32((__m512i)(__v16si){0xFF, 0xF0, 0x0F, 0xFF, 0xFF, 0xFF, 0xF0, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0x0F, 0x0F}) == 0x00); int test_mm512_mask_reduce_add_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_add_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_add_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_add_epi32(__M, __W); } int test_mm512_mask_reduce_mul_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_mul_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_mul_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_mul_epi32(__M, __W); } int test_mm512_mask_reduce_and_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_and_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_and_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_and_epi32(__M, __W); } int test_mm512_mask_reduce_or_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_or_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_or_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_or_epi32(__M, __W); } double test_mm512_reduce_add_pd(__m512d __W, double ExtraAddOp){ -// CHECK-LABEL: @test_mm512_reduce_add_pd( +// CHECK-LABEL: test_mm512_reduce_add_pd // CHECK-NOT: reassoc -// CHECK: call reassoc double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}}) +// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}}) // CHECK-NOT: reassoc return _mm512_reduce_add_pd(__W) + ExtraAddOp; } double test_mm512_reduce_mul_pd(__m512d __W, double ExtraMulOp){ -// CHECK-LABEL: @test_mm512_reduce_mul_pd( +// CHECK-LABEL: test_mm512_reduce_mul_pd // CHECK-NOT: reassoc -// CHECK: call reassoc double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}}) +// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}}) // CHECK-NOT: reassoc return _mm512_reduce_mul_pd(__W) * ExtraMulOp; } float test_mm512_reduce_add_ps(__m512 __W){ -// CHECK-LABEL: @test_mm512_reduce_add_ps( -// CHECK: call reassoc float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_add_ps +// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}}) return _mm512_reduce_add_ps(__W); } float test_mm512_reduce_mul_ps(__m512 __W){ -// CHECK-LABEL: @test_mm512_reduce_mul_ps( -// CHECK: call reassoc float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_mul_ps +// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}}) return _mm512_reduce_mul_ps(__W); } double test_mm512_mask_reduce_add_pd(__mmask8 __M, __m512d __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_add_pd( +// CHECK-LABEL: test_mm512_mask_reduce_add_pd // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} -// CHECK: call reassoc double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}}) +// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}}) return _mm512_mask_reduce_add_pd(__M, __W); } double test_mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_mul_pd( +// CHECK-LABEL: test_mm512_mask_reduce_mul_pd // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} -// CHECK: call reassoc double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}}) +// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}}) return _mm512_mask_reduce_mul_pd(__M, __W); } float test_mm512_mask_reduce_add_ps(__mmask16 __M, __m512 __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_add_ps( +// CHECK-LABEL: test_mm512_mask_reduce_add_ps // CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> {{.*}} -// CHECK: call reassoc float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}}) +// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}}) return _mm512_mask_reduce_add_ps(__M, __W); } float test_mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_mul_ps( +// CHECK-LABEL: test_mm512_mask_reduce_mul_ps // CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> %{{.*}} -// CHECK: call reassoc float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}}) +// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}}) return _mm512_mask_reduce_mul_ps(__M, __W); } diff --git a/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c b/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c index 4f7b7b0cf9ae3..0110079a007d5 100644 --- a/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c +++ b/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c @@ -1,173 +1,175 @@ -// RUN: %clang_cc1 -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> #include "builtin_test_helpers.h" long long test_mm512_reduce_max_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_max_epi64( -// CHECK: call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_max_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_max_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_max_epi64((__m512i)(__v8di){-4, -3, -2, -1, 0, 1, 2, 3}) == 3); unsigned long long test_mm512_reduce_max_epu64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_max_epu64( -// CHECK: call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_max_epu64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_max_epu64(__W); } TEST_CONSTEXPR(_mm512_reduce_max_epu64((__m512i)(__v8du){0, 1, 2, 3, 4, 5, 6, 7}) == 7); double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){ -// CHECK-LABEL: @test_mm512_reduce_max_pd( +// CHECK-LABEL: test_mm512_reduce_max_pd // CHECK-NOT: nnan -// CHECK: call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}}) +// CHECK: call nnan {{.*}}double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}}) // CHECK-NOT: nnan return _mm512_reduce_max_pd(__W) + ExtraAddOp; } long long test_mm512_reduce_min_epi64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_min_epi64( -// CHECK: call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_min_epi64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_min_epi64(__W); } TEST_CONSTEXPR(_mm512_reduce_min_epi64((__m512i)(__v8di){-4, -3, -2, -1, 0, 1, 2, 3}) == -4); unsigned long long test_mm512_reduce_min_epu64(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_min_epu64( -// CHECK: call i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_min_epu64 +// CHECK: call {{.*}}i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %{{.*}}) return _mm512_reduce_min_epu64(__W); } TEST_CONSTEXPR(_mm512_reduce_min_epu64((__m512i)(__v8du){0, 1, 2, 3, 4, 5, 6, 7}) == 0); double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){ -// CHECK-LABEL: @test_mm512_reduce_min_pd( +// CHECK-LABEL: test_mm512_reduce_min_pd // CHECK-NOT: nnan -// CHECK: call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}}) +// CHECK: call nnan {{.*}}double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}}) // CHECK-NOT: nnan return _mm512_reduce_min_pd(__W) * ExtraMulOp; } long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_max_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_max_epi64(__M, __W); } unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_epu64( +// CHECK-LABEL: test_mm512_mask_reduce_max_epu64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_max_epu64(__M, __W); } double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_pd( +// CHECK-LABEL: test_mm512_mask_reduce_max_pd // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} -// CHECK: call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}}) +// CHECK: call nnan {{.*}}double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}}) return _mm512_mask_reduce_max_pd(__M, __W); } long long test_mm512_mask_reduce_min_epi64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_epi64( +// CHECK-LABEL: test_mm512_mask_reduce_min_epi64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_min_epi64(__M, __W); } unsigned long long test_mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_epu64( +// CHECK-LABEL: test_mm512_mask_reduce_min_epu64 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} -// CHECK: call i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %{{.*}}) +// CHECK: call {{.*}}i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %{{.*}}) return _mm512_mask_reduce_min_epu64(__M, __W); } double test_mm512_mask_reduce_min_pd(__mmask8 __M, __m512d __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_pd( +// CHECK-LABEL: test_mm512_mask_reduce_min_pd // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} -// CHECK: call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}}) +// CHECK: call nnan {{.*}}double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}}) return _mm512_mask_reduce_min_pd(__M, __W); } int test_mm512_reduce_max_epi32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_max_epi32( -// CHECK: call i32 @llvm.vector.reduce.smax.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_max_epi32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.smax.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_max_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_max_epi32((__m512i)(__v16si){-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}) == 7); unsigned int test_mm512_reduce_max_epu32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_max_epu32( -// CHECK: call i32 @llvm.vector.reduce.umax.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_max_epu32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.umax.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_max_epu32(__W); } TEST_CONSTEXPR(_mm512_reduce_max_epu32((__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}) == 15); float test_mm512_reduce_max_ps(__m512 __W){ -// CHECK-LABEL: @test_mm512_reduce_max_ps( -// CHECK: call nnan float @llvm.vector.reduce.fmax.v16f32(<16 x float> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_max_ps +// CHECK: call nnan {{.*}}float @llvm.vector.reduce.fmax.v16f32(<16 x float> %{{.*}}) return _mm512_reduce_max_ps(__W); } int test_mm512_reduce_min_epi32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_min_epi32( -// CHECK: call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_min_epi32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_min_epi32(__W); } TEST_CONSTEXPR(_mm512_reduce_min_epi32((__m512i)(__v16si){-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}) == -8); unsigned int test_mm512_reduce_min_epu32(__m512i __W){ -// CHECK-LABEL: @test_mm512_reduce_min_epu32( -// CHECK: call i32 @llvm.vector.reduce.umin.v16i32(<16 x i32> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_min_epu32 +// CHECK: call {{.*}}i32 @llvm.vector.reduce.umin.v16i32(<16 x i32> %{{.*}}) return _mm512_reduce_min_epu32(__W); } TEST_CONSTEXPR(_mm512_reduce_min_epu32((__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}) == 0); float test_mm512_reduce_min_ps(__m512 __W){ -// CHECK-LABEL: @test_mm512_reduce_min_ps( -// CHECK: call nnan float @llvm.vector.reduce.fmin.v16f32(<16 x float> %{{.*}}) +// CHECK-LABEL: test_mm512_reduce_min_ps +// CHECK: call nnan {{.*}}float @llvm.vector.reduce.fmin.v16f32(<16 x float> %{{.*}}) return _mm512_reduce_min_ps(__W); } int test_mm512_mask_reduce_max_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_max_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.smax.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.smax.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_max_epi32(__M, __W); } unsigned int test_mm512_mask_reduce_max_epu32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_epu32( +// CHECK-LABEL: test_mm512_mask_reduce_max_epu32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.umax.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.umax.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_max_epu32(__M, __W); } float test_mm512_mask_reduce_max_ps(__mmask16 __M, __m512 __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_max_ps( +// CHECK-LABEL: test_mm512_mask_reduce_max_ps // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} -// CHECK: call nnan float @llvm.vector.reduce.fmax.v16f32(<16 x float> %{{.*}}) +// CHECK: call nnan {{.*}}float @llvm.vector.reduce.fmax.v16f32(<16 x float> %{{.*}}) return _mm512_mask_reduce_max_ps(__M, __W); } int test_mm512_mask_reduce_min_epi32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_epi32( +// CHECK-LABEL: test_mm512_mask_reduce_min_epi32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_min_epi32(__M, __W); } unsigned int test_mm512_mask_reduce_min_epu32(__mmask16 __M, __m512i __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_epu32( +// CHECK-LABEL: test_mm512_mask_reduce_min_epu32 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} -// CHECK: call i32 @llvm.vector.reduce.umin.v16i32(<16 x i32> %{{.*}}) +// CHECK: call {{.*}}i32 @llvm.vector.reduce.umin.v16i32(<16 x i32> %{{.*}}) return _mm512_mask_reduce_min_epu32(__M, __W); } float test_mm512_mask_reduce_min_ps(__mmask16 __M, __m512 __W){ -// CHECK-LABEL: @test_mm512_mask_reduce_min_ps( +// CHECK-LABEL: test_mm512_mask_reduce_min_ps // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} -// CHECK: call nnan float @llvm.vector.reduce.fmin.v16f32(<16 x float> %{{.*}}) +// CHECK: call nnan {{.*}}float @llvm.vector.reduce.fmin.v16f32(<16 x float> %{{.*}}) return _mm512_mask_reduce_min_ps(__M, __W); } - diff --git a/clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c b/clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c index ca8f5e482cc56..8927ae273d29b 100644 --- a/clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c +++ b/clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c @@ -1,45 +1,48 @@ -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vpopcntdq -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vpopcntdq -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> #include "builtin_test_helpers.h" __m512i test_mm512_popcnt_epi64(__m512i __A) { - // CHECK-LABEL: @test_mm512_popcnt_epi64 + // CHECK-LABEL: test_mm512_popcnt_epi64 // CHECK: @llvm.ctpop.v8i64 return _mm512_popcnt_epi64(__A); } -TEST_CONSTEXPR(match_v8di(_mm512_popcnt_epi64((__m512i)(__v8di){+5, -3, -10, +8, 0, -256, +256, -128}), 2, 31, 30, 1, 0, 24, 1, 25)); +TEST_CONSTEXPR(match_v8di(_mm512_popcnt_epi64((__m512i)(__v8di){+5, -3, -10, +8, 0, -256, +256, -128}), 2, 63, 62, 1, 0, 56, 1, 57)); __m512i test_mm512_mask_popcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_popcnt_epi64 + // CHECK-LABEL: test_mm512_mask_popcnt_epi64 // CHECK: @llvm.ctpop.v8i64 // CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} return _mm512_mask_popcnt_epi64(__W, __U, __A); } __m512i test_mm512_maskz_popcnt_epi64(__mmask8 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_popcnt_epi64 + // CHECK-LABEL: test_mm512_maskz_popcnt_epi64 // CHECK: @llvm.ctpop.v8i64 // CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}} return _mm512_maskz_popcnt_epi64(__U, __A); } __m512i test_mm512_popcnt_epi32(__m512i __A) { - // CHECK-LABEL: @test_mm512_popcnt_epi32 + // CHECK-LABEL: test_mm512_popcnt_epi32 // CHECK: @llvm.ctpop.v16i32 return _mm512_popcnt_epi32(__A); } TEST_CONSTEXPR(match_v16si(_mm512_popcnt_epi32((__m512i)(__v16si){+5, -3, -10, +8, 0, -256, +256, -128, +3, +9, +15, +33, +63, +129, +511, +1025}), 2, 31, 30, 1, 0, 24, 1, 25, 2, 2, 4, 2, 6, 2, 9, 2)); __m512i test_mm512_mask_popcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_popcnt_epi32 + // CHECK-LABEL: test_mm512_mask_popcnt_epi32 // CHECK: @llvm.ctpop.v16i32 // CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} return _mm512_mask_popcnt_epi32(__W, __U, __A); } __m512i test_mm512_maskz_popcnt_epi32(__mmask16 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_popcnt_epi32 + // CHECK-LABEL: test_mm512_maskz_popcnt_epi32 // CHECK: @llvm.ctpop.v16i32 // CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} return _mm512_maskz_popcnt_epi32(__U, __A); diff --git a/clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c b/clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c index 5d18b68e46905..d9fbd7628142f 100644 --- a/clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c +++ b/clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c @@ -1,87 +1,90 @@ -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vpopcntdq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vpopcntdq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vpopcntdq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> #include "builtin_test_helpers.h" __m128i test_mm_popcnt_epi64(__m128i __A) { - // CHECK-LABEL: @test_mm_popcnt_epi64 + // CHECK-LABEL: test_mm_popcnt_epi64 // CHECK: @llvm.ctpop.v2i64 return _mm_popcnt_epi64(__A); } TEST_CONSTEXPR(match_v2di(_mm_popcnt_epi64((__m128i)(__v2di){+5, -3}), 2, 63)); __m128i test_mm_mask_popcnt_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_popcnt_epi64 + // CHECK-LABEL: test_mm_mask_popcnt_epi64 // CHECK: @llvm.ctpop.v2i64 // CHECK: select <2 x i1> %{{.+}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_popcnt_epi64(__W, __U, __A); } __m128i test_mm_maskz_popcnt_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_popcnt_epi64 + // CHECK-LABEL: test_mm_maskz_popcnt_epi64 // CHECK: @llvm.ctpop.v2i64 // CHECK: select <2 x i1> %{{.+}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_popcnt_epi64(__U, __A); } __m128i test_mm_popcnt_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_popcnt_epi32 + // CHECK-LABEL: test_mm_popcnt_epi32 // CHECK: @llvm.ctpop.v4i32 return _mm_popcnt_epi32(__A); } TEST_CONSTEXPR(match_v4si(_mm_popcnt_epi32((__m128i)(__v4si){+5, -3, -10, +8}), 2, 31, 30, 1)); __m128i test_mm_mask_popcnt_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_popcnt_epi32 + // CHECK-LABEL: test_mm_mask_popcnt_epi32 // CHECK: @llvm.ctpop.v4i32 // CHECK: select <4 x i1> %{{.+}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_popcnt_epi32(__W, __U, __A); } __m128i test_mm_maskz_popcnt_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_popcnt_epi32 + // CHECK-LABEL: test_mm_maskz_popcnt_epi32 // CHECK: @llvm.ctpop.v4i32 // CHECK: select <4 x i1> %{{.+}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_popcnt_epi32(__U, __A); } __m256i test_mm256_popcnt_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_popcnt_epi64 + // CHECK-LABEL: test_mm256_popcnt_epi64 // CHECK: @llvm.ctpop.v4i64 return _mm256_popcnt_epi64(__A); } TEST_CONSTEXPR(match_v4di(_mm256_popcnt_epi64((__m256i)(__v4di){+5, -3, -10, +8}), 2, 63, 62, 1)); __m256i test_mm256_mask_popcnt_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_popcnt_epi64 + // CHECK-LABEL: test_mm256_mask_popcnt_epi64 // CHECK: @llvm.ctpop.v4i64 // CHECK: select <4 x i1> %{{.+}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_popcnt_epi64(__W, __U, __A); } __m256i test_mm256_maskz_popcnt_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_popcnt_epi64 + // CHECK-LABEL: test_mm256_maskz_popcnt_epi64 // CHECK: @llvm.ctpop.v4i64 // CHECK: select <4 x i1> %{{.+}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_popcnt_epi64(__U, __A); } __m256i test_mm256_popcnt_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_popcnt_epi32 + // CHECK-LABEL: test_mm256_popcnt_epi32 // CHECK: @llvm.ctpop.v8i32 return _mm256_popcnt_epi32(__A); } TEST_CONSTEXPR(match_v8si(_mm256_popcnt_epi32((__m256i)(__v8si){+5, -3, -10, +8, 0, -256, +256, -128}), 2, 31, 30, 1, 0, 24, 1, 25)); __m256i test_mm256_mask_popcnt_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_popcnt_epi32 + // CHECK-LABEL: test_mm256_mask_popcnt_epi32 // CHECK: @llvm.ctpop.v8i32 // CHECK: select <8 x i1> %{{.+}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_popcnt_epi32(__W, __U, __A); } __m256i test_mm256_maskz_popcnt_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_popcnt_epi32 + // CHECK-LABEL: test_mm256_maskz_popcnt_epi32 // CHECK: @llvm.ctpop.v8i32 // CHECK: select <8 x i1> %{{.+}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_popcnt_epi32(__U, __A); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
