https://github.com/RolandF77 updated 
https://github.com/llvm/llvm-project/pull/145372

>From fc5226fa4bb20267c4e3ed3c687056461ccfbccb Mon Sep 17 00:00:00 2001
From: Roland Froese <fro...@ca.ibm.com>
Date: Mon, 23 Jun 2025 17:27:46 +0000
Subject: [PATCH 1/4] dmf basic builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def     |  6 ++++++
 clang/lib/CodeGen/TargetBuiltins/PPC.cpp      |  5 +++++
 clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c | 18 +++++++++++++++++-
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 099500754a0e0..7f4dc9fe4f719 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -1146,6 +1146,12 @@ UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4spp,  
"vW1024*W256V", true,
                          "mma,paired-vector-memops")
 UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4spp, "vW1024*W256Vi255i15i15", true,
                          "mma,paired-vector-memops")
+UNALIASED_CUSTOM_BUILTIN(mma_dmsetdmrz, "vW1024*", false,
+                         "mma,paired-vector-memops")
+UNALIASED_CUSTOM_BUILTIN(mma_dmmr, "vW1024*W1024*", false,
+                         "mma,paired-vector-memops")
+UNALIASED_CUSTOM_BUILTIN(mma_dmxor, "vW1024*W1024*", true,
+                         "mma,paired-vector-memops")
 
 // FIXME: Obviously incomplete.
 
diff --git a/clang/lib/CodeGen/TargetBuiltins/PPC.cpp 
b/clang/lib/CodeGen/TargetBuiltins/PPC.cpp
index f9890285f0aab..270e9fc976f23 100644
--- a/clang/lib/CodeGen/TargetBuiltins/PPC.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/PPC.cpp
@@ -1151,6 +1151,11 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned 
BuiltinID,
       Value *Acc = Builder.CreateLoad(Addr);
       CallOps.push_back(Acc);
     }
+    if (BuiltinID == PPC::BI__builtin_mma_dmmr ||
+        BuiltinID == PPC::BI__builtin_mma_dmxor) {
+      Address Addr = EmitPointerWithAlignment(E->getArg(1));
+      Ops[1] = Builder.CreateLoad(Addr);
+    }
     for (unsigned i=1; i<Ops.size(); i++)
       CallOps.push_back(Ops[i]);
     llvm::Function *F = CGM.getIntrinsic(ID);
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c 
b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
index 41f13155847ba..217e85c667968 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
@@ -80,7 +80,7 @@ void test_dmxvi8gerx4spp(unsigned char *vdmrp, unsigned char 
*vpp, vector unsign
 
 // CHECK-LABEL: @test_pmdmxvi8gerx4spp(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 
128, !tbaa [[TBAA6]]
+// CHECK-NEXT:    [[TMP0:%.*]]  = load <1024 x i1>, ptr [[VDMRP:%.*]], align 
128, !tbaa [[TBAA6]]
 // CHECK-NEXT:    [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, 
!tbaa [[TBAA2]]
 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <1024 x i1> 
@llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x 
i8> [[VC:%.*]], i32 0, i32 0, i32 0)
 // CHECK-NEXT:    store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, 
!tbaa [[TBAA6]]
@@ -92,3 +92,19 @@ void test_pmdmxvi8gerx4spp(unsigned char *vdmrp, unsigned 
char *vpp, vector unsi
   __builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0);
   *((__dmr1024 *)resp) = vdmr;
 }
+
+// CHECK-LABEL: @test_dmf_basic
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[TMP0:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmsetdmrz()
+// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmmr(<1024 x 
i1> [[TMP0]])
+// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr %res1, align 128
+// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr %res2, align 128
+// CHECK-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr %p, align 128
+// CHECK-NEXT: [[TMP4:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxor(<1024 
x i1> [[TMP2]], <1024 x i1> [[TMP3]])
+// CHECK-NEXT: store <1024 x i1> [[TMP4]], ptr %res2, align 128
+void test_dmf_basic(char *p, char *res1, char *res2) {
+  __dmr1024 x[2];
+  __builtin_mma_dmsetdmrz(&x[0]);
+  __builtin_mma_dmmr((__dmr1024*)res1, &x[0]);
+  __builtin_mma_dmxor((__dmr1024*)res2, (__dmr1024*)p);
+}

>From 590c260e91727ee2958b60e302e00436faff66a6 Mon Sep 17 00:00:00 2001
From: Roland Froese <fro...@ca.ibm.com>
Date: Mon, 23 Jun 2025 18:45:55 +0000
Subject: [PATCH 2/4] fix added space

---
 clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c 
b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
index 217e85c667968..4aafc09602228 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
@@ -80,7 +80,7 @@ void test_dmxvi8gerx4spp(unsigned char *vdmrp, unsigned char 
*vpp, vector unsign
 
 // CHECK-LABEL: @test_pmdmxvi8gerx4spp(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]]  = load <1024 x i1>, ptr [[VDMRP:%.*]], align 
128, !tbaa [[TBAA6]]
+// CHECK-NEXT:    [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 
128, !tbaa [[TBAA6]]
 // CHECK-NEXT:    [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, 
!tbaa [[TBAA2]]
 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <1024 x i1> 
@llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x 
i8> [[VC:%.*]], i32 0, i32 0, i32 0)
 // CHECK-NEXT:    store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, 
!tbaa [[TBAA6]]

>From 073477505aef698cab98f940ccd2b79d365016eb Mon Sep 17 00:00:00 2001
From: Roland Froese <fro...@ca.ibm.com>
Date: Wed, 9 Jul 2025 18:47:40 +0000
Subject: [PATCH 3/4] address comment

---
 clang/include/clang/Basic/BuiltinsPPC.def | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 7f4dc9fe4f719..c0d41827daf45 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -1147,11 +1147,11 @@ UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4spp,  
"vW1024*W256V", true,
 UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4spp, "vW1024*W256Vi255i15i15", true,
                          "mma,paired-vector-memops")
 UNALIASED_CUSTOM_BUILTIN(mma_dmsetdmrz, "vW1024*", false,
-                         "mma,paired-vector-memops")
+                         "mma,isa-future-instructions")
 UNALIASED_CUSTOM_BUILTIN(mma_dmmr, "vW1024*W1024*", false,
-                         "mma,paired-vector-memops")
+                         "mma,isa-future-instructions")
 UNALIASED_CUSTOM_BUILTIN(mma_dmxor, "vW1024*W1024*", true,
-                         "mma,paired-vector-memops")
+                         "mma,isa-future-instructions")
 
 // FIXME: Obviously incomplete.
 

>From 2f03cc3554fa8a11fe35f559acdb8645f48d5627 Mon Sep 17 00:00:00 2001
From: Roland Froese <fro...@ca.ibm.com>
Date: Mon, 14 Jul 2025 17:46:07 +0000
Subject: [PATCH 4/4] add tests

---
 .../CodeGen/PowerPC/ppc-dmf-future-builtin-err.c  | 15 +++++++++++++++
 ...ma-builtin-err.c => ppc-dmf-mma-builtin-err.c} |  6 ++++++
 2 files changed, 21 insertions(+)
 create mode 100644 clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
 rename clang/test/CodeGen/PowerPC/{ppc-future-mma-builtin-err.c => 
ppc-dmf-mma-builtin-err.c} (75%)

diff --git a/clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c 
b/clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
new file mode 100644
index 0000000000000..9def39f5fa479
--- /dev/null
+++ b/clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
@@ -0,0 +1,15 @@
+// RUN: not %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-cpu pwr10 
\
+// RUN:   %s -emit-llvm-only 2>&1 | FileCheck %s
+
+__attribute__((target("no-mma")))
+void test_mma(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char 
vc) {
+  __dmr1024 vdmr = *((__dmr1024 *)vdmrp);
+  __vector_pair vp = *((__vector_pair *)vpp);
+  __builtin_mma_dmsetdmrz(&vdmr);
+  __builtin_mma_dmmr(&vdmr, (__dmr1024*)vpp);
+  __builtin_mma_dmxor(&vdmr, (__dmr1024*)vpp);
+
+// CHECK: error: '__builtin_mma_dmsetdmrz' needs target feature 
mma,isa-future-instructions
+// CHECK: error: '__builtin_mma_dmmr' needs target feature 
mma,isa-future-instructions
+// CHECK: error: '__builtin_mma_dmxor' needs target feature 
mma,isa-future-instructions
+}
diff --git a/clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c 
b/clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
similarity index 75%
rename from clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c
rename to clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
index 1b8d345ac7ec7..c02274696244a 100644
--- a/clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c
+++ b/clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
@@ -11,6 +11,9 @@ void test_mma(unsigned char *vdmrp, unsigned char *vpp, 
vector unsigned char vc)
   __builtin_mma_pmdmxvi8gerx4pp(&vdmr, vp, vc, 0, 0, 0);
   __builtin_mma_dmxvi8gerx4spp(&vdmr, vp, vc);
   __builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0);
+  __builtin_mma_dmsetdmrz(&vdmr);
+  __builtin_mma_dmmr(&vdmr, (__dmr1024*)vpp);
+  __builtin_mma_dmxor(&vdmr, (__dmr1024*)vpp);
 
 // CHECK: error: '__builtin_mma_dmxvi8gerx4' needs target feature 
mma,paired-vector-memops
 // CHECK: error: '__builtin_mma_pmdmxvi8gerx4' needs target feature 
mma,paired-vector-memops
@@ -18,4 +21,7 @@ void test_mma(unsigned char *vdmrp, unsigned char *vpp, 
vector unsigned char vc)
 // CHECK: error: '__builtin_mma_pmdmxvi8gerx4pp' needs target feature 
mma,paired-vector-memops
 // CHECK: error: '__builtin_mma_dmxvi8gerx4spp' needs target feature 
mma,paired-vector-memops
 // CHECK: error: '__builtin_mma_pmdmxvi8gerx4spp' needs target feature 
mma,paired-vector-memops
+// CHECK: error: '__builtin_mma_dmsetdmrz' needs target feature 
mma,isa-future-instructions
+// CHECK: error: '__builtin_mma_dmmr' needs target feature 
mma,isa-future-instructions
+// CHECK: error: '__builtin_mma_dmxor' needs target feature 
mma,isa-future-instructions
 }

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