================
@@ -2925,6 +2925,49 @@ bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr,
SDValue &Base,
return true;
}
+/// Similar to SelectAddrRegImm, except that the offset restricted for
+/// unsinged nine bits.
+bool RISCVDAGToDAGISel::SelectAddrRegImm9(SDValue Addr, SDValue &Base,
+ SDValue &Offset) {
+ if (SelectAddrFrameIndex(Addr, Base, Offset))
+ return true;
+
+ SDLoc DL(Addr);
+ MVT VT = Addr.getSimpleValueType();
+
+ if (CurDAG->isBaseWithConstantOffset(Addr)) {
+ int64_t CVal = cast<ConstantSDNode>(Addr.getOperand(1))->getSExtValue();
+ if (isUInt<9>(CVal)) {
+ Base = Addr.getOperand(0);
+
+ if (auto *FIN = dyn_cast<FrameIndexSDNode>(Base))
+ Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), VT);
+ Offset = CurDAG->getSignedTargetConstant(CVal, DL, VT);
+ return true;
+ }
+
+ // Handle with 12 bit offset with sign bit off with ADDI.
+ // For Immediate Range [0, 2047]
+ else if (Addr.getOpcode() == ISD::ADD &&
----------------
mshockwave wrote:
nit: sorry this just looks a bit odd, could you move the comment into the `else
if` body and move `else if` up to line 2947
https://github.com/llvm/llvm-project/pull/145647
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