Author: Henrich Lauko Date: 2025-06-06T09:58:13+02:00 New Revision: f10c7d9f5ace5dc55918ac3b86a2b06b0e358735
URL: https://github.com/llvm/llvm-project/commit/f10c7d9f5ace5dc55918ac3b86a2b06b0e358735 DIFF: https://github.com/llvm/llvm-project/commit/f10c7d9f5ace5dc55918ac3b86a2b06b0e358735.diff LOG: [CIR][NFC] Use `getType()` instead of more verbose `getResult().getType()` (#143024) This mirrors incubator changes from https://github.com/llvm/clangir/pull/1662 Added: Modified: clang/include/clang/CIR/Dialect/IR/CIROps.td clang/lib/CIR/Dialect/IR/CIRDialect.cpp clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp Removed: ################################################################################ diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td index 00878f7dd8ed7..bd847731193ab 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIROps.td +++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td @@ -1778,11 +1778,6 @@ def GetMemberOp : CIR_Op<"get_member"> { /// Return the record type pointed by the base pointer. cir::PointerType getAddrTy() { return getAddr().getType(); } - - /// Return the result type. - cir::PointerType getResultTy() { - return getResult().getType(); - } }]; let hasVerifier = 1; diff --git a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp index 5f2efa3fd84af..d7999f59bd021 100644 --- a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp @@ -290,7 +290,7 @@ LogicalResult cir::ContinueOp::verify() { //===----------------------------------------------------------------------===// LogicalResult cir::CastOp::verify() { - mlir::Type resType = getResult().getType(); + mlir::Type resType = getType(); mlir::Type srcType = getSrc().getType(); if (mlir::isa<cir::VectorType>(srcType) && @@ -448,7 +448,7 @@ static Value tryFoldCastChain(cir::CastOp op) { } OpFoldResult cir::CastOp::fold(FoldAdaptor adaptor) { - if (getSrc().getType() == getResult().getType()) { + if (getSrc().getType() == getType()) { switch (getKind()) { case cir::CastKind::integral: { // TODO: for sign diff erences, it's possible in certain conditions to @@ -1450,7 +1450,7 @@ LogicalResult cir::ShiftOp::verify() { if (op0VecTy.getSize() != op1VecTy.getSize()) return emitOpError() << "input vector types must have the same size"; - auto opResultTy = mlir::dyn_cast<cir::VectorType>(getResult().getType()); + auto opResultTy = mlir::dyn_cast<cir::VectorType>(getType()); if (!opResultTy) return emitOpError() << "the type of the result must be a vector " << "if it is vector shift"; @@ -1523,7 +1523,7 @@ LogicalResult cir::GetMemberOp::verify() { if (recordTy.getMembers().size() <= getIndex()) return emitError() << "member index out of bounds"; - if (recordTy.getMembers()[getIndex()] != getResultTy().getPointee()) + if (recordTy.getMembers()[getIndex()] != getType().getPointee()) return emitError() << "member type mismatch"; return mlir::success(); @@ -1537,7 +1537,7 @@ LogicalResult cir::VecCreateOp::verify() { // Verify that the number of arguments matches the number of elements in the // vector, and that the type of all the arguments matches the type of the // elements in the vector. - const VectorType vecTy = getResult().getType(); + const cir::VectorType vecTy = getType(); if (getElements().size() != vecTy.getSize()) { return emitOpError() << "operand count of " << getElements().size() << " doesn't match vector type " << vecTy diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp index 20b086ffdd850..2550c369a9277 100644 --- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp @@ -74,7 +74,7 @@ bool cir::LoadOp::canUsesBeRemoved( return false; Value blockingUse = (*blockingUses.begin())->get(); return blockingUse == slot.ptr && getAddr() == slot.ptr && - getResult().getType() == slot.elemType; + getType() == slot.elemType; } DeletionKind cir::LoadOp::removeBlockingUses( diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index 8059836db6b71..977c8912c1d11 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -105,7 +105,7 @@ static mlir::Value emitFromMemory(mlir::ConversionPatternRewriter &rewriter, cir::LoadOp op, mlir::Value value) { // TODO(cir): Handle other types similarly to clang's codegen EmitFromMemory - if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getResult().getType())) { + if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getType())) { // Create a cast value from specified size in datalayout to i1 assert(value.getType().isInteger(dataLayout.getTypeSizeInBits(boolTy))); return createIntCast(rewriter, value, rewriter.getI1Type()); @@ -456,7 +456,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( } case cir::CastKind::integral: { mlir::Type srcType = castOp.getSrc().getType(); - mlir::Type dstType = castOp.getResult().getType(); + mlir::Type dstType = castOp.getType(); mlir::Value llvmSrcVal = adaptor.getOperands().front(); mlir::Type llvmDstType = getTypeConverter()->convertType(dstType); cir::IntType srcIntType = @@ -471,11 +471,10 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( } case cir::CastKind::floating: { mlir::Value llvmSrcVal = adaptor.getOperands().front(); - mlir::Type llvmDstTy = - getTypeConverter()->convertType(castOp.getResult().getType()); + mlir::Type llvmDstTy = getTypeConverter()->convertType(castOp.getType()); mlir::Type srcTy = elementTypeIfVector(castOp.getSrc().getType()); - mlir::Type dstTy = elementTypeIfVector(castOp.getResult().getType()); + mlir::Type dstTy = elementTypeIfVector(castOp.getType()); if (!mlir::isa<cir::CIRFPTypeInterface>(dstTy) || !mlir::isa<cir::CIRFPTypeInterface>(srcTy)) @@ -563,8 +562,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( mlir::Type dstTy = castOp.getType(); mlir::Value llvmSrcVal = adaptor.getOperands().front(); mlir::Type llvmDstTy = getTypeConverter()->convertType(dstTy); - if (mlir::cast<cir::IntType>( - elementTypeIfVector(castOp.getResult().getType())) + if (mlir::cast<cir::IntType>(elementTypeIfVector(castOp.getType())) .isSigned()) rewriter.replaceOpWithNewOp<mlir::LLVM::FPToSIOp>(castOp, llvmDstTy, llvmSrcVal); @@ -681,8 +679,8 @@ mlir::LogicalResult CIRToLLVMAllocaOpLowering::matchAndRewrite( op.getLoc(), typeConverter->convertType(rewriter.getIndexType()), 1); mlir::Type elementTy = convertTypeForMemory(*getTypeConverter(), dataLayout, op.getAllocaType()); - mlir::Type resultTy = convertTypeForMemory(*getTypeConverter(), dataLayout, - op.getResult().getType()); + mlir::Type resultTy = + convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType()); assert(!cir::MissingFeatures::addressSpace()); assert(!cir::MissingFeatures::opAllocaAnnotations()); @@ -754,8 +752,8 @@ mlir::LogicalResult CIRToLLVMCallOpLowering::matchAndRewrite( mlir::LogicalResult CIRToLLVMLoadOpLowering::matchAndRewrite( cir::LoadOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { - const mlir::Type llvmTy = convertTypeForMemory( - *getTypeConverter(), dataLayout, op.getResult().getType()); + const mlir::Type llvmTy = + convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType()); assert(!cir::MissingFeatures::opLoadStoreMemOrder()); std::optional<size_t> opAlign = op.getAlignment(); unsigned alignment = _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
