https://github.com/xlauko created https://github.com/llvm/llvm-project/pull/143024
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1662 >From 38c7e537b64329bdb8595653bc97e006d7846bfb Mon Sep 17 00:00:00 2001 From: xlauko <xla...@mail.muni.cz> Date: Thu, 5 Jun 2025 21:39:49 +0200 Subject: [PATCH] [CIR][NFC] Use `getType()` instead of more verbose `getResult().getType()` This mirrors incubator changes from https://github.com/llvm/clangir/pull/1662 --- clang/include/clang/CIR/Dialect/IR/CIROps.td | 5 ----- clang/lib/CIR/Dialect/IR/CIRDialect.cpp | 10 +++++----- clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 2 +- .../CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | 20 +++++++++---------- 4 files changed, 15 insertions(+), 22 deletions(-) diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td index 5ce03c19369cb..e93eab5a79e11 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIROps.td +++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td @@ -1759,11 +1759,6 @@ def GetMemberOp : CIR_Op<"get_member"> { /// Return the record type pointed by the base pointer. cir::PointerType getAddrTy() { return getAddr().getType(); } - - /// Return the result type. - cir::PointerType getResultTy() { - return getResult().getType(); - } }]; let hasVerifier = 1; diff --git a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp index 9e2b2908b22d8..e8f9ffc47c32b 100644 --- a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp @@ -286,7 +286,7 @@ LogicalResult cir::ContinueOp::verify() { //===----------------------------------------------------------------------===// LogicalResult cir::CastOp::verify() { - const mlir::Type resType = getResult().getType(); + const mlir::Type resType = getType(); const mlir::Type srcType = getSrc().getType(); switch (getKind()) { @@ -436,7 +436,7 @@ static Value tryFoldCastChain(cir::CastOp op) { } OpFoldResult cir::CastOp::fold(FoldAdaptor adaptor) { - if (getSrc().getType() == getResult().getType()) { + if (getSrc().getType() == getType()) { switch (getKind()) { case cir::CastKind::integral: { // TODO: for sign differences, it's possible in certain conditions to @@ -1435,7 +1435,7 @@ LogicalResult cir::ShiftOp::verify() { if (op0VecTy.getSize() != op1VecTy.getSize()) return emitOpError() << "input vector types must have the same size"; - auto opResultTy = mlir::dyn_cast<cir::VectorType>(getResult().getType()); + auto opResultTy = mlir::dyn_cast<cir::VectorType>(getType()); if (!opResultTy) return emitOpError() << "the type of the result must be a vector " << "if it is vector shift"; @@ -1508,7 +1508,7 @@ LogicalResult cir::GetMemberOp::verify() { if (recordTy.getMembers().size() <= getIndex()) return emitError() << "member index out of bounds"; - if (recordTy.getMembers()[getIndex()] != getResultTy().getPointee()) + if (recordTy.getMembers()[getIndex()] != getType().getPointee()) return emitError() << "member type mismatch"; return mlir::success(); @@ -1522,7 +1522,7 @@ LogicalResult cir::VecCreateOp::verify() { // Verify that the number of arguments matches the number of elements in the // vector, and that the type of all the arguments matches the type of the // elements in the vector. - const VectorType vecTy = getResult().getType(); + const cir::VectorType vecTy = getType(); if (getElements().size() != vecTy.getSize()) { return emitOpError() << "operand count of " << getElements().size() << " doesn't match vector type " << vecTy diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp index 20b086ffdd850..2550c369a9277 100644 --- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp @@ -74,7 +74,7 @@ bool cir::LoadOp::canUsesBeRemoved( return false; Value blockingUse = (*blockingUses.begin())->get(); return blockingUse == slot.ptr && getAddr() == slot.ptr && - getResult().getType() == slot.elemType; + getType() == slot.elemType; } DeletionKind cir::LoadOp::removeBlockingUses( diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index d30c85d572fed..a3c57f516a23c 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -105,7 +105,7 @@ static mlir::Value emitFromMemory(mlir::ConversionPatternRewriter &rewriter, cir::LoadOp op, mlir::Value value) { // TODO(cir): Handle other types similarly to clang's codegen EmitFromMemory - if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getResult().getType())) { + if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getType())) { // Create a cast value from specified size in datalayout to i1 assert(value.getType().isInteger(dataLayout.getTypeSizeInBits(boolTy))); return createIntCast(rewriter, value, rewriter.getI1Type()); @@ -424,7 +424,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( } case cir::CastKind::integral: { mlir::Type srcType = castOp.getSrc().getType(); - mlir::Type dstType = castOp.getResult().getType(); + mlir::Type dstType = castOp.getType(); mlir::Value llvmSrcVal = adaptor.getOperands().front(); mlir::Type llvmDstType = getTypeConverter()->convertType(dstType); cir::IntType srcIntType = @@ -439,11 +439,10 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( } case cir::CastKind::floating: { mlir::Value llvmSrcVal = adaptor.getOperands().front(); - mlir::Type llvmDstTy = - getTypeConverter()->convertType(castOp.getResult().getType()); + mlir::Type llvmDstTy = getTypeConverter()->convertType(castOp.getType()); mlir::Type srcTy = elementTypeIfVector(castOp.getSrc().getType()); - mlir::Type dstTy = elementTypeIfVector(castOp.getResult().getType()); + mlir::Type dstTy = elementTypeIfVector(castOp.getType()); if (!mlir::isa<cir::CIRFPTypeInterface>(dstTy) || !mlir::isa<cir::CIRFPTypeInterface>(srcTy)) @@ -531,8 +530,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite( mlir::Type dstTy = castOp.getType(); mlir::Value llvmSrcVal = adaptor.getOperands().front(); mlir::Type llvmDstTy = getTypeConverter()->convertType(dstTy); - if (mlir::cast<cir::IntType>( - elementTypeIfVector(castOp.getResult().getType())) + if (mlir::cast<cir::IntType>(elementTypeIfVector(castOp.getType())) .isSigned()) rewriter.replaceOpWithNewOp<mlir::LLVM::FPToSIOp>(castOp, llvmDstTy, llvmSrcVal); @@ -649,8 +647,8 @@ mlir::LogicalResult CIRToLLVMAllocaOpLowering::matchAndRewrite( op.getLoc(), typeConverter->convertType(rewriter.getIndexType()), 1); mlir::Type elementTy = convertTypeForMemory(*getTypeConverter(), dataLayout, op.getAllocaType()); - mlir::Type resultTy = convertTypeForMemory(*getTypeConverter(), dataLayout, - op.getResult().getType()); + mlir::Type resultTy = + convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType()); assert(!cir::MissingFeatures::addressSpace()); assert(!cir::MissingFeatures::opAllocaAnnotations()); @@ -722,8 +720,8 @@ mlir::LogicalResult CIRToLLVMCallOpLowering::matchAndRewrite( mlir::LogicalResult CIRToLLVMLoadOpLowering::matchAndRewrite( cir::LoadOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { - const mlir::Type llvmTy = convertTypeForMemory( - *getTypeConverter(), dataLayout, op.getResult().getType()); + const mlir::Type llvmTy = + convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType()); assert(!cir::MissingFeatures::opLoadStoreMemOrder()); std::optional<size_t> opAlign = op.getAlignment(); unsigned alignment = _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
