================
@@ -159,6 +159,107 @@ struct SimplifySelect : public OpRewritePattern<SelectOp>
{
}
};
+/// Simplify `cir.switch` operations by folding cascading cases
+/// into a single `cir.case` with the `anyof` kind.
+///
+/// This pattern identifies cascading cases within a `cir.switch` operation.
+/// Cascading cases are defined as consecutive `cir.case` operations of kind
+/// `equal`, each containing a single `cir.yield` operation in their body.
+///
+/// The pattern merges these cascading cases into a single `cir.case` operation
+/// with kind `anyof`, aggregating all the case values.
+///
+/// The merging process continues until a `cir.case` with a different body
+/// (e.g., containing `cir.break` or compound stmt) is encountered, which
+/// breaks the chain.
+///
+/// Example:
+///
+/// Before:
+/// cir.case equal, [#cir.int<0> : !s32i] {
+/// cir.yield
+/// }
+/// cir.case equal, [#cir.int<1> : !s32i] {
+/// cir.yield
+/// }
+/// cir.case equal, [#cir.int<2> : !s32i] {
+/// cir.break
+/// }
+///
+/// After applying SimplifySwitch:
+/// cir.case anyof, [#cir.int<0> : !s32i, #cir.int<1> : !s32i, #cir.int<2> :
+/// !s32i] {
+/// cir.break
+/// }
+struct SimplifySwitch : public OpRewritePattern<SwitchOp> {
+ using OpRewritePattern<SwitchOp>::OpRewritePattern;
+ LogicalResult matchAndRewrite(SwitchOp op,
+ PatternRewriter &rewriter) const override {
+
+ LogicalResult changed = mlir::failure();
+ llvm::SmallVector<CaseOp, 8> cases;
+ SmallVector<CaseOp, 4> cascadingCases;
+ SmallVector<mlir::Attribute, 4> cascadingCaseValues;
+
+ op.collectCases(cases);
+ if (cases.empty())
+ return mlir::failure();
+
+ auto flushMergedOps = [&]() {
+ for (CaseOp &c : cascadingCases) {
+ rewriter.eraseOp(c);
+ }
----------------
bcardosolopes wrote:
Curly braces not necessary here.
https://github.com/llvm/llvm-project/pull/140649
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