Author: Jessica Clarke Date: 2025-05-14T21:51:56+01:00 New Revision: 864f0ff4efc220609764a3075c289b395dc9b907
URL: https://github.com/llvm/llvm-project/commit/864f0ff4efc220609764a3075c289b395dc9b907 DIFF: https://github.com/llvm/llvm-project/commit/864f0ff4efc220609764a3075c289b395dc9b907.diff LOG: [clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (#132489) Thread-local globals live, by default, in the default globals address space, which may not be 0, so we need to overload @llvm.thread.pointer to support other address spaces, and use the default globals address space in Clang. Added: Modified: clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-arm64.c clang/test/CodeGen/builtins-wasm.c llvm/docs/LangRef.rst llvm/include/llvm/IR/Intrinsics.td llvm/lib/IR/AutoUpgrade.cpp llvm/lib/IR/Verifier.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp llvm/test/Assembler/autoupgrade-thread-pointer.ll llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll llvm/test/Transforms/SafeStack/AArch64/abi.ll llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll llvm/test/Transforms/SafeStack/AArch64/unreachable.ll llvm/unittests/Transforms/Vectorize/VPlanTest.cpp Removed: ################################################################################ diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 4fdf2113cb9dc..48cfbda12b2ac 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -6115,8 +6115,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_thread_pointer: { if (!getContext().getTargetInfo().isTLSSupported()) CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); - // Fall through - it's already mapped to the intrinsic by ClangBuiltin. - break; + + return RValue::get(Builder.CreateIntrinsic(llvm::Intrinsic::thread_pointer, + {GlobalsInt8PtrTy}, {})); } case Builtin::BI__builtin_os_log_format: return emitBuiltinOSLogFormat(*E); diff --git a/clang/test/CodeGen/builtins-arm64.c b/clang/test/CodeGen/builtins-arm64.c index 0913295b0c5f5..86c2812434643 100644 --- a/clang/test/CodeGen/builtins-arm64.c +++ b/clang/test/CodeGen/builtins-arm64.c @@ -10,7 +10,7 @@ void f0(void *a, void *b) { void *tp (void) { return __builtin_thread_pointer (); -// CHECK-LINUX: call {{.*}} @llvm.thread.pointer() +// CHECK-LINUX: call {{.*}} @llvm.thread.pointer.p0() } // CHECK: call {{.*}} @llvm.bitreverse.i32(i32 %a) diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index 4a44a9a88df11..d8aff82b0c140 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -749,5 +749,5 @@ int externref_is_null(__externref_t arg) { void *tp (void) { return __builtin_thread_pointer (); - // WEBASSEMBLY: call {{.*}} @llvm.thread.pointer() + // WEBASSEMBLY: call {{.*}} @llvm.thread.pointer.p0() } diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst index 5f14726c36672..4218c28ce0c2c 100644 --- a/llvm/docs/LangRef.rst +++ b/llvm/docs/LangRef.rst @@ -3133,6 +3133,9 @@ as follows: program memory space defaults to the default address space of 0, which corresponds to a Von Neumann architecture that has code and data in the same space. + +.. _globals_addrspace: + ``G<address space>`` Specifies the address space to be used by default when creating global variables. If omitted, the globals address space defaults to the default @@ -15061,7 +15064,8 @@ Syntax: :: - declare ptr @llvm.thread.pointer() + declare ptr @llvm.thread.pointer.p0() + declare ptr addrspace(5) @llvm.thread.pointer.p5() Overview: """"""""" @@ -15078,7 +15082,8 @@ specific: it may point to the start of TLS area, to the end, or somewhere in the middle. Depending on the target, this intrinsic may read a register, call a helper function, read from an alternate memory space, or perform other operations necessary to locate the TLS area. Not all targets support -this intrinsic. +this intrinsic. The address space must be the :ref:`globals address space +<globals_addrspace>`. '``llvm.call.preallocated.setup``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td index 28450f03b7619..e1a135a5ad48e 100644 --- a/llvm/include/llvm/IR/Intrinsics.td +++ b/llvm/include/llvm/IR/Intrinsics.td @@ -903,7 +903,7 @@ def int_stackrestore : DefaultAttrsIntrinsic<[], [llvm_anyptr_ty]>, def int_get_dynamic_area_offset : DefaultAttrsIntrinsic<[llvm_anyint_ty]>; -def int_thread_pointer : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>, +def int_thread_pointer : DefaultAttrsIntrinsic<[llvm_anyptr_ty], [], [IntrNoMem]>, ClangBuiltin<"__builtin_thread_pointer">; // IntrInaccessibleMemOrArgMemOnly is a little more pessimistic than strictly diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index 8717cd092b0b5..acbc6ca678ccf 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -646,8 +646,8 @@ static bool upgradeArmOrAarch64IntrinsicFunction(bool IsArm, Function *F, if (Name == "thread.pointer") { // '(arm|aarch64).thread.pointer'. - NewFn = Intrinsic::getOrInsertDeclaration(F->getParent(), - Intrinsic::thread_pointer); + NewFn = Intrinsic::getOrInsertDeclaration( + F->getParent(), Intrinsic::thread_pointer, F->getReturnType()); return true; } @@ -1475,6 +1475,14 @@ static bool upgradeIntrinsicFunction1(Function *F, Function *&NewFn, } break; + case 't': + if (Name == "thread.pointer") { + NewFn = Intrinsic::getDeclaration( + F->getParent(), Intrinsic::thread_pointer, F->getReturnType()); + return true; + } + break; + case 'v': { if (Name == "var.annotation" && F->arg_size() == 4) { rename(F); diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index 7979e197a8de6..73b4274a41ee6 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -6553,6 +6553,14 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) { &Call); break; } + case Intrinsic::thread_pointer: { + Check(Call.getType()->getPointerAddressSpace() == + DL.getDefaultGlobalsAddressSpace(), + "llvm.thread.pointer intrinsic return type must be for the globals " + "address space", + &Call); + break; + } case Intrinsic::threadlocal_address: { const Value &Arg0 = *Call.getArgOperand(0); Check(isa<GlobalValue>(Arg0), diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 13fb6a32233fe..d55c3abcf4347 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -28169,8 +28169,8 @@ bool AArch64TargetLowering::shouldNormalizeToSelectSequence(LLVMContext &, static Value *UseTlsOffset(IRBuilderBase &IRB, unsigned Offset) { Module *M = IRB.GetInsertBlock()->getParent()->getParent(); - Function *ThreadPointerFunc = - Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer); + Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration( + M, Intrinsic::thread_pointer, IRB.getPtrTy()); return IRB.CreatePointerCast( IRB.CreateConstGEP1_32(IRB.getInt8Ty(), IRB.CreateCall(ThreadPointerFunc), Offset), diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 04dcbfdc3bd77..96b09d0949b30 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -23431,8 +23431,8 @@ bool RISCVTargetLowering::preferScalarizeSplat(SDNode *N) const { static Value *useTpOffset(IRBuilderBase &IRB, unsigned Offset) { Module *M = IRB.GetInsertBlock()->getModule(); - Function *ThreadPointerFunc = - Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer); + Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration( + M, Intrinsic::thread_pointer, IRB.getPtrTy()); return IRB.CreateConstGEP1_32(IRB.getInt8Ty(), IRB.CreateCall(ThreadPointerFunc), Offset); } diff --git a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp index de84a76ede7ff..511c15555fa83 100644 --- a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp +++ b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp @@ -290,8 +290,9 @@ Value *getAndroidSlotPtr(IRBuilder<> &IRB, int Slot) { Module *M = IRB.GetInsertBlock()->getParent()->getParent(); // Android provides a fixed TLS slot for sanitizers. See TLS_SLOT_SANITIZER // in Bionic's libc/private/bionic_tls.h. - Function *ThreadPointerFunc = - Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer); + Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration( + M, Intrinsic::thread_pointer, + IRB.getPtrTy(M->getDataLayout().getDefaultGlobalsAddressSpace())); return IRB.CreateConstGEP1_32(IRB.getInt8Ty(), IRB.CreateCall(ThreadPointerFunc), 8 * Slot); } diff --git a/llvm/test/Assembler/autoupgrade-thread-pointer.ll b/llvm/test/Assembler/autoupgrade-thread-pointer.ll index b1ed15a7e4ef8..178e31f50b1bf 100644 --- a/llvm/test/Assembler/autoupgrade-thread-pointer.ll +++ b/llvm/test/Assembler/autoupgrade-thread-pointer.ll @@ -6,14 +6,14 @@ declare ptr @llvm.arm.thread.pointer() define ptr @test1() { ; CHECK-LABEL: define ptr @test1() -; CHECK: call ptr @llvm.thread.pointer() +; CHECK: call ptr @llvm.thread.pointer.p0() %1 = call ptr @llvm.aarch64.thread.pointer() ret ptr %1 } define ptr @test2() { ; CHECK-LABEL: define ptr @test2() -; CHECK: call ptr @llvm.thread.pointer() +; CHECK: call ptr @llvm.thread.pointer.p0() %1 = call ptr @llvm.arm.thread.pointer() ret ptr %1 } diff --git a/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll b/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll index 3eed6d45c7710..132caef3763ec 100644 --- a/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll +++ b/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll @@ -23,7 +23,7 @@ entry: ; INSTR-LABEL: define void @OneVar( ; INSTR: [[BASE:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0) -; INSTR: [[TLS:%.*]] = call ptr @llvm.thread.pointer() +; INSTR: [[TLS:%.*]] = call ptr @llvm.thread.pointer.p0() ; INSTR: [[TLS_SLOT:%.*]] = getelementptr i8, ptr [[TLS]], i32 -24 ; INSTR: [[TLS_VALUE:%.*]] = load i64, ptr [[TLS_SLOT]], align 8 ; INSTR: [[FP:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll index 51d34ce5b3882..9064d5ca8df4e 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll @@ -9,7 +9,7 @@ declare void @use(ptr, ptr) define void @test_alloca() sanitize_hwaddress { ; CHECK-LABEL: define void @test_alloca ; CHECK-SAME: () #[[ATTR0:[0-9]+]] { -; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll index 9e9ed50d35daf..aae2946cbb190 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll @@ -11,7 +11,7 @@ declare void @use32(ptr) define void @test_alloca() sanitize_hwaddress { ; CHECK-LABEL: define void @test_alloca ; CHECK-SAME: () #[[ATTR0:[0-9]+]] { -; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll index 0ef09321e41ad..9ef624c0b7f75 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll @@ -12,7 +12,7 @@ define void @test_alloca() sanitize_hwaddress { ; CHECK-LABEL: define void @test_alloca ; CHECK-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll index 9e9fceb5eb472..50ce490f297bc 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll @@ -18,7 +18,7 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 { ; CHECK-LABEL: define void @test ; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll index 1698592bafc62..4e7c021bd7f97 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll @@ -88,7 +88,7 @@ define void @test_alloca() sanitize_hwaddress { ; CHECK-LABEL: define void @test_alloca ; CHECK-SAME: () #[[ATTR0]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 @@ -134,7 +134,7 @@ define void @test_alloca() sanitize_hwaddress { ; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca ; NOIFUNC-TLS-HISTORY-SAME: () #[[ATTR0]] { ; NOIFUNC-TLS-HISTORY-NEXT: entry: -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0() ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll index 62fd7a1671569..57d37ca1ef95a 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll @@ -12,7 +12,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress { ; CHECK-LABEL: define dso_local noundef i1 @_Z6targetv ; CHECK-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() +; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll index 16e6cda59a616..e30b51890e172 100644 --- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll @@ -65,7 +65,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @standard_lifetime( -; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -117,7 +117,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @standard_lifetime( -; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -167,7 +167,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime( -; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -222,7 +222,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime( -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -346,7 +346,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone( -; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -398,7 +398,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone( -; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -448,7 +448,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone( -; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -503,7 +503,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime_optnone( -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -617,7 +617,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @multiple_lifetimes( -; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -663,7 +663,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes( -; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -709,7 +709,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes( -; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -758,7 +758,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes( -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -877,7 +877,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress { ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @unreachable_exit( -; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -934,7 +934,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress { ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @unreachable_exit( -; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -990,7 +990,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress { ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit( -; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -1050,7 +1050,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress { ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit( -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -1185,7 +1185,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress { ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @diamond_lifetime( -; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -1246,7 +1246,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress { ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @diamond_lifetime( -; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -1298,7 +1298,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress { ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime( -; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 @@ -1362,7 +1362,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress { ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime( -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 diff --git a/llvm/test/Transforms/SafeStack/AArch64/abi.ll b/llvm/test/Transforms/SafeStack/AArch64/abi.ll index 6d4ca03096825..70e1ba605c1d6 100644 --- a/llvm/test/Transforms/SafeStack/AArch64/abi.ll +++ b/llvm/test/Transforms/SafeStack/AArch64/abi.ll @@ -4,7 +4,7 @@ define void @foo() nounwind uwtable safestack { entry: -; CHECK: %[[TP:.*]] = call ptr @llvm.thread.pointer() +; CHECK: %[[TP:.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK: %[[SPA0:.*]] = getelementptr i8, ptr %[[TP]], i32 72 ; CHECK: %[[USP:.*]] = load ptr, ptr %[[SPA0]] ; CHECK: %[[USST:.*]] = getelementptr i8, ptr %[[USP]], i32 -16 diff --git a/llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll b/llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll index 282d8c4390b65..43fb2605ff646 100644 --- a/llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll +++ b/llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll @@ -6,9 +6,9 @@ define void @foo() nounwind uwtable safestack sspreq { entry: ; The first @llvm.thread.pointer is for the unsafe stack pointer, skip it. -; TLS: call ptr @llvm.thread.pointer() +; TLS: call ptr @llvm.thread.pointer.p0() -; TLS: %[[TP2:.*]] = call ptr @llvm.thread.pointer() +; TLS: %[[TP2:.*]] = call ptr @llvm.thread.pointer.p0() ; ANDROID: %[[B:.*]] = getelementptr i8, ptr %[[TP2]], i32 40 ; FUCHSIA: %[[B:.*]] = getelementptr i8, ptr %[[TP2]], i32 -16 ; TLS: %[[StackGuard:.*]] = load ptr, ptr %[[B]] diff --git a/llvm/test/Transforms/SafeStack/AArch64/unreachable.ll b/llvm/test/Transforms/SafeStack/AArch64/unreachable.ll index 23fd3bf9d8f21..befdc634b73e5 100644 --- a/llvm/test/Transforms/SafeStack/AArch64/unreachable.ll +++ b/llvm/test/Transforms/SafeStack/AArch64/unreachable.ll @@ -3,7 +3,7 @@ define void @foo() nounwind uwtable safestack { entry: -; CHECK: %[[TP:.*]] = call ptr @llvm.thread.pointer() +; CHECK: %[[TP:.*]] = call ptr @llvm.thread.pointer.p0() ; CHECK: %[[SPA0:.*]] = getelementptr i8, ptr %[[TP]], i32 72 ; CHECK: %[[USP:.*]] = load ptr, ptr %[[SPA0]] ; CHECK: %[[USST:.*]] = getelementptr i8, ptr %[[USP]], i32 -16 diff --git a/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp b/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp index eec7b4480b75d..f0d943fe8f304 100644 --- a/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp +++ b/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp @@ -1247,8 +1247,9 @@ TEST_F(VPRecipeTest, MayHaveSideEffectsAndMayReadWriteMemory) { { // Test for a call to a function without side-effects. Module M("", C); + PointerType *PtrTy = PointerType::get(C, 0); Function *TheFn = - Intrinsic::getOrInsertDeclaration(&M, Intrinsic::thread_pointer); + Intrinsic::getOrInsertDeclaration(&M, Intrinsic::thread_pointer, PtrTy); auto *Call = CallInst::Create(TheFn->getFunctionType(), TheFn); VPValue *Op1 = Plan.getOrAddLiveIn(ConstantInt::get(Int32, 1)); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
