================ @@ -117,5 +121,27 @@ StringRef getNormalizedPPCTuneCPU(const Triple &T, StringRef CPUName) { return getNormalizedPPCTargetCPU(T, CPUName); } +std::optional<StringMap<bool>> getPPCDefaultTargetFeatures(const Triple &T, + StringRef CPU) { + std::optional<StringMap<bool>> FeaturesOpt = + getCPUDefaultTargetFeatures(CPU, BasicPPCSubTypeKV, BasicPPCFeatureKV); + + if (!FeaturesOpt.has_value()) + return std::nullopt; + + StringMap<bool> Features = FeaturesOpt.value(); + // FIXME: We need to check for the processor model 8548, since the backend + // does not support this processor. When this processor model is implemented + // within the backend, the following code can be removed. + if (CPU == "8548") + Features["spe"] = true; + + // The target feature `quadword-atomics` is enabled by llvm back-end for + // power8 or power8 up, we disable the target feature if the triple is + // 32-bit. ---------------- amy-kwan wrote:
Is this comment more accurate? And just checking, but this will be enabled on for P8+ based on `getCPUDefaultTargetFeatures()`, right? ```suggestion // The target feature `quadword-atomics` is only supported for 64-bit // POWER8 and above. ``` https://github.com/llvm/llvm-project/pull/137670 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits