================
@@ -1294,6 +1296,90 @@ mlir::LogicalResult
CIRToLLVMCmpOpLowering::matchAndRewrite(
return mlir::success();
}
+mlir::LogicalResult CIRToLLVMShiftOpLowering::matchAndRewrite(
+ cir::ShiftOp op, OpAdaptor adaptor,
+ mlir::ConversionPatternRewriter &rewriter) const {
+ auto cirAmtTy = mlir::dyn_cast<cir::IntType>(op.getAmount().getType());
+ auto cirValTy = mlir::dyn_cast<cir::IntType>(op.getValue().getType());
+
+ // Operands could also be vector type
+ assert(!cir::MissingFeatures::vectorType());
+ mlir::Type llvmTy = getTypeConverter()->convertType(op.getType());
+ mlir::Value amt = adaptor.getAmount();
+ mlir::Value val = adaptor.getValue();
+
+ // TODO(cir): Assert for vector types
+ assert((cirValTy && cirAmtTy) &&
+ "shift input type must be integer or vector type, otherwise NYI");
+
+ assert((cirValTy == op.getType()) && "inconsistent operands' types NYI");
+
+ // Ensure shift amount is the same type as the value. Some undefined
+ // behavior might occur in the casts below as per [C99 6.5.7.3].
+ // Vector type shift amount needs no cast as type consistency is expected to
+ // be already be enforced at CIRGen.
+ if (cirAmtTy)
+ amt = getLLVMIntCast(rewriter, amt, mlir::cast<mlir::IntegerType>(llvmTy),
+ true, cirAmtTy.getWidth(), cirValTy.getWidth());
----------------
mmha wrote:
I just changed this to always do zero extension (instead of potentially sign
extending if the amount type is signed). This follows the original clang CG
behavior and is probably slightly more efficient on some architectures.
https://github.com/llvm/llvm-project/pull/133405
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